JPS60132192U - Low voltage loss rectifier circuit - Google Patents
Low voltage loss rectifier circuitInfo
- Publication number
- JPS60132192U JPS60132192U JP2018384U JP2018384U JPS60132192U JP S60132192 U JPS60132192 U JP S60132192U JP 2018384 U JP2018384 U JP 2018384U JP 2018384 U JP2018384 U JP 2018384U JP S60132192 U JPS60132192 U JP S60132192U
- Authority
- JP
- Japan
- Prior art keywords
- low voltage
- rectifier circuit
- voltage loss
- loss rectifier
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の低電圧損失整流回路、第２図はトランジ
スタのコレクターエミッタ間飽和電圧とコレクタ電流の
関係を示す曲線図、第３図はこの考案の一実施例で、集
積化された低電圧損失整流回路である。
１・・・ディスクリートトランジスタ、２・・・ディス
クリート抵抗器、３・・・集積化されたトランジスタ、
４・・・集積化された抵抗器。Figure 1 shows a conventional low voltage loss rectifier circuit, Figure 2 is a curve diagram showing the relationship between collector-emitter saturation voltage and collector current of a transistor, and Figure 3 shows an example of this invention. It is a voltage loss rectifier circuit. 1... Discrete transistor, 2... Discrete resistor, 3... Integrated transistor,
4...Integrated resistor.
Claims (1)
上記ベースに電圧を印加することによりコレクタ電流を
流し、エミッタ側に出力電圧を発生させるようにした低
電圧損失整流回路において、上記トランジスタと抵抗か
らなる回路を、ベース入力端子、コレクタ入力端子、エ
ミッタ出力端子のそれぞれを共通に接続し３端子とした
集積回路に多段集積したことを特徴とする低電圧損失整
流回路。In a low voltage loss rectifier circuit, a resistor is connected to the base of the transistor, and a voltage is applied to the base through the resistor to cause a collector current to flow and generate an output voltage on the emitter side. A low voltage loss rectifier circuit characterized in that a circuit consisting of the following is integrated in multiple stages into an integrated circuit with a base input terminal, a collector input terminal, and an emitter output terminal connected in common to form a three-terminal integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018384U JPS60132192U (en) | 1984-02-14 | 1984-02-14 | Low voltage loss rectifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018384U JPS60132192U (en) | 1984-02-14 | 1984-02-14 | Low voltage loss rectifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60132192U true JPS60132192U (en) | 1985-09-04 |
Family
ID=30510433
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018384U Pending JPS60132192U (en) | 1984-02-14 | 1984-02-14 | Low voltage loss rectifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60132192U (en) |
-
1984
- 1984-02-14 JP JP2018384U patent/JPS60132192U/en active Pending
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