JPS60129816A - Output circuit - Google Patents

Output circuit

Info

Publication number
JPS60129816A
JPS60129816A JP58238461A JP23846183A JPS60129816A JP S60129816 A JPS60129816 A JP S60129816A JP 58238461 A JP58238461 A JP 58238461A JP 23846183 A JP23846183 A JP 23846183A JP S60129816 A JPS60129816 A JP S60129816A
Authority
JP
Japan
Prior art keywords
transistor
current
output circuit
transistors
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58238461A
Other languages
Japanese (ja)
Inventor
Masaki Nakai
中井 昌喜
Katsuo Asai
浅井 捷男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP58238461A priority Critical patent/JPS60129816A/en
Publication of JPS60129816A publication Critical patent/JPS60129816A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P7/00Arrangements for regulating or controlling the speed or torque of electric DC motors
    • H02P7/06Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current
    • H02P7/18Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power
    • H02P7/24Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices
    • H02P7/28Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices
    • H02P7/285Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only
    • H02P7/288Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using variable impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Control Of Direct Current Motors (AREA)

Abstract

PURPOSE:To reduce the power consumption of an output circuit at the time of a light load, by connecting the 1st and 2nd transistors with the load in the way of Darlington connection in which the 1st and 2nd transistors are positioned at the front and rear stages, respectively, and driving the 2nd transistor by means of the 3rd transistor. CONSTITUTION:At the starting time, the internal impedance of a motor is low and a large starting current is made to flow. At this time, the voltage between the collector and emitter of a starting transistor Q2 rises and another transistor Q1 is set to an active condition and, as a result, a base current is supplied to the transistor Q2 through the transistor Q1. Moreover, a fixed current is supplied from a transistor Q3 as the base current of the transistor Q2. That is to say, the transistor Q2 is driven by the transistors Q1 and Q3. When the motor becomes a normal condition, an output current Ic decreases and the transistor Q2 tends to become a saturated condition. As a result, the transistor Q1 also becomes a saturated condition and the transistor Q2 is driven by the transistor Q3 only. The collector-emitter voltage VCE of the transistor Q2 and the characteristic of the output current Ic correspond to the Area B of the figure.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 この考案は、モータ等の駆動用として用いられる出力回
路に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field This invention relates to an output circuit used for driving a motor or the like.

(ロ)従来技術 第1図は従来の出力回路であるダーリントン接続回路の
説明図、第2図は前記ダーリントン接続回路のVCE−
1c特性図を示す。
(B) Prior art FIG. 1 is an explanatory diagram of a Darlington connection circuit which is a conventional output circuit, and FIG.
1c characteristic diagram is shown.

負荷RLが例えば、モータである場合、その値が変動す
ることにより、出力電流Icが変化する。
For example, if the load RL is a motor, the output current Ic changes as its value changes.

しかし、トランジスタQ2のコレクターエミッタ間電圧
VCEばVF 2+VCEsat + (第2図17J
A点)以下に下がらない。ここで、VF、はトランジス
タQ2のベース−エミッタ間の順方向電圧、VCEsa
t 、はトランジスタQ1のコレクターエミッタ間の飽
和電圧である。そのため、従来の出力回路は、軽負荷時
における回路内部の消費電力が比較的大きくなるという
欠点がある。
However, if the collector-emitter voltage VCE of transistor Q2 is VF 2 + VCEsat + (Fig. 2 17J
Point A) does not fall below. Here, VF is the forward voltage between the base and emitter of transistor Q2, VCEsa
t is the collector-emitter saturation voltage of transistor Q1. Therefore, the conventional output circuit has the disadvantage that the power consumption inside the circuit is relatively large when the load is light.

また、トランジスタ1石の出力回路では、ベース電流が
大きくならざるをえない。そのため、出力電流に対する
回路電流の割合が大きくなり効率が悪い。
Furthermore, in an output circuit with a single transistor, the base current inevitably becomes large. Therefore, the ratio of circuit current to output current becomes large, resulting in poor efficiency.

(ハ)目的 この発明は、大きな負荷に対し充分な駆動能力を備え、
かつ、軽負荷時において、回路の消費電力を小さくでき
る出力回路を提供することを目的としている。
(c) Purpose This invention has sufficient driving ability for large loads,
Another object of the present invention is to provide an output circuit that can reduce the power consumption of the circuit when the load is light.

に)構成 この発明に係る出力回路は、第1、第2及び第3のトラ
ンジスタを備え、第1及び第3のトランジスタは入力信
号を与えられ、かつ、第1のトランジスタと第2のトラ
ンジスタは、それぞれ前段、後段に配されたダーリント
ン接続をなして負荷に接続され、第3のトランジスタは
第2のトランジスタを駆動するものであることを特徴と
している。
B) Configuration The output circuit according to the present invention includes first, second, and third transistors, the first and third transistors are supplied with an input signal, and the first transistor and the second transistor are , are connected to the load through a Darlington connection arranged at the front stage and the rear stage, respectively, and the third transistor drives the second transistor.

(ポ)実施例 第3図はこの発明に係る出力回路の一実施例の構成を示
す回路図、第4図は第3図に示した出力回路のVCE−
Ic特性図を示す。
(Po) Embodiment FIG. 3 is a circuit diagram showing the configuration of an embodiment of the output circuit according to the present invention, and FIG. 4 is a VCE-1 of the output circuit shown in FIG.
An Ic characteristic diagram is shown.

第3図において、トランジスタQlとトランジスタQ2
は、それぞれ前段、後段に配されたダーリントン接続を
なす。前記トランジスタ[lL Q2のコレクタは負荷
RLを介して電源Vccに接続され、トランジスタQ2
のエミッタは接地される。
In FIG. 3, transistor Ql and transistor Q2
form a Darlington connection placed at the front stage and rear stage, respectively. The collector of the transistor [lL Q2 is connected to the power supply Vcc via the load RL, and the collector of the transistor Q2
The emitter of is grounded.

一方、トランジスタQ3およびトランジスタQ1のベー
スには、抵抗R1、R2を介してそれぞれ入力信号が与
えられる。また、前記トランジスタQ3のコレクタは抵
抗R3を介して電源Vccに、エミッタはトランジスタ
Q2のベースにそれぞれ接続される。
On the other hand, input signals are applied to the bases of transistor Q3 and transistor Q1 via resistors R1 and R2, respectively. Further, the collector of the transistor Q3 is connected to the power supply Vcc via a resistor R3, and the emitter is connected to the base of the transistor Q2.

次に、上述した構成を備えた実施例の動作について説明
する。
Next, the operation of the embodiment having the above-described configuration will be explained.

例えば、モータを駆動する場合、起動時にはモータの内
部インピーダンスが低く、大きな起動電流が流れる。こ
のとき、モータを負荷とする駆動トランジスタQ2のC
E間電電圧上昇し、Qlが能動状態となってQ2にはQ
lを介してベース電流が供給される。また、Q3からも
一定電流が同時にQ2のベース電流として供給される。
For example, when driving a motor, the internal impedance of the motor is low at startup, and a large startup current flows. At this time, C of drive transistor Q2 whose load is the motor
The voltage across E increases, Ql becomes active, and Q2 becomes Q2.
The base current is supplied via l. Further, a constant current is simultaneously supplied from Q3 as the base current of Q2.

即ち、トランジスタQ2は、トランジスタQ1、Q3に
よって駆動される。このときのVCE−1c特性は、第
4図のA領域に相当する。
That is, transistor Q2 is driven by transistors Q1 and Q3. The VCE-1c characteristic at this time corresponds to region A in FIG. 4.

しかして、負荷であるモータが定常状態に至ると、出力
電流■cは減少し、Q2が飽和状態になろうとする。そ
の結果、トランジスタQ1も飽和状態になり、トランジ
スタQ2はトランジスタQ3によってのみ駆動される。
When the motor, which is the load, reaches a steady state, the output current c decreases, and Q2 tends to reach a saturated state. As a result, transistor Q1 is also saturated and transistor Q2 is driven only by transistor Q3.

従って、トランジスタQ2のコレクターエミッタ間電圧
VCEはV CgsaL2となる。このときのVCE−
1c特性は、第4図のB領域に相当する。
Therefore, the collector-emitter voltage VCE of transistor Q2 becomes V CgsaL2. VCE at this time
The 1c characteristic corresponds to region B in FIG.

なお、上述の実施例の説明では、トランジスタQ1〜Q
3はNPN)ランジスタを例にとって説明した。しかし
、この発明はPNPトランジスタであっても同様の効果
を奏することは勿論である。
In addition, in the description of the above embodiment, transistors Q1 to Q
3 is an NPN) transistor as an example. However, it goes without saying that the present invention can produce similar effects even with PNP transistors.

(へ)効果 この発明に係る出力回路は、軽負荷時の場合、第1のト
ランジスタが飽和状態になった後も、本発明により付加
した第3のトランジスタにより第2のトランジスタのベ
ースを駆動することにより、第2のトランジスタのコレ
クターエミッタ間電圧VCEを従来の出力回路に比較し
て小さくすることができる。したがって、この発明によ
れば、軽負荷時において回路の消費電力を少なくするこ
とができる。そのため、この発明は、モータ等のように
、起動時に大電流を必要とするが、定常時にはさほど電
流を流す必要のない負荷を駆動する場合には最適である
(F) Effect The output circuit according to the present invention drives the base of the second transistor by the third transistor added according to the present invention even after the first transistor becomes saturated when the load is light. As a result, the collector-emitter voltage VCE of the second transistor can be made smaller than that of a conventional output circuit. Therefore, according to the present invention, the power consumption of the circuit can be reduced when the load is light. Therefore, the present invention is most suitable for driving a load such as a motor that requires a large current at startup but does not require much current to flow during steady state.

また、この発明によれば、前述したように定席時の消費
電力を少なくできるため、回路の温度上昇を抑えられる
。そのため、この発明に係る出力回路を集積回路で実現
する場合には好都合である。
Further, according to the present invention, as described above, power consumption during full seating can be reduced, so temperature rise in the circuit can be suppressed. Therefore, it is convenient to realize the output circuit according to the present invention using an integrated circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の出力回路であるダーリントン接続回路の
説明図、第2図は前記ダーリントン接続回路のVCE−
1c特性図、第3図はこの発明に係る出力回路の一実施
例の構成を示す回路図、第4図は第3図に示した出力回
路のVCIE” I c特性図を示す。 Ql、口2、Q3・・・トランジスタ、RL ・・・負
荷。 特許出願人 ローム株式会社 代理人 弁理士 大 西 孝 治 第1図 第2図 第3図 第4図
FIG. 1 is an explanatory diagram of a Darlington connection circuit, which is a conventional output circuit, and FIG. 2 is an explanatory diagram of the Darlington connection circuit, which is a conventional output circuit.
1c characteristic diagram, FIG. 3 is a circuit diagram showing the configuration of an embodiment of the output circuit according to the present invention, and FIG. 4 shows a VCIE"Ic characteristic diagram of the output circuit shown in FIG. 3. 2, Q3...Transistor, RL...Load.Patent applicant: ROHM Co., Ltd., agent, patent attorney, Takaharu Ohnishi Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] (1)第1、第2及び第3のトランジスタを備え、第1
及び第3のトランジスタは入力信号を与えられ、かつ、
第1のトランジスタと第2のトランジスタは、それぞれ
前段、後段に配されたダーリントン接続をなして負荷に
接続され、第3のトランジスタは第2のトランジスタを
駆動するものであることを特徴とする出力回路。
(1) comprising a first, a second and a third transistor;
and a third transistor is provided with an input signal, and
An output characterized in that the first transistor and the second transistor are connected to a load in a Darlington connection arranged at a front stage and a rear stage, respectively, and the third transistor drives the second transistor. circuit.
JP58238461A 1983-12-17 1983-12-17 Output circuit Pending JPS60129816A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58238461A JPS60129816A (en) 1983-12-17 1983-12-17 Output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58238461A JPS60129816A (en) 1983-12-17 1983-12-17 Output circuit

Publications (1)

Publication Number Publication Date
JPS60129816A true JPS60129816A (en) 1985-07-11

Family

ID=17030567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58238461A Pending JPS60129816A (en) 1983-12-17 1983-12-17 Output circuit

Country Status (1)

Country Link
JP (1) JPS60129816A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515698U (en) * 1991-08-09 1993-02-26 株式会社東海理化電機製作所 Transistor circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101310A (en) * 1981-12-11 1983-06-16 Toshiba Corp Current controlling circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101310A (en) * 1981-12-11 1983-06-16 Toshiba Corp Current controlling circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515698U (en) * 1991-08-09 1993-02-26 株式会社東海理化電機製作所 Transistor circuit

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