JPS60126731A - Program control method - Google Patents

Abstract

PURPOSE:To perform alteration and debug of a program easily by executing an altered program by writing the altered program in an RAM without rewriting a ROM anew when altering a part of a program written in the ROM. CONSTITUTION:An altered program address is written in the RAMb6 according to an altered program written in the RAMa3. To interrupt a CPU1 at the time of generation of altered address, the altered address is written in a data latch 5 from the RAMb6. A multiplexer 4 generates an interruption signal 8 in the CPU1 when it detects that an altered address is selectly inputted from the latch 5 and the address comes to a specified altered position conforming to the input from an address bus 7. On receiving the signal 8, the CPU1 stops execution of the program centered on the ROM2 used up to that time using the signal 8, and jumps to a program to which a desired alteration written in the RAMa3 is added.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention provides a method for easily changing a part of a program existing in the ROM of a personal computer without rewriting the ROM. This invention relates to a method for controlling programs that can be executed.

[Background of the invention]

Conventionally, when changing a program existing in the ROM of a personal computer, it was necessary to rewrite the contents of the ROM and
It is necessary to install this new rewritten ROM, which requires time and effort to change programs and debug after changes.
The problem was that it was time consuming.

[Purpose of the invention]

An object of the present invention is to provide program control that does not have the above-mentioned problems and allows a modified program to be easily executed by simply writing the modified program and the modified program in the ROM to the RAM. The purpose is to provide a method.

[Summary of the invention]

In order to achieve the above object, in the present invention, in addition to the ROM in which the program that needs to be changed exists, there is also a RAM in which the program that has been changed is written, and address information that needs to be changed is input from this RAM. A register is provided to hold the address, and a multiplexer is provided which receives the changed address output from this register and the address bus as input and outputs an interrupt signal to the CPU. When the multiplexer generates an interrupt to the CPU upon detecting that the
Shift to execution of the program with the changes made. I did it like that.

[Embodiments of the invention]

FIG. 1 is a block diagram of one embodiment of the present invention, in which 1 is a CPU;
2 is a ROM in which the program to be changed exists, 3 is a RAM in which the changed program is written, 4 is a multiplexer that sends an interrupt signal to the CPU when the changed position is detected, and 5 is data that holds the changed address position. Latch (register), 6 is RAM that stores the changed address
b, 7 is an address bus, and 8 is an interrupt signal. However, there is no reason why RAMa3 and RAMb5 must exist physically separately, and both may exist in the same RAM.

A method for executing a program written in RAMa 3 with desired changes added thereto while executing a program written in ROM 2 requiring changes will be described below. First, R
The modified program address is written to RAMb6 by the modified program written in AMa3. At this time, there may be a plurality of addresses to be changed; in such a case, the addresses to be changed are stored in RAM b6 in order. Next, an interrupt is issued to the CPUI when a changed address occurs in the following manner. Change address R
Write from AMb6 to data latch 5. The multiplexer 4 selects and inputs the changed address from the data latch 5, and when it detects that the address has arrived at a predetermined changed position in coincidence with the input from the address bus 7, the CPU
Generates an interrupt signal 8 to I. When the CPUI receives this interrupt signal 8, it stops executing the program in ROM '2 that was being executed up to that point.
Jump to the program written in RAMa3 with the desired changes added. This is shown in the memory map of FIG. While the program in ROM2 in area A is being executed, a changed address is written to RAMb6 in area B in order to execute the changed program in RAMa3 in area C. Next, the modification procedure will be described with reference to FIG. R.A.
The CPUI reads the changed address in the MbG and outputs it to the data controller and 2chi 5 to be held there. Multiplexer 4 is
The changed address input from the data latch 5 is compared with the constantly changing address input from the address bus 7, and if they match, an interrupt signal 8 is generated and the CPU
Send to. When CPU1 & yo receives interrupt signal 8,
Execution of the program in ROM2 that has been executed up to that point is stopped, and the program jumps to the modified program stored in RAMaa indicated by the modified address. However, before jumping, the CPUI changes address power (
If it is stored in the RAM b6, the changed address is read out, inputted into the data latch 5 and held, and waits until the next changed address arrives in the address bus 7. The processing after the next changed address arrives is the same as above.

〔Effect of the invention〕

As explained above, according to the present invention, when a part of the program written in the ROM is changed, the changed program can be executed by writing the changed block to the RAM without rewriting the ROM. This has the effect of making it easier to change programs and perform denominations.

[Brief explanation of drawings]

FIG. 1 is a program diagram of an embodiment of the present invention, FIG. 2 is a diagram showing the position of the modification program on the memory master knob, and FIG. 3 is a diagram showing an example of the modification procedure. 1-cpu, 2-ROM, 3--RAM a
.

Claims (1)

[Claims] ROM that requires changes to some of the programmed programs
and a RAM in which the modified program exists,
It is equipped with a register that inputs and holds address information that needs to be changed from this RAM, and a multiplexer that receives the changed address output from this register and the address bus as input and outputs an interrupt signal to the CPU. When the multiplexer generates an interrupt to the CPU by detecting that the address has reached the change position and the input from the address bus matches, the ROM program being executed is stopped and the change in the RAM is performed. A program control method characterized by branching and transitioning during program execution.