JPS60120611A - Digital filter - Google Patents

Digital filter

Info

Publication number
JPS60120611A
JPS60120611A JP22834683A JP22834683A JPS60120611A JP S60120611 A JPS60120611 A JP S60120611A JP 22834683 A JP22834683 A JP 22834683A JP 22834683 A JP22834683 A JP 22834683A JP S60120611 A JPS60120611 A JP S60120611A
Authority
JP
Japan
Prior art keywords
input signal
amplitude
time constant
delay element
primary delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22834683A
Other languages
Japanese (ja)
Inventor
Masanori Shinoda
正紀 篠田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP22834683A priority Critical patent/JPS60120611A/en
Publication of JPS60120611A publication Critical patent/JPS60120611A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To obtain a digital filter having a proper time constant easily at low cost by making variable the time constant of a primary delay element according to the amplitude of an input signal. CONSTITUTION:An input signal SI is sampled and held by a sample and hold circuit 1 then converted by an A/D converter 2 into a digital signal, which is supplied to an amplitude detector 3 and the primary delay element 5. The amplitude detector 3 detects the amplitude of the input signal SI during the past time TA, i.e. difference A between a maximum and a minimum. Further, the difference A is compared with the amplitude AO of a signal SI having no superposed noise in a period TA to evaluate the level of a noise in the input signal. The output of this detector 3 is converted to a time constant by a function generator 4 according to a predetermined function. The primary delay element 5 performs prescribed arithmetic corresponding to the primary delay element on the basis of the time constant and input signal SI.

Description

【発明の詳細な説明】 〔発明の門する技術分野〕 この発明は、ノ・fズが重畳された入力信号からノ・f
、′″成分みを除去するフ・fルタ、特にディジタル演
算装僅、を用いたディジタルフィルタに関するものであ
る。
[Detailed Description of the Invention] [Technical field to which the invention pertains] The present invention provides a method for extracting no.f.s from an input signal on which no.f.
The present invention relates to a filter that removes only the ,'' component, and in particular to a digital filter using a digital arithmetic unit.

〔従:!16技術とその間眉1点〕 従)1を、かかるフィルタ手段としては、−次遅れJ5
7Z、、 フィルタが使用されることが多い。これは、
その演算が比較的簡単なためであるが、その時定数が小
さすぎるとノイズを充分に除去することができず、逆に
時定数が大きずぎるとノイズばがりでなく本来の117
報までも除去されてしまい、正確な情報を抽出すること
ができないという欠点を有している。
[Sub:! 16 techniques and 1 point between them] Sub) 1, as such a filter means - next lag J5
7Z, filters are often used. this is,
This is because the calculation is relatively simple, but if the time constant is too small, noise cannot be removed sufficiently, and conversely, if the time constant is too large, the original 117
It has the disadvantage that even information is removed, making it impossible to extract accurate information.

〔発明の目的〕[Purpose of the invention]

この発明はかかる欠点を除去すべくなされたもので、入
力信号に応じて一次遅れ要素の時定数を決定することに
より、itg K )J正にノイズを除去することが可
能なディジタル71ルタを提供することを目的とするも
のである。
The present invention has been made in order to eliminate such drawbacks, and provides a digital 71 router that can accurately remove noise by determining the time constant of the first-order delay element according to the input signal. The purpose is to

〔発明の要点〕[Key points of the invention]

この発明は、入力信号のj・ツ夫一定11q間における
振lI?、)を検出することにより、入力信号に含まれ
るノイズ成分の大きさを評価し、予め法められている関
係によってノイズ成分の大きさと対応する一次遅れ要素
の時定数を決め、この時定数に応じて一次遅れ要素の伝
達関数相当の演算を行なうことによってノイズを精度良
く除去しようとするものでIりる。。
In this invention, the amplitude lI? of the input signal between j and constant 11q? ), the magnitude of the noise component included in the input signal is evaluated, and the time constant of the first-order lag element corresponding to the magnitude of the noise component is determined based on a predetermined relationship. Accordingly, noise is removed with high accuracy by performing calculations corresponding to the transfer function of the first-order lag element. .

〔発明の実施例〕[Embodiments of the invention]

第1図はこの発明の実施例を示す構成図、第2ト1は↓
、碍輻幅検出器動作を説明するための波形図、rrS3
図(t41、関数発生器のQ′!を性を示す特↑1:、
図である。
Figure 1 is a configuration diagram showing an embodiment of this invention, and Figure 2 is ↓
, waveform diagram for explaining the operation of the convergence width detector, rrS3
Figure (t41, characteristic ↑1 that shows the Q'! of the function generator
It is a diagram.

第1図において、1はサンプルホールド回路、2はアナ
ログ/ディジタル(A/D )変換器、3は振幅検出器
、4は関数発生器、5は一次遅れ要素、6υ、デ・fジ
タル/アナログ(1)/A)変換器であるO 入力信号S1r、l:、回ド(′J1にてサンプルホー
ルドされた後、A/]リタ換器2によりディジタル信号
に変換され、拡幅P出器3および一次遅れ要素5K ’
j工lj レル。振(T4 倹111器3(弓1、I(
・1去Tへ時間にわたる入力信号1)I’7)振幅、す
なわち、その最大値と最小値との差入を検出する。例え
ば、入力信号−波形S■が第2図の如く示されるものと
し、現時々1をtoとすると、これより過去T入時間の
振幅t↓Δ1としてめられる。なお、第2図において5
NkJ、ノ・fズが重畳されていない信号を示すもので
あるが、該信号SNの期間′P入内における振幅はAo
として表わされるから、この振幅Nを互いに比較するこ
とによって入力信号sIに含まれるノイズの大きさを評
価することが可能である。したがって1lj7間の経過
とともに入力信号SIを順次−リンプリングすることに
よって、常にノイズに関する最新の情報を得ることがで
きる。なお、時間TAは、予想されるノイズの周(す」
(または周波数)にしたがって前もって適宜に設定され
るものであZ)。このようにしてめられたJAR幅は関
数発生器4に与えられ、ここで、予め状められCいる関
数関係にしたがって時定数に変換される。この関数の例
としては、第31喜1(A)の如く時定数の上限TfL
1と下限Tfcl t YJ:定して45き、この範囲
で入力信号の振幅Aに比例して110定数′rfを増加
させるものでもよく、また同図(B)の如く所定振’I
9A Iを境にして1[3定数Tfを大幅に変えるよう
にするものでもにい。なお、関数発生器4のかわりに、
メモリを使用することもできる。−次遅れ要素5は、関
数発生器4から与えられる時定数Tfと、入力信号S工
とにもとづいて、良く知られてしAる次の(1)式の′
如き、−次遅れ要素に相当する所定の演算を行4Cう。
In Figure 1, 1 is a sample and hold circuit, 2 is an analog/digital (A/D) converter, 3 is an amplitude detector, 4 is a function generator, 5 is a first-order delay element, 6υ, digital/analog (1) /A) O input signal S1r, l:, after being sampled and held at J1, is converted into a digital signal by the A/] retarder 2, and is converted to a digital signal by the widening P output 3 and first-order lag element 5K'
j engineering lj rel. Shake (T4 111 vessel 3 (bow 1, I (
- Detect the input signal 1)I'7) amplitude over time, ie the difference between its maximum and minimum values. For example, if the input signal-waveform S is shown as shown in FIG. 2, and if the current time is 1, then it can be determined that the amplitude of the past T input time is t↓Δ1. In addition, in Figure 2, 5
This shows a signal on which NkJ and No.fs are not superimposed, but the amplitude of the signal SN within period 'P is
Therefore, by comparing the amplitudes N with each other, it is possible to evaluate the magnitude of noise contained in the input signal sI. Therefore, by sequentially limping the input signal SI as time passes, the latest information regarding noise can always be obtained. Note that the time TA is the period of the expected noise.
(or frequency). The JAR width thus determined is provided to a function generator 4, where it is converted into a time constant according to a predetermined functional relationship. An example of this function is the upper limit of the time constant TfL as shown in No. 31 (A).
1 and the lower limit Tfcl t YJ: is set at 45, and the constant 'rf of 110 may be increased in proportion to the amplitude A of the input signal within this range.
9A There is no way to make the 1[3 constant Tf change significantly after I. Note that instead of the function generator 4,
You can also use memory. -The second delay element 5 is calculated based on the time constant Tf given from the function generator 4 and the input signal S, as expressed by the well-known equation (1) below.
A predetermined operation corresponding to the -th lag element is performed in line 4C.

なお、このとき、入力信号sIに(τ11!7間毎にリ
ンプリングするものとし、K回目の一リンブリング時に
16ける要素5の入力C3l) p出力(SF+)には
添字Kをイ」シて示すものとする。
At this time, the input signal sI is assumed to be limped every τ11!7, and the input C3l of element 5 subtracted by 16 at the K-th limbling). The subscript K is added to p output (SF+). shall be indicated.

・・・・・・ (1) つまり、−次遅れ要素5はディジタル演算回路から構成
され、入力信号sIと時定数Tfとにもとづいて上記(
1)式の(juきrif算を行なう、いわゆるディジタ
ル7・イルタ回ll+15としての機能を有しているも
のと云うことができる。A/D変換器2およびD/A変
候器6等は、要素5がディジタル回路であるために設け
られるもので、要素5をアナログ回路でttl成すれば
、これらは不要である。また、サンプルホールド回路1
は、A/D変換を行なう時間を確保するために設けられ
る。このようにして、要素5を介することにより、その
出力からはノイズ成分を含まない本来の信号のみを抽出
することができる。
...... (1) In other words, the -th lag element 5 is composed of a digital arithmetic circuit, and based on the input signal sI and the time constant Tf, the above (
It can be said that it has a function as a so-called digital 7/ilter circuit 11+15 that performs the (ju rif calculation) of equation 1).The A/D converter 2, D/A converter 6, etc. , are provided because the element 5 is a digital circuit, but if the element 5 is formed by an analog circuit, these are unnecessary.
is provided to ensure time for performing A/D conversion. In this way, by passing through element 5, only the original signal containing no noise components can be extracted from its output.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、入力信号の振幅に応じて一次遅れ要
素の時定数を可変としているため、適正な時定数をもつ
ディジタルフィルタを簡単かつ安価に提供しうる利点を
もたらすものである。
According to the present invention, since the time constant of the first-order delay element is made variable according to the amplitude of the input signal, it is possible to easily and inexpensively provide a digital filter having an appropriate time constant.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の実施例を示す構成図、第2図は振幅
検出器の動作を説明するための波形図、拍3図は関数発
生器の特性例を示す特性図である。 符号説明 ■・・・・・・サンプルホールド回路、2・・・・・・
A/D変換器、3・・・・・・振幅検出器、4・・・・
・・関数発生器、5・・・・・・−次遅れ要素、6・・
・・・・i) / A変換器、S■・・・・・・入力信
号、So・・・・・・出力信号代理人 弁理士 並 木
 昭 夫 代理人 弁理+ 松 崎 浩 第1図 第2図 第3図 (/’I) (8)
FIG. 1 is a configuration diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the operation of an amplitude detector, and FIG. 3 is a characteristic diagram showing an example of the characteristics of a function generator. Symbol explanation ■・・・Sample hold circuit, 2・・・・・・
A/D converter, 3... Amplitude detector, 4...
...Function generator, 5...-Next lag element, 6...
...i) / A converter, S... Input signal, So... Output signal Agent Patent attorney Akio Namiki Attorney Patent attorney + Hiroshi Matsuzaki Figure 1 Figure 2 Figure 3 (/'I) (8)

Claims (1)

【特許請求の範囲】[Claims] 入力信号をリーンブリングし所定時間内における・リン
プル値の最大値と最小値との差を検出する検出手段と、
該検出された差からこれと所定の関数関係にある時定数
を法定する手段と、該決定された1(I?定21にと入
力信号のリーンプル値とにもとづいて1次遅れ要素の伝
達関数相当の演算を行なう演算手段とを具備し、てt(
るディジクルフィルタ。
Detection means for lean-bling an input signal and detecting a difference between a maximum value and a minimum value of ripple values within a predetermined time;
means for determining a time constant having a predetermined functional relationship from the detected difference; and determining a transfer function of the first-order lag element based on the determined 1 (I? constant 21) and the lean pull value of the input signal. t(
digital filter.
JP22834683A 1983-12-05 1983-12-05 Digital filter Pending JPS60120611A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22834683A JPS60120611A (en) 1983-12-05 1983-12-05 Digital filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22834683A JPS60120611A (en) 1983-12-05 1983-12-05 Digital filter

Publications (1)

Publication Number Publication Date
JPS60120611A true JPS60120611A (en) 1985-06-28

Family

ID=16875020

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22834683A Pending JPS60120611A (en) 1983-12-05 1983-12-05 Digital filter

Country Status (1)

Country Link
JP (1) JPS60120611A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0254029A2 (en) * 1986-06-20 1988-01-27 MAN Gutehoffnungshütte Aktiengesellschaft Process for filtering a noisy signal
JPS6447115A (en) * 1987-08-18 1989-02-21 Nippon Atomic Ind Group Co Transient change tracing type digital filter
JPH02141015A (en) * 1988-11-21 1990-05-30 Fuji Electric Co Ltd Analog input device variable in filter time constant

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0254029A2 (en) * 1986-06-20 1988-01-27 MAN Gutehoffnungshütte Aktiengesellschaft Process for filtering a noisy signal
JPS6447115A (en) * 1987-08-18 1989-02-21 Nippon Atomic Ind Group Co Transient change tracing type digital filter
JPH02141015A (en) * 1988-11-21 1990-05-30 Fuji Electric Co Ltd Analog input device variable in filter time constant

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