JPH0653779A - Dc signal extract method in ac signal and method for eliminating the dc signal - Google Patents

Dc signal extract method in ac signal and method for eliminating the dc signal

Info

Publication number
JPH0653779A
JPH0653779A JP22331792A JP22331792A JPH0653779A JP H0653779 A JPH0653779 A JP H0653779A JP 22331792 A JP22331792 A JP 22331792A JP 22331792 A JP22331792 A JP 22331792A JP H0653779 A JPH0653779 A JP H0653779A
Authority
JP
Japan
Prior art keywords
signal
vdc
data
cpu
extract
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22331792A
Other languages
Japanese (ja)
Inventor
Koichi Shimada
宏一 島田
Kazuki Shimizu
一樹 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hioki EE Corp
Original Assignee
Hioki EE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hioki EE Corp filed Critical Hioki EE Corp
Priority to JP22331792A priority Critical patent/JPH0653779A/en
Publication of JPH0653779A publication Critical patent/JPH0653779A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To extract a DC signal included in an AC signal and to eliminate the DC signal through digital calculation not relying on the hardware configuration. CONSTITUTION:A sample-and-hold circuit 1 samples one period or its integer number of multiple of the period of an AC signal V (=vmsinomegat+Vdc) by a time division being equal N-division (N is an even number being 2 or over). Sampled data are converted into digital data Vi (i=1-N) by an A/D converter circuit 2 of a next stage, the data are given to a CPU 3. The data are subject to arithmetic operation in equation I in the CPU 3 and a DC signal Vdc is obtained. The DC signal Vdc is extracted from the AC signal V including the DC signal, and the DC signal Vdc is cancelled from the AC signal V by the calculation of Vi-Vdc, that is, by subtracting the DC signal Vdc from the data.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明はディジタル処理によ
り、交流信号中に含まれている直流信号を抽出する方法
および同交流信号からその直流信号を除去する方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for extracting a DC signal contained in an AC signal by digital processing and a method for removing the DC signal from the AC signal.

【0002】[0002]

【従来の技術】例えば、LCRメータで回路素子の各パ
ラメータを測定する場合、その回路素子に印加される交
流電圧と同回路素子をとおして検出される交流電流とを
同期整流させるが、同交流信号中に直流信号が含まれて
いると、後の演算においてそれが誤差となって現れるこ
とがある。
2. Description of the Related Art For example, when measuring each parameter of a circuit element with an LCR meter, an AC voltage applied to the circuit element and an AC current detected through the circuit element are synchronously rectified. If a DC signal is included in the signal, it may appear as an error in a later calculation.

【0003】このため、従来においては、演算増幅器
(オペアンプ)のオフセット調整端子にオフセットキャ
ンセル回路を追加したり、または演算増幅器の前段にコ
ンデンサを介在させて所謂コンデンサの交流結合によ
り、直流信号を除去するようにしている。
Therefore, conventionally, a DC signal is removed by adding an offset cancel circuit to the offset adjustment terminal of an operational amplifier (op-amp), or by interposing a capacitor in the preceding stage of the operational amplifier, so-called AC coupling of the capacitor. I am trying to do it.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、いずれ
にせよハードウェアによるものであるため、最終的には
手作業による微調整が必要とされる。
However, in any case, since it depends on the hardware, the final fine adjustment by hand is required.

【0005】また、それに加えてコンデンサによる場合
には、抵抗Rと組み合わせてCR回路が組まれるため、
その回路全体としての安定時間およびオペアンプの入出
力インピーダンスに影響がでるおそれがある。
In addition to this, in the case of using a capacitor, a CR circuit is assembled in combination with a resistor R,
The stabilization time of the circuit as a whole and the input / output impedance of the operational amplifier may be affected.

【0006】[0006]

【課題を解決するための手段】この発明はこのような従
来の事情に鑑みなされたもので、その構成上の特徴は請
求項1に記載されているように、交流信号からそれに含
まれている直流信号を抽出する方法において、上記交流
信号の1周期中から所定の時間間隔でサンプリングさ
れ、かつ、ディジタル変換されたN個(Nは2以上の偶
数)のデータVi(i=1〜N)を演算処理手段(CP
U)にて、
The present invention has been made in view of such conventional circumstances, and the structural features thereof are included in an AC signal as described in claim 1. In the method of extracting a DC signal, N (N is an even number of 2 or more) data Vi (i = 1 to N) sampled at a predetermined time interval from one cycle of the AC signal and digitally converted. Is a processing means (CP
U)

【数2】 なる演算を行なって直流信号Vdcを抽出することにあ
る。
[Equation 2] Is to extract the DC signal Vdc.

【0007】また、請求項2においては、上記データV
i(i=1〜N)の各々から上記直流信号Vdcを減算
することにより、上記交流信号からそれに含まれている
直流信号を除去することを特徴としている。
Further, in claim 2, the data V
By subtracting the DC signal Vdc from each of i (i = 1 to N), the DC signal contained therein is removed from the AC signal.

【0008】[0008]

【作用】一般に、直流電圧を含む交流電圧は、 V=Vmsinωt+Vdc なる式で表される(Vmは最大値)。同式において、V
msinωtが交流分、Vdcが直流分である。
In general, an AC voltage including a DC voltage is expressed by the following equation: V = Vmsinωt + Vdc (Vm is the maximum value). In the equation, V
Msinωt is an AC component, and Vdc is a DC component.

【0009】この信号の1周期を所定の時間間隔でサン
プリングしてN個のデータをとり、A/D変換したデー
タをVi(i=1〜N)とする。交流分はその波形の対
称性から、その1周期分のデータを加算すると「0」と
なる。
One cycle of this signal is sampled at predetermined time intervals to obtain N pieces of data, and the A / D converted data is defined as Vi (i = 1 to N). Due to the symmetry of the waveform, the AC component becomes "0" when the data for one period is added.

【0010】したがって、Therefore,

【数3】 なる演算により、直流電圧Vdcが求められる。ちなみ
に、同式は
[Equation 3] Then, the DC voltage Vdc is obtained. By the way,

【数4】 と等価である。[Equation 4] Is equivalent to

【0011】そして、各データViから直流電圧Vdc
をそれぞれ減算することにより、交流電圧内に含まれて
いる直流電圧がキャンセルされる。
The DC voltage Vdc is converted from each data Vi.
The DC voltage contained in the AC voltage is canceled by subtracting each of these.

【0012】[0012]

【実施例】以下、図1および図2を参照しながらこの発
明の一実施例を説明する。この発明を実施するにあたっ
ては、図1に示されているように、サンプルホールド回
路1、A/D変換回路2および演算手段としての中央演
算処理ユニット(CPU)3が用いられる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. In carrying out the present invention, as shown in FIG. 1, a sample hold circuit 1, an A / D conversion circuit 2, and a central processing unit (CPU) 3 as a calculation means are used.

【0013】サンプルホールド回路1は、図2に例示さ
れているように、交流信号V(=Vmsinωt+Vd
c)の1周期をN等分の時間間隔でサンプリングする
(Nは2以上の偶数)。この例では、サンプリング対象
を1周期としているが、その整数倍の周期にわたってサ
ンプリングするようにしても良い。
As shown in FIG. 2, the sample and hold circuit 1 has an AC signal V (= Vmsinωt + Vd).
One cycle of c) is sampled at N equal time intervals (N is an even number of 2 or more). In this example, the sampling target is one cycle, but sampling may be performed over an integral multiple of that cycle.

【0014】サンプリングされたデータは、次段のA/
D変換回路2により、ディジタルデータVi(i=N)
に変換された後、CPU3に与えられる。
The sampled data is A /
Digital data Vi (i = N) is generated by the D conversion circuit 2.
After being converted to, it is given to the CPU 3.

【0015】各データはCPU3においてEach data is stored in the CPU 3.

【数5】 なる式により演算され、直流信号Vdcが求められる。[Equation 5] The DC signal Vdc is calculated by the following equation.

【0016】このようにして、交流信号Vからそれに含
まれている直流信号Vdcが抽出されるが、Vi−Vd
c(i=1〜N)すなわち各データから直流信号Vdc
を減算することにより、交流信号Vから直流信号Vdc
をキャンセルすることができる。
In this way, the DC signal Vdc contained therein is extracted from the AC signal V, which is Vi-Vd.
c (i = 1 to N), that is, DC signal Vdc from each data
To subtract the DC signal Vdc from the AC signal V.
Can be canceled.

【0017】[0017]

【発明の効果】以上説明したように、この発明によれ
ば、ハード構成によることなく、ディジタル演算によっ
て交流信号に含まれている直流信号を抽出し得、また、
その直流信号を除去することができる。
As described above, according to the present invention, it is possible to extract a DC signal contained in an AC signal by digital operation without using a hardware configuration, and
The DC signal can be removed.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明に適用される回路図。FIG. 1 is a circuit diagram applied to the present invention.

【図2】この発明を説明するための波形図。FIG. 2 is a waveform diagram for explaining the present invention.

【符号の説明】[Explanation of symbols]

1 サンプルホールド回路 2 A/D変換回路 3 CPU 1 Sample and hold circuit 2 A / D conversion circuit 3 CPU

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 交流信号からそれに含まれている直流信
号を抽出する方法において、上記交流信号の少なくとも
1周期中から所定の時間間隔でサンプリングされ、か
つ、ディジタル変換されたN個(Nは2以上の偶数)の
データVi(i=1〜N)を演算処理手段(CPU)に
て、 【数1】 なる演算を行なって直流信号Vdcを抽出することを特
徴とする交流信号中の直流信号抽出方法。
1. A method for extracting a DC signal contained therein from an AC signal, wherein N (N is 2) samples of at least one period of the AC signal at predetermined time intervals and digitally converted. The above even-numbered data Vi (i = 1 to N) is calculated by the arithmetic processing means (CPU) as follows: A method for extracting a DC signal in an AC signal, which comprises performing the following calculation to extract the DC signal Vdc.
【請求項2】 上記データVi(i=1〜N)の各々か
ら上記直流信号Vdcを減算することにより、上記交流
信号からそれに含まれている直流信号を除去することを
特徴とする交流信号中の直流信号除去方法。
2. An AC signal characterized by removing the DC signal contained therein from the AC signal by subtracting the DC signal Vdc from each of the data Vi (i = 1 to N). DC signal removal method.
JP22331792A 1992-07-30 1992-07-30 Dc signal extract method in ac signal and method for eliminating the dc signal Pending JPH0653779A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22331792A JPH0653779A (en) 1992-07-30 1992-07-30 Dc signal extract method in ac signal and method for eliminating the dc signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22331792A JPH0653779A (en) 1992-07-30 1992-07-30 Dc signal extract method in ac signal and method for eliminating the dc signal

Publications (1)

Publication Number Publication Date
JPH0653779A true JPH0653779A (en) 1994-02-25

Family

ID=16796263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22331792A Pending JPH0653779A (en) 1992-07-30 1992-07-30 Dc signal extract method in ac signal and method for eliminating the dc signal

Country Status (1)

Country Link
JP (1) JPH0653779A (en)

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* Cited by examiner, † Cited by third party
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WO2020014158A1 (en) * 2018-07-07 2020-01-16 Intelesol, Llc Method and apparatus for signal extraction with sample and hold and release
US10985548B2 (en) 2018-10-01 2021-04-20 Intelesol, Llc Circuit interrupter with optical connection
US11064586B2 (en) 2018-12-17 2021-07-13 Intelesol, Llc AC-driven light-emitting diode systems
CN113574362A (en) * 2019-03-15 2021-10-29 日本分光株式会社 Circular dichroism measuring device and circular dichroism measuring method
US11170964B2 (en) 2019-05-18 2021-11-09 Amber Solutions, Inc. Intelligent circuit breakers with detection circuitry configured to detect fault conditions
US11205011B2 (en) 2018-09-27 2021-12-21 Amber Solutions, Inc. Privacy and the management of permissions
US11334388B2 (en) 2018-09-27 2022-05-17 Amber Solutions, Inc. Infrastructure support to enhance resource-constrained device capabilities
US11349296B2 (en) 2018-10-01 2022-05-31 Intelesol, Llc Solid-state circuit interrupters
US11581725B2 (en) 2018-07-07 2023-02-14 Intelesol, Llc Solid-state power interrupters
US11670946B2 (en) 2020-08-11 2023-06-06 Amber Semiconductor, Inc. Intelligent energy source monitoring and selection control system
US11671029B2 (en) 2018-07-07 2023-06-06 Intelesol, Llc AC to DC converters

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11671029B2 (en) 2018-07-07 2023-06-06 Intelesol, Llc AC to DC converters
US11056981B2 (en) 2018-07-07 2021-07-06 Intelesol, Llc Method and apparatus for signal extraction with sample and hold and release
WO2020014158A1 (en) * 2018-07-07 2020-01-16 Intelesol, Llc Method and apparatus for signal extraction with sample and hold and release
US11581725B2 (en) 2018-07-07 2023-02-14 Intelesol, Llc Solid-state power interrupters
US11764565B2 (en) 2018-07-07 2023-09-19 Intelesol, Llc Solid-state power interrupters
US11334388B2 (en) 2018-09-27 2022-05-17 Amber Solutions, Inc. Infrastructure support to enhance resource-constrained device capabilities
US11205011B2 (en) 2018-09-27 2021-12-21 Amber Solutions, Inc. Privacy and the management of permissions
US11349296B2 (en) 2018-10-01 2022-05-31 Intelesol, Llc Solid-state circuit interrupters
US11791616B2 (en) 2018-10-01 2023-10-17 Intelesol, Llc Solid-state circuit interrupters
US10985548B2 (en) 2018-10-01 2021-04-20 Intelesol, Llc Circuit interrupter with optical connection
US11064586B2 (en) 2018-12-17 2021-07-13 Intelesol, Llc AC-driven light-emitting diode systems
US11363690B2 (en) 2018-12-17 2022-06-14 Intelesol, Llc AC-driven light-emitting diode systems
CN113574362A (en) * 2019-03-15 2021-10-29 日本分光株式会社 Circular dichroism measuring device and circular dichroism measuring method
US11348752B2 (en) 2019-05-18 2022-05-31 Amber Solutions, Inc. Intelligent circuit breakers with air-gap and solid-state switches
US11551899B2 (en) 2019-05-18 2023-01-10 Amber Semiconductor, Inc. Intelligent circuit breakers with solid-state bidirectional switches
US11373831B2 (en) 2019-05-18 2022-06-28 Amber Solutions, Inc. Intelligent circuit breakers
US11682891B2 (en) 2019-05-18 2023-06-20 Amber Semiconductor, Inc. Intelligent circuit breakers with internal short circuit control system
US11342151B2 (en) 2019-05-18 2022-05-24 Amber Solutions, Inc. Intelligent circuit breakers with visual indicators to provide operational status
US11170964B2 (en) 2019-05-18 2021-11-09 Amber Solutions, Inc. Intelligent circuit breakers with detection circuitry configured to detect fault conditions
US11670946B2 (en) 2020-08-11 2023-06-06 Amber Semiconductor, Inc. Intelligent energy source monitoring and selection control system

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