JPS60118952A - 仮想アドレス制御方式 - Google Patents

仮想アドレス制御方式

Info

Publication number
JPS60118952A
JPS60118952A JP58226389A JP22638983A JPS60118952A JP S60118952 A JPS60118952 A JP S60118952A JP 58226389 A JP58226389 A JP 58226389A JP 22638983 A JP22638983 A JP 22638983A JP S60118952 A JPS60118952 A JP S60118952A
Authority
JP
Japan
Prior art keywords
address
virtual address
extended
logical
space
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58226389A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6341102B2 (enrdf_load_stackoverflow
Inventor
Yasuo Hirota
広田 泰生
Takahito Noda
野田 敬人
Yuji Kamisaka
神阪 裕士
Junichi Mizuno
水野 淳一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58226389A priority Critical patent/JPS60118952A/ja
Publication of JPS60118952A publication Critical patent/JPS60118952A/ja
Publication of JPS6341102B2 publication Critical patent/JPS6341102B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
JP58226389A 1983-11-30 1983-11-30 仮想アドレス制御方式 Granted JPS60118952A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58226389A JPS60118952A (ja) 1983-11-30 1983-11-30 仮想アドレス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58226389A JPS60118952A (ja) 1983-11-30 1983-11-30 仮想アドレス制御方式

Publications (2)

Publication Number Publication Date
JPS60118952A true JPS60118952A (ja) 1985-06-26
JPS6341102B2 JPS6341102B2 (enrdf_load_stackoverflow) 1988-08-15

Family

ID=16844354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58226389A Granted JPS60118952A (ja) 1983-11-30 1983-11-30 仮想アドレス制御方式

Country Status (1)

Country Link
JP (1) JPS60118952A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04163343A (ja) * 1990-10-22 1992-06-08 Kawashima Textile Manuf Ltd 透光性パイル布帛
JPH04200585A (ja) * 1990-11-30 1992-07-21 Kawashima Textile Manuf Ltd 緞帳等屋内装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782269A (en) * 1980-11-11 1982-05-22 Fujitsu Ltd Tlb control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5782269A (en) * 1980-11-11 1982-05-22 Fujitsu Ltd Tlb control system

Also Published As

Publication number Publication date
JPS6341102B2 (enrdf_load_stackoverflow) 1988-08-15

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees