JPS60114568A - Magnetron sputtering device - Google Patents
Magnetron sputtering deviceInfo
- Publication number
- JPS60114568A JPS60114568A JP22101283A JP22101283A JPS60114568A JP S60114568 A JPS60114568 A JP S60114568A JP 22101283 A JP22101283 A JP 22101283A JP 22101283 A JP22101283 A JP 22101283A JP S60114568 A JPS60114568 A JP S60114568A
- Authority
- JP
- Japan
- Prior art keywords
- target
- semiconductor substrate
- sputtering
- magnetron sputtering
- chambers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3402—Gas-filled discharge tubes operating with cathodic sputtering using supplementary magnetic fields
- H01J37/3405—Magnetron sputtering
- H01J37/3408—Planar magnetron sputtering
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Physical Vapour Deposition (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】
(夕)0発明の技術分野
半導体装置の配線金属膜や絶縁膜の被着等に用いられる
マグネトロン・スパッタ装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Evening) Technical Field of the Invention The present invention relates to a magnetron sputtering apparatus used for depositing wiring metal films and insulating films in semiconductor devices.
圀、技術の背景
半導体装置の配線金属膜や絶縁膜の被着には、現状では
主とし゛ζマグネトロン・スパック法が用いられている
。いよ第1図にその原理図を示す。BACKGROUND OF THE INVENTION Currently, the ζ magnetron spuck method is mainly used to deposit wiring metal films and insulating films in semiconductor devices. Figure 1 shows the principle diagram.
図で1は銅よりなるターゲノ1−の支詩板でマイナスの
電位が′うえられている。2は被着しようとする+A
14よりなるターゲット、3ばクーゲットと支14板を
蛸イ1りする単口Jで両方の材料になじみのよい複合層
でできている。4はマグネットのN極で直径dの円柱状
をなし、ヨークまたは支詩板を介してターリ゛ノドの中
火に配置される。5はマグ不ノ1−のS極てN極の周り
に直径りのリング状に配置される。図中N極よりS極へ
向かう矢印は磁力線を71<シている。(jはスパッタ
股を被着しよ・)とする1′導体基扱、7は216専体
h(扱を載せる電極で接地される。 この系に〜5・1
O−3Torr になるようアルゴン(^r)を導入後
電界を印加すると、八rはi九++してアルゴン・イオ
ン(^r”)を生ずる。In the figure, 1 is the target plate made of copper and has a negative potential applied to it. 2 is trying to adhere +A
It is a single-mouth J with a target consisting of 14 pieces, a 3-piece cooget and a 14-piece support plate, and is made of a composite layer that is compatible with both materials. 4 is the north pole of the magnet, which has a cylindrical shape with a diameter of d, and is placed in the middle of the turntable via a yoke or support plate. 5 is arranged in a ring shape with a diameter around the S and N poles of the magnet 1-. In the figure, the arrow pointing from the N pole to the S pole indicates the lines of magnetic force by 71<. (j is the sputtered crotch.) 1' is treated as a conductor base, and 7 is grounded with the electrode on which the 216 dedicated h (handled) is placed. In this system ~5・1
When argon (^r) is introduced so as to become O-3 Torr and an electric field is applied, 8r changes to i9++ and generates argon ions (^r'').
マイ−ノースにバイアスされたターゲノ1〜の構成物質
はAr+に叩かれて/IWび出し半導体基板上に堆積す
る。マグネトロン・スパッタ法は2111rJの電極よ
りなるダイオード・スパッタ法において、磁界をか4J
イオン濃度を」二げ被着レートを+r(J< シたもの
である。図でAr+は電界と磁界によって生した力によ
りターゲソ1−に引き(=Jりられてこの部分の密度が
濃くなり、クーゲットは点線のように局部的に消耗しそ
の使用効率は極めて悪い。The constituent materials of target No. 1~ biased toward my-north are struck by Ar+ and are deposited on the semiconductor substrate by protruding /IW. Magnetron sputtering is a diode sputtering method consisting of a 2111 rJ electrode, with a magnetic field of 4 J.
The ion concentration is increased by +r (J<). In the figure, Ar+ is pulled towards the target by the force generated by the electric and magnetic fields (=J), and the density in this area increases. , the couget is locally consumed as shown by the dotted line, and its usage efficiency is extremely low.
最近は半導体装置、特にダイナミック・ランダム・アク
セス・メモリにおいて配線祠オ′−1に僅かに含まれる
不純物より放出されるα線により記憶情報が損なわれる
所SWソフ1−エラーを防くためターゲットに用いられ
る配線材料は1月1純度に精製するため高価であり、ま
た製造ラインはイン・ライン化されているため頻繁にタ
ーゲノ1−の交換はできない。このためターゲットの有
効利用が望まれるようになった。Recently, in semiconductor devices, especially dynamic random access memories, where stored information is damaged by alpha rays emitted from a small amount of impurity contained in wiring holes, SW software has been targeted to prevent errors. The wiring material used is expensive because it is purified to a purity of 1/1, and the production line is in-line, so frequent replacement of the target material is not possible. For this reason, effective use of targets has become desirable.
ターゲット交換頻度を少なくするため、ターゲットの板
厚を厚(する方向が1つの有効な対策であるが、この場
合ターゲソ1−の使用開始時と使用途中とではターゲノ
1−の形状が前述のように極めて異なるため、処理すべ
きウェハ上の膜厚分布が使用中に徐々に変動し、途中で
規格から外れてしまう。このため膜厚を厚くすることは
有効ではない。In order to reduce the frequency of target replacement, one effective measure is to increase the plate thickness of the target. Since the film thickness is extremely different, the film thickness distribution on the wafer to be processed gradually changes during use and deviates from the standard midway through use.For this reason, increasing the film thickness is not effective.
(廁、従来技術と問題点
マグネ1−ロン・スパッタ法で、ターゲノ1−の使用効
率を上げる従来装置としてマグネノー・をターゲットの
中心より偏心さ〜Uて回転する方法がある。(Regarding Prior Art and Problems) In the magnetron sputtering method, there is a method of rotating the magneto eccentrically from the center of the target as a conventional device for increasing the usage efficiency of the target.
この場合は第2図の点線に示されるようにターケソI−
の消耗部分は広(なるがこれでも50%位しか使えない
。In this case, as shown by the dotted line in FIG.
The consumable part is wide (but even this can only be used by about 50%.
(4)0発明の目的
本発明の目的は従来技術の有する上記の欠点を除去し、
マグネノー・かターゲットに平行な平面上を移動するよ
うにし、ターケントの使用効率を100%近くにできる
ことを特徴とするマグネトロン・スパック装置を提供す
ることにある。(4)0Object of the invention The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art,
An object of the present invention is to provide a magnetron spacing device which is characterized in that the magnetron can be moved on a plane parallel to a target and that the utilization efficiency of tarkent can be nearly 100%.
(5)1発明の構成
上記の目的は本発明によれば、マグネノ1−がターゲッ
トニ平行に移動するようにしたことを特徴とするマグネ
I・ロン・スパッタ装置を提供することによって達成さ
れる。(5) 1 Structure of the Invention According to the present invention, the above object is achieved by providing a magnetron sputtering apparatus characterized in that the magnetron 1 moves parallel to the target. .
ダ
(6)1発明の実施例
第3図は本発明の実施例を示す。図は本発明に係るスパ
ッタ方法を説明する平面図であって、第1図と同一番冒
ば同一対象を示す。図において長円形のマグネノl−4
,5がクーゲットに平行な平面十を左右に往IM運動し
てターゲット上を掃引するごとによりクーゲノ1−の使
用効率を上げるものである。D(6)1 Embodiment of the Invention FIG. 3 shows an embodiment of the invention. The figure is a plan view illustrating the sputtering method according to the present invention, and shows the same object as in FIG. In the figure, the oval Magneno l-4
, 5 move left and right on a plane parallel to the Kuget and sweep over the target, thereby increasing the usage efficiency of the Kugeno 1-.
実際の装置内の配置は、塵埃のイ」着を防止するためタ
ーゲノ1も半導体基板も垂直に設りられる。In actual arrangement within the apparatus, both the target node 1 and the semiconductor substrate are vertically arranged to prevent dust from adhering to the target.
スパッタ室の両側にはロード・ロック機構の予備室を設
りてl0=Tor+以下に排気する。半導体基板はこの
]’ friii室を通して出入りする。Preliminary chambers with a load-lock mechanism are provided on both sides of the sputtering chamber and are evacuated to below l0=Tor+. The semiconductor substrate enters and exits through this chamber.
ターケノ1と半導体基板の距1i31Iを5〜7cmと
し電j1を450〜480Vに保って電力を6〜7に智
17えると)′ルミニウム1μIn被着するのに約1分
かかる。ここごはスパッタ室の圧力を2〜7・10−”
l’or+にし、ターケノ1−の人きさは8″φのもの
3!月1 い ノこ 。Assuming that the distance 1i31I between the turntable 1 and the semiconductor substrate is 5 to 7 cm, the voltage j1 is maintained at 450 to 480 V, and the electric power is set to 6 to 7), it takes about 1 minute to deposit 1 μIn of aluminum. Here, the pressure in the sputtering chamber should be set to 2 to 7.10-"
Make it l'or+, and the humanity of Tarkeno 1- is 8″φ3!Month 1 Inoko.
マク不71’1m引の場合の、半導体基板上に被着さ(
1,るスパッタ膜のIIA FX分布はマグネットの位
置にり1応−Jるターゲット部分より叩き出されたター
リ“)1物質の’41+’t−r−が半導体基板に入射
する入射角の余弦成分を積分してめられる。もし等速で
マク2j′、ノlを掃引するとターゲノ1の中央部で厚
く左11の周辺部°ζ)ずくなる。膜厚分布を補正する
手段としてつきのような方法がある。In the case of a 1m extension, the film is deposited on the semiconductor substrate (
1. The IIA FX distribution of a sputtered film is determined by the cosine of the incident angle at which the '41+'t-r- of a substance ejected from the target part at the position of the magnet is incident on the semiconductor substrate. The components can be integrated and calculated.If the components are swept at a constant speed, the center of the target no. 1 will be thicker and the peripheral portion of the left no. There is a way.
(a)、掃引速度を中央部で速< 、V8辺部で遅くす
る。(a) The sweep speed is set to be faster at the center and slower at the V8 side.
(b)、投入電力のプログラムを、掃引マグネノ1−が
中央部を通過するときに低く周辺部で高くず心ようにす
る。(b) The input power is programmed so that it is low when the sweep magneno 1- passes through the center and not high at the periphery.
(a)の方法では機構的に制御するため装置が大型化さ
れ複雑になるが、(blの方法では一度条件を設定する
とあとは作業性もよ< igi単に制御゛ζきる利点が
ある。Method (a) requires mechanical control, which makes the device larger and more complicated; however, method (bl) has the advantage that once the conditions are set, the workability can be easily controlled.
何故なら、ターゲットは面内ではほぼ平面状に消費され
るため使用開始時と使用途中ではつ」−ハとの距離が全
体的に増加するだiJであるので、ウェハの膜厚分布は
均一である。This is because the target is consumed almost flat within the plane, so the distance from the target increases overall between the beginning and the middle of use, so the film thickness distribution on the wafer is not uniform. be.
(yll、発明の効果
以上群11[1に説明した様に本発明によれは、マグネ
ットがターゲノ1−に平行な平面」−4を移動するごと
により、ターゲットの使用効率を100%退くにできる
ことを特徴とするマグネl ■:+ン・スパッタ装置を
提供することができる。(yll, Effects of the Invention As explained in Group 11 [1), according to the present invention, the use efficiency of the target can be reduced by 100% every time the magnet moves in the plane parallel to the target 1-4. It is possible to provide a magnetic sputtering apparatus characterized by:
4、図+lii ノffri ili す3’A 門弟
1図は従来のマグネ1−ロン・スパッタ装置の1す1而
図、第2図はマクネットを偏心回転さ−Uた場合にコ・
tりるターゲットの消耗の様子を示す断面図、第13図
は本発明に係るスパッタ装置を説明する平面図を小“J
o
1ソIにおいて1はターゲットの支持板、2はターゲッ
ト、J3はターゲットと支(h扱を蝮伺りする半111
.4はマグネノ1−のN極、5はマクネットのS極、(
jは半導体基板、7は極板を月くず。4. Figure 1 is a diagram of a conventional magnetron sputtering device, and Figure 2 is a diagram of a conventional magnetron sputtering device.
FIG. 13 is a cross-sectional view showing how the target wears out over time, and FIG.
o In 1 So I, 1 is the support plate of the target, 2 is the target, J3 is the target and the support plate (111
.. 4 is the N pole of Magneno 1-, 5 is the S pole of Magnet, (
j is the semiconductor substrate, and 7 is the electrode plate made of moon scraps.
栂 4Toga 4
Claims (1)
とを特徴とするマグネトロン・スパッタ装置。A magnetron sputtering device characterized by a magnet moving parallel to a target.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22101283A JPS60114568A (en) | 1983-11-24 | 1983-11-24 | Magnetron sputtering device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22101283A JPS60114568A (en) | 1983-11-24 | 1983-11-24 | Magnetron sputtering device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60114568A true JPS60114568A (en) | 1985-06-21 |
Family
ID=16760090
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22101283A Pending JPS60114568A (en) | 1983-11-24 | 1983-11-24 | Magnetron sputtering device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60114568A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01240652A (en) * | 1988-03-22 | 1989-09-26 | Asahi Chem Ind Co Ltd | Sputtering cathode |
JPH03202464A (en) * | 1989-12-29 | 1991-09-04 | Shin Meiwa Ind Co Ltd | Sputtering electrode device |
JPH05239640A (en) * | 1991-08-02 | 1993-09-17 | Anelva Corp | Sputtering device |
-
1983
- 1983-11-24 JP JP22101283A patent/JPS60114568A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01240652A (en) * | 1988-03-22 | 1989-09-26 | Asahi Chem Ind Co Ltd | Sputtering cathode |
JPH03202464A (en) * | 1989-12-29 | 1991-09-04 | Shin Meiwa Ind Co Ltd | Sputtering electrode device |
JPH05239640A (en) * | 1991-08-02 | 1993-09-17 | Anelva Corp | Sputtering device |
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