JPH01132762A - Method and device for sputtering - Google Patents

Method and device for sputtering

Info

Publication number
JPH01132762A
JPH01132762A JP29252387A JP29252387A JPH01132762A JP H01132762 A JPH01132762 A JP H01132762A JP 29252387 A JP29252387 A JP 29252387A JP 29252387 A JP29252387 A JP 29252387A JP H01132762 A JPH01132762 A JP H01132762A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
wafer
sides
faces
targets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29252387A
Other languages
Japanese (ja)
Inventor
Yasuhisa Sato
泰久 佐藤
Naoki Yamada
直樹 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Priority to JP29252387A priority Critical patent/JPH01132762A/en
Publication of JPH01132762A publication Critical patent/JPH01132762A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the camber of a semiconductor wafer after formation of sputtered films by sticking constituting atoms of the same kind simultaneously under the same conditions to both faces of the semiconductor wafer. CONSTITUTION:The semiconductor wafer 3 is grasped by fixing means 10, 10' in a vacuum chamber 1 so that the position of the wafer 3 is fixed and the electrical conduction thereof is assured. Two pieces of targets 11 are disposed to face each other on both sides of the wafer 3 in parallel in the positions equidisant on both sides and respectively two sets of magnet systems 12 are disposed in proximity to the respective rear faces of the targets 1 in such a positional relation where the magnet systems repulse magnetically to each other. The metal atoms of the targets 11 stick independently on both faces of the wafer 3 as a result of the sputtering. Since the films are formed under the same conditions for both faces, the internal stresses generated in the films are the same on both faces. The generation of the camber in the water 3 after the film formation is, therefore, obviated.

Description

【発明の詳細な説明】 〔概 要〕 半導体ウェハ表面にターゲット電極の構成原子を付着さ
せるスパッタ方法に関し、 半導体ウヱハの反りの抑制を目的とし、不活性ガスの真
空雰囲気中でターゲット電極と半導体ウェハの間に高電
圧を印加し、半導体ウェハ表面にターゲット電極の構成
原子を付着させるスパッタ方法において、両面を露出さ
せて保持した半導体ウェハの両面に同時にしかも同条件
で同種類の構成原子を付着させて構成する。
[Detailed Description of the Invention] [Summary] Regarding a sputtering method for attaching constituent atoms of a target electrode to the surface of a semiconductor wafer, the target electrode and the semiconductor wafer are attached in a vacuum atmosphere of an inert gas with the aim of suppressing warping of the semiconductor wafer. In the sputtering method, the constituent atoms of the target electrode are attached to the surface of the semiconductor wafer by applying a high voltage between the two sides, and the constituent atoms of the same type are attached simultaneously and under the same conditions to both sides of the semiconductor wafer, which is held with both sides exposed. Configure.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体ウェハ表面にターゲット電極の構成原子
を付着させるスパッタ装置に係り、特に半導体ウェハの
反りの抑制を図ったスパッタ装置に関する。
The present invention relates to a sputtering apparatus for attaching atoms constituting a target electrode to the surface of a semiconductor wafer, and more particularly to a sputtering apparatus designed to suppress warpage of the semiconductor wafer.

一般に半導体ウェハの片面に被膜を形成する通常のスパ
ッタリング法で、該半導体ウェハの片面にタングステン
(−)やアルミニウム(A / )等の金属原子を付着
させる場合には、タングステン(−)やアルミニウム(
A / )等付着させたい金属よりなるターゲット電極
の表面に例えばアルゴンガスの如き不活性ガスのプラズ
マイオンを衝突させ、そのエネルギで該ターゲット電極
表面から金属原子を叩き出して、上記半導体ウェハの片
面に該金属原子の被膜を形成させている。
In general, when metal atoms such as tungsten (-) or aluminum (A/) are attached to one side of the semiconductor wafer using the normal sputtering method that forms a film on one side of the semiconductor wafer, tungsten (-) or aluminum (
Plasma ions of an inert gas such as argon gas are collided with the surface of a target electrode made of a metal to be deposited, and the energy is used to knock out metal atoms from the surface of the target electrode, thereby depositing one side of the semiconductor wafer. A film of the metal atoms is formed on the metal atoms.

この場合上記半導体ウェハの片面に形成される被膜は必
ずしも均一に形成されず、被膜自身に多少とも引張や圧
縮等のストレスが内在することから、ウェハの厚さが薄
いこととあいまって、被膜形成後の上記半導体ウェハに
反りを生ずる。
In this case, the coating formed on one side of the semiconductor wafer is not necessarily uniform, and the coating itself has some inherent stress such as tension or compression. This causes warpage in the subsequent semiconductor wafer.

従ってウェハとしての反りをできるだけ小さくするため
に、従来はターゲット電極にかける電流・電圧やアルゴ
ンガスの圧力等を予め設定した最適条件に合わせてスパ
ッタリング作業を実施し、被膜自身が持つストレスの解
消を図っている。
Therefore, in order to minimize the warpage of the wafer, conventionally the sputtering process was carried out by adjusting the current and voltage applied to the target electrode, the pressure of argon gas, etc. to optimal conditions set in advance, thereby relieving the stress of the film itself. I'm trying.

しかし半導体ウェハ上のパターンの微細化やウェハサイ
ズの大径化につれて、ウェハの僅かな反りが無視できな
くなって来ていると共に、一部の金属特にタングステン
(阿)等の場合はターゲット電極に印加する電流・電圧
やアルゴンガスの圧力等による上記被膜内在ストレスの
制御が難しく、被膜形成後のウェハに発生する反りが大
きくなる場合が多いことからその解決が望まれている。
However, as the patterns on semiconductor wafers become finer and the wafer size becomes larger, slight warping of the wafer can no longer be ignored, and some metals, especially tungsten (alpha), It is difficult to control the stress inherent in the film by controlling current and voltage, argon gas pressure, etc., and the warping that occurs on the wafer after the film is formed often becomes large, so a solution to this problem is desired.

〔従来の技術〕[Conventional technology]

第2図は従来のスパッタ装置主要部の構成例を示す図で
ある。
FIG. 2 is a diagram showing an example of the configuration of the main parts of a conventional sputtering apparatus.

図で真空チャンバlは真空ポンプ2によって10−3〜
1O−ITorr程度の真空度が保たれており、該真空
チャンバl内は予め設定された圧力になるようにパイプ
1aから送り込まれたアルゴンガスで満たされている。
In the figure, the vacuum chamber l is 10-3 to 10-3 by the vacuum pump 2.
A degree of vacuum of about 1 O-ITorr is maintained, and the inside of the vacuum chamber 1 is filled with argon gas sent from the pipe 1a to a preset pressure.

また厚さ500〜600μm程度の半導体ウェハ3は被
膜形成面が露出するように、電気的にアースに落とされ
ている基台4上に電気的導通を保って載置されている。
Further, a semiconductor wafer 3 having a thickness of about 500 to 600 μm is placed on a base 4 electrically grounded to maintain electrical continuity so that the surface on which the film is formed is exposed.

ターゲット5は半導体ウェハ3上に形成する所要のタン
グステン膜と同じ材料のタングステンよりなり、該半導
体ウェハ3と対応する位置に対面して平行に配設されて
いる。尚電位的には外部電源6によって基台4ひいては
半導体ウェハ3に対して負に構成しである。
The target 5 is made of tungsten, which is the same material as the required tungsten film to be formed on the semiconductor wafer 3, and is disposed in parallel and facing the semiconductor wafer 3 at a position corresponding to the target. In terms of potential, the external power source 6 is configured to have a negative potential with respect to the base 4 and, in turn, the semiconductor wafer 3.

また該ターゲット5の背面に近接して、二組の磁石系7
が相互に磁力的に反撥するような位置関係で配置されて
いる。
In addition, two sets of magnet systems 7 are installed adjacent to the back surface of the target 5.
are arranged in such a positional relationship that they magnetically repel each other.

かかる構成になるスパッタ装置では、真空チャンバ1内
に存在するプラズマ状のアルゴンガスが磁石系7の磁界
内に閉じ込められるために、アルゴンガスのプラズマイ
オン(図示oAr三)が効率よ(ターゲット5の表面に
衝突し、その際発生するエネルギによって叩き出された
金属原子が図示点線矢印の如く対向する半導体ウェハ3
の表面に効率よく到達する。
In the sputtering apparatus having such a configuration, the plasma-like argon gas existing in the vacuum chamber 1 is confined within the magnetic field of the magnet system 7, so that the plasma ions of the argon gas (oAr 3 in the figure) are efficiently released (on the target 5). Semiconductor wafer 3 where metal atoms that collide with the surface and are ejected by the energy generated face each other as indicated by dotted arrows in the figure.
efficiently reach the surface.

従って、ターゲット5に印加する電流と電圧およびパイ
プ1aから送り込むアルゴンガスの圧力を予め設定した
条件に合わせて厚さ2000〜4000人のタングステ
ン膜を該半導体ウェハ3の表面に形成している。
Therefore, a tungsten film with a thickness of 2,000 to 4,000 thick is formed on the surface of the semiconductor wafer 3 by adjusting the current and voltage applied to the target 5 and the pressure of argon gas sent from the pipe 1a to preset conditions.

面このときのウェハの反りは、ウェハサイズ6pの場合
で直径方向で200μm以下に抑えることが可能である
The warpage of the wafer at this time can be suppressed to 200 μm or less in the diameter direction when the wafer size is 6p.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の方法では、半導体ウェハの厚さが薄いことと被膜
形成が半導体ウェハの片面のみであるためウェハとして
の反りを完全になくすことができず、ターゲットに印加
する電流と電圧および真空チャンバに送り込むアルゴン
ガスの圧力等を最適条件に設定することによって被膜自
身の内部ストレスをできるだけ小さくし、被膜形成後の
ウェハの反りを最小に抑えることで対処している。
With conventional methods, it is not possible to completely eliminate warping of the wafer because the thickness of the semiconductor wafer is thin and the film is only formed on one side of the semiconductor wafer. By setting the argon gas pressure and other conditions to optimal conditions, the internal stress of the coating itself is minimized, and the warping of the wafer after the coating is formed is minimized.

しかし技術の進展に伴う半導体ウェハ上のパターンの微
細化やウェハサイズの大径化は各部寸法精度の向上を要
求しており、従来許容されていたウェハの反りが無視で
きない場合が生ずると云う問題があった。
However, as technology progresses, the patterns on semiconductor wafers become finer and the wafer size increases, requiring improvements in the dimensional accuracy of each part, resulting in the problem that wafer warpage, which was previously allowed, may no longer be ignored. was there.

〔問題点を解決するための手段〕 上記問題点は、不活性ガスの真空雰囲気中でターゲット
電極と半導体ウェハの間に高電圧を印加し、半導体ウェ
ハ表面にターゲット電極の構成原子を付着させるスパッ
タ方法において、両面を露出させて葆持した半導体ウェ
ハの両面に同時にしかも同条件で同種類の構成原子を付
着させてなるスパッタ方法によって解決される。
[Means for solving the problem] The above problem is solved by sputtering, which applies a high voltage between the target electrode and the semiconductor wafer in a vacuum atmosphere of inert gas, and attaches constituent atoms of the target electrode to the semiconductor wafer surface. This problem is solved by a sputtering method in which constituent atoms of the same type are deposited simultaneously and under the same conditions on both sides of a semiconductor wafer which is held with both sides exposed.

〔作 用〕[For production]

本発明になるスパッタ装置では、半導体ウェハの両面に
同種類の被膜を同時にしかも同じ厚さに被着形成させて
いる。
In the sputtering apparatus of the present invention, the same type of film is simultaneously deposited on both sides of a semiconductor wafer and has the same thickness.

従ってウェハの両面に全く同じ条件の被膜を形成するこ
とになるため、被膜に内部ストレスが生じても両波膜間
にストレス差がないため被膜形成後の半導体ウェハに反
りが生ずることがない。
Therefore, since coatings under exactly the same conditions are formed on both sides of the wafer, even if internal stress occurs in the coating, there is no stress difference between the two films, so that the semiconductor wafer after the coating is formed will not warp.

〔実施例〕〔Example〕

第1図は本発明になるスパッタ装置主要部の構成例を示
す図であり、(A)はウェハの片面に二組づつ計四組の
磁石系を備えた場合をまた(B)は全体を一組の磁石系
で構成した他の実施例を示している。
FIG. 1 is a diagram showing an example of the configuration of the main part of the sputtering apparatus according to the present invention, in which (A) shows a case in which four sets of magnet systems, two sets on each side of a wafer, and (B) shows the entire structure. Another embodiment is shown that is constructed with a set of magnet systems.

第1図(A)で真空チャンバlが真空ポンプ2によって
10−3〜l0−ITorr程度の真空度が保たれ且つ
該真空チャンバl内がバイブ1aから注入する規定圧力
のアルゴンガスによって満たされていることは第2図記
載の通りである。
In FIG. 1(A), a vacuum chamber 1 is maintained at a vacuum level of about 10-3 to 10-ITorr by a vacuum pump 2, and is filled with argon gas at a specified pressure injected from a vibrator 1a. This is as shown in Figure 2.

また3は第2図同様の半導体ウェハであり、電気的にア
ースに落とした上下二個よりなる固定具10.10’に
よって電気的導通を保ちながら両面が露出するように挟
持固定されている。この場合、半導体ウェハ3は固定具
に対して着脱が容易であると共に装着時に傾きがあって
はならず而も上記の如く電気的導通を保つ必要があるこ
とから、固定具10には田園(11の如く半導体ウェハ
3の厚さとほぼ同じ底幅を持つ梯形状の溝10aを設け
、また固定具io ’ Aこは田園(2)の如く断面が
上記溝10aと同じで長さの短い溝10′aを設けてい
る。従って円形状の半導体ウェハ3をかかる溝を有する
固定具10.10’で図示点線の如く挟持して該ウェハ
3の位置の確定と電気的導通を確保している。
Reference numeral 3 designates a semiconductor wafer similar to that shown in FIG. 2, which is clamped and fixed by two fixtures 10 and 10', top and bottom electrically grounded, so that both surfaces are exposed while maintaining electrical continuity. In this case, the semiconductor wafer 3 must be easily attached to and removed from the fixture, must not be tilted when attached, and must maintain electrical continuity as described above. A ladder-shaped groove 10a having a bottom width approximately equal to the thickness of the semiconductor wafer 3 as shown in 11 is provided, and a groove having a short length and the same cross section as the groove 10a described above is provided as shown in FIG. Therefore, the circular semiconductor wafer 3 is held between the fixtures 10 and 10' having such grooves as shown by the dotted lines in the figure to ensure the position of the wafer 3 and electrical continuity. .

更にタングステン(−)よりなる二個のターゲット11
を、半導体ウェハ3を挟んだ両側等間隔の位置に平行に
且つ対向して配設している。尚電位的には第2図同様に
外部電源6によって半導体ウェハ3に対して負になる如
く構成している。
Furthermore, two targets 11 made of tungsten (-)
are arranged in parallel and facing each other at equal intervals on both sides of the semiconductor wafer 3. Note that the potential is configured to be negative with respect to the semiconductor wafer 3 by the external power supply 6 as in FIG.

また半導体ウェハ3に対向する上記ターゲット11それ
ぞれの背面に近接して、各二組の磁石系12を相互に磁
力的に反撥するような位置関係で配置している。
Further, two sets of magnet systems 12 are arranged in close proximity to the back surfaces of the targets 11 facing the semiconductor wafer 3 in such a positional relationship that they magnetically repel each other.

かかる構成になるスパッタ装置では、半導体ウェハ3の
両面それぞれが独立して第2図で説明した如くにターゲ
ット11の金属原子が対向するウェハ表面に図示点線矢
印の如く付着するが、両面共全く同じ条件のもとて被膜
を形成するため被膜に発生する内部ストレスは両面共全
く同じである。
In the sputtering apparatus having such a configuration, the metal atoms of the target 11 adhere to the opposing wafer surface independently as shown in the dotted line arrows on each side of the semiconductor wafer 3 as explained in FIG. Since the film is formed under certain conditions, the internal stress generated in the film is exactly the same on both sides.

従ってウェハ両面にストレスの差が発生せず被膜形成後
もウェハに反りを生ずることがない。
Therefore, no difference in stress occurs between both sides of the wafer, and the wafer does not warp even after the coating is formed.

また第1図(B)では、図(A)と同様に真空チャンバ
l内に配設したタングステン(欝)よりなる二個のター
ゲット11それぞれの背面に近接して、ターゲット11
ひいては半導体ウェハ3をカバーするに足りる大きさを
有する二個の磁石13を配置したもので、二個の該磁石
13は磁力的に互いに吸引するように磁極を対向させた
状態でそれぞれのターゲットの背後に配設している。
In addition, in FIG. 1(B), similar to FIG. 1(A), two targets 11 made of tungsten are arranged in the vacuum chamber 1, and the target 11
Furthermore, two magnets 13 having a size sufficient to cover the semiconductor wafer 3 are arranged, and the two magnets 13 are arranged so that their magnetic poles face each other so that they are magnetically attracted to each other. It is placed at the back.

かかる構成になるスパッタ装置では、図(^)における
説明と同様に半導体ウェハ3の両面それぞれが独立した
状態のまま、ターゲット11の金属原子が対向するウェ
ハ表面に図示点線矢印の如く付着するが、この場合は二
個の磁石13によって発生する磁力線と該半導体ウェハ
3とが直交しているためターゲット11から叩き出され
た金属原子は加速した状態でウェハ表面に付着する。
In a sputtering apparatus having such a configuration, the metal atoms of the target 11 adhere to the opposing wafer surface as indicated by the dotted arrows in the figure, while both surfaces of the semiconductor wafer 3 remain independent, as described in FIG. In this case, since the lines of magnetic force generated by the two magnets 13 and the semiconductor wafer 3 are perpendicular to each other, the metal atoms ejected from the target 11 adhere to the wafer surface in an accelerated state.

しかしこの場合も図(A)と同様に同じ条件のもとで被
膜が形成されるため被膜に発生する内部ストレスは両面
共全く同じであり、被膜形成後もウェハに反りを生ずる
ことがない。
However, in this case as well, the coating is formed under the same conditions as in Figure (A), so the internal stress generated in the coating is exactly the same on both sides, and the wafer does not warp even after the coating is formed.

〔発明の効果〕〔Effect of the invention〕

上述の如く本発明の実施により、ターゲットに印加する
電流、電圧やアルゴンガス等不活性ガスの圧力等を厳密
に制御することな(、被膜形成後の半導体ウェハに反り
の発生しないスパッタ装置を提供することができる。
As described above, by implementing the present invention, it is possible to provide a sputtering apparatus that does not require strict control of the current and voltage applied to the target, the pressure of inert gas such as argon gas, etc., and does not cause warping of semiconductor wafers after film formation. can do.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明になるスパッタ装置主要部の構成例を示
す図、 第2図は従来のスパッタ装置主要部の構成例を示す図、 である。図において、 lは真空チャンバ、  1aはパイプ、2は真空ポンプ
、    3は半導体ウェハ、6は外部電源、 10.10’は固定具、  11はターゲット、12は
磁石系、     13は磁石、をそれぞれ表わす。 (B)
FIG. 1 is a diagram showing an example of the configuration of the main part of a sputtering apparatus according to the present invention, and FIG. 2 is a diagram showing an example of the configuration of the main part of a conventional sputtering apparatus. In the figure, l is a vacuum chamber, 1a is a pipe, 2 is a vacuum pump, 3 is a semiconductor wafer, 6 is an external power supply, 10.10' is a fixture, 11 is a target, 12 is a magnet system, and 13 is a magnet. represent. (B)

Claims (2)

【特許請求の範囲】[Claims] (1)不活性ガスの真空雰囲気中でターゲット電極と半
導体ウェハの間に高電圧を印加し、半導体ウェハ表面に
ターゲット電極の構成原子を付着させるスパッタ方法に
おいて、 両面を露出させて保持した半導体ウェハの両面に同時に
しかも同条件で同種類の構成原子を付着させてなること
を特徴とするスパッタ方法。
(1) A semiconductor wafer held with both sides exposed in a sputtering method in which atoms constituting the target electrode are attached to the surface of the semiconductor wafer by applying a high voltage between the target electrode and the semiconductor wafer in an inert gas vacuum atmosphere. A sputtering method characterized in that constituent atoms of the same type are deposited on both sides of the substrate at the same time and under the same conditions.
(2)不活性ガスの真空雰囲気中でターゲット電極と半
導体ウェハの間に高電圧を印加し、半導体ウェハ表面に
ターゲット電極の構成原子を付着させるスパッタ装置に
おいて、 両面を露出させて保持した半導体ウェハの両面ほぼ等間
隔の位置に、平行して対向する如くに2個のターゲット
電極を配設してなることを特徴とするスパッタ装置。
(2) A semiconductor wafer held with both sides exposed in a sputtering device that applies a high voltage between the target electrode and the semiconductor wafer in an inert gas vacuum atmosphere to attach constituent atoms of the target electrode to the semiconductor wafer surface. A sputtering apparatus characterized in that two target electrodes are disposed at approximately equal intervals on both sides of the screen so as to face each other in parallel.
JP29252387A 1987-11-19 1987-11-19 Method and device for sputtering Pending JPH01132762A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29252387A JPH01132762A (en) 1987-11-19 1987-11-19 Method and device for sputtering

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29252387A JPH01132762A (en) 1987-11-19 1987-11-19 Method and device for sputtering

Publications (1)

Publication Number Publication Date
JPH01132762A true JPH01132762A (en) 1989-05-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP29252387A Pending JPH01132762A (en) 1987-11-19 1987-11-19 Method and device for sputtering

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006131973A (en) * 2004-11-08 2006-05-25 Shincron:Kk Thin-film-forming method and thin-film-forming apparatus
JP2011102436A (en) * 2010-12-24 2011-05-26 Shincron:Kk Thin film deposition method and thin film deposition system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006131973A (en) * 2004-11-08 2006-05-25 Shincron:Kk Thin-film-forming method and thin-film-forming apparatus
JP2011102436A (en) * 2010-12-24 2011-05-26 Shincron:Kk Thin film deposition method and thin film deposition system

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