JPS6010671A - Solid state image sensor - Google Patents
Solid state image sensorInfo
- Publication number
- JPS6010671A JPS6010671A JP58118526A JP11852683A JPS6010671A JP S6010671 A JPS6010671 A JP S6010671A JP 58118526 A JP58118526 A JP 58118526A JP 11852683 A JP11852683 A JP 11852683A JP S6010671 A JPS6010671 A JP S6010671A
- Authority
- JP
- Japan
- Prior art keywords
- output
- charge
- output circuit
- junction layer
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000007787 solid Substances 0.000 title abstract 2
- 238000003384 imaging method Methods 0.000 claims description 16
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 239000000284 extract Substances 0.000 claims description 2
- 230000035945 sensitivity Effects 0.000 abstract description 12
- 239000010410 layer Substances 0.000 description 46
- 238000001514 detection method Methods 0.000 description 30
- 239000010408 film Substances 0.000 description 18
- 239000000758 substrate Substances 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000003068 static effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000005686 electrostatic field Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 241001474374 Blennius Species 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14831—Area CCD imagers
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、光電変換素子と、この光′電変換素子の信号
電荷を転送する電荷転送手段と、転送された信号電荷を
′紙圧信号としてとり出す出力回路と、入射光を遮蔽す
るとともに電気遮蔽する導１ｄ性元遮蔽膜とを具えた固
体撮像装置に関する。Detailed Description of the Invention [Technical Field of the Invention] The present invention provides a photoelectric conversion element, a charge transfer means for transferring signal charges of the photoelectric conversion element, and a method for transferring the transferred signal charges as a paper pressure signal. The present invention relates to a solid-state imaging device that includes an output circuit for extracting light and a conductive element shielding film that shields incident light and electrically shields it.
従来の固体撮像装置を第１図、第２図に示す。 A conventional solid-state imaging device is shown in FIGS. 1 and 2.
この固体撮像装置は、複数の光電変換素子１と、この光
電変換素子１の信号電荷を転送する電荷転送装置ｆ２と
、この電荷転送装置２により転送された信号電荷を出力
′電圧としてとり出す出力回路３を有しており、光電変
換素子１以外の部分は光シールド膜４で遮蔽されている
。この光シールド膜４はアルミニウム等の４電性物質の
膜として形成され、電磁シールドの役割も果たしている
。信号１荷の転送経路をできるだけ短くする必要がある
ため、出力回路３は光電変換素子１の近くに配されてい
る。このため出力回路３も元シールド膜４でおおわれて
いる。This solid-state imaging device includes a plurality of photoelectric conversion elements 1, a charge transfer device f2 that transfers signal charges of the photoelectric conversion elements 1, and an output that extracts the signal charges transferred by the charge transfer device 2 as an output voltage. It has a circuit 3, and portions other than the photoelectric conversion element 1 are shielded by a light shield film 4. This optical shield film 4 is formed as a film of a tetraelectric substance such as aluminum, and also plays the role of an electromagnetic shield. The output circuit 3 is arranged near the photoelectric conversion element 1 because it is necessary to make the transfer path of the signal 1 as short as possible. For this reason, the output circuit 3 is also covered with the original shield film 4.
この固体撮像装置の出力回路３は第２図（ａ）に示すよ
うな断面構造をしている。電荷転送装置２の転送電極８
は半導体基板５の上に酸化膜冴をはさんで形成されてい
る。出力ゲート電極７は転？５１ｉ極８に隣接して形成
され、電荷転送装置２と出力回路３との間に障壁電位を
形成する。リセット電極９は、電荷検出接合層６と所定
−位の接合層１０とを電気的に接続し、電荷検出接合層
６を所定電位にリセットするためのものである。４電ｈ
Ｍ １．１は電荷検出接合層６の電位ソースホロワ回路
の入力ゲートＪ２に接続するものである。ソースホロワ
回路は、この入力ゲート１２と、電源１氏圧に設足され
たドレイン接合層１：３と、負荷トランジスタのソース
接合層１６と、ゲー］・】５と、出力′ぼ圧をとり出す
出力接合層■４とを有している。専′醒１生の光シール
ド膜４は絶縁層２４の上をおおうようにして形成され、
基板’Ｆｔｔ圧に設定されている。The output circuit 3 of this solid-state imaging device has a cross-sectional structure as shown in FIG. 2(a). Transfer electrode 8 of charge transfer device 2
is formed on the semiconductor substrate 5 with an oxide film interposed therebetween. Does the output gate electrode 7 rotate? 51i is formed adjacent to the pole 8 to form a barrier potential between the charge transfer device 2 and the output circuit 3. The reset electrode 9 is for electrically connecting the charge detection bonding layer 6 and the bonding layer 10 at a predetermined position, and resetting the charge detection bonding layer 6 to a predetermined potential. 4 electric h
M1.1 is connected to the input gate J2 of the potential source follower circuit of the charge detection junction layer 6. The source follower circuit connects this input gate 12, the drain junction layer 1:3 installed at the power supply voltage 1 degree Celsius, the source junction layer 16 of the load transistor, the gate].]5, and takes out the output voltage. It has an output bonding layer (4). A professional light shielding film 4 is formed to cover the insulating layer 24,
The pressure of the substrate is set to 'Ftt'.
この１δ１体撮１ま装置武の電荷検出の動作を説明する
と、リセット−４勿９をオンすると第２図（ｂ）に示す
ようにリセット電極９下の電位は破線δで示すようにな
り、′ｍ荷＋６ｒ出］嬰合層６の「ｉＬ位は接曾層１０
０１位２７と同じ電位になる。リセット電極９をオフす
るとリセット醒極９下の′（５）位は破線２６で示すよ
うになり、電荷検出接合層６はフローティング状態とな
る。この状態で電荷転送装置２で転送されたｎ荷２９が
出力ゲート箪１勿７の障壁電位３０を超えて流れ込み電
荷検出接合層６の電位を実線あのように変化させる。こ
の−位変化をソースホロワ回路に入力して出力を得る。To explain the charge detection operation of this 1δ1 body imaging device, when reset 4 and 9 are turned on, the potential under the reset electrode 9 becomes as shown by the broken line δ, as shown in FIG. 2(b). 'm load + 6r output] 'iL position of interlocking layer 6 is contact layer 10
It has the same potential as 01 and 27. When the reset electrode 9 is turned off, the position '(5) below the reset electrode 9 becomes as shown by a broken line 26, and the charge detection junction layer 6 becomes in a floating state. In this state, the n-charge 29 transferred by the charge transfer device 2 flows over the barrier potential 30 of the output gate 1 and 7, causing the potential of the charge detection junction layer 6 to change as shown by the solid line. This position change is input to the source follower circuit to obtain an output.
この電荷検出接合層６のぼ位変化Ｖｓは、・１江荷検出
接合ｉ７５の有する全面−谷賦ＣＴ と転送された電荷
量９ｓ で定まり、Ｖｓ＝Ｑｓ／ＣＴであられされる。The level change Vs of the charge detection junction layer 6 is determined by the total-valley CT of the charge detection junction i75 and the amount of transferred charge 9s, and is expressed as Vs=Qs/CT.
したがって、Ｔ莢出感度を高くするためには、全静電界
４ｃ管を充分小さくする必要がある。電荷検出接合層６
の有する全静電界１ｈｔｃｔは半得体基４反５との間の
静シ谷量ＣＦｌｉと、出力ゲート１極７との間の静電容
置Ｃカと、リセット電極９との間の静電容量ｃｒｕと、
元シールド膜４との間の静・直答最ＣＦ”ｔ＋と、導電
線■１の対地容１丘２と、入力ゲート１２の対地容量Ｃ
Ｇ＋との聡和で表わされる。 １すなわち、
Ｃｔ ＝ＣＦ’Ｓ＋ＣＦＯ＋ ＣＦＲ＋Ｃｒｎ、 中Ｃ
ｒ１２＋ ＣｃｒＩ川（１）七なる。ここでＣＦＬＩと
（ＪＬ２とＣＧＩの値は大きく、このために電荷検出感
度を十分大きくすることはできなかった。また出力接合
層１４の出力）雰の対地容量ＣＬＯも大きく、等測的に
出力負荷容量が増加し周波数応答か劣化するという問題
があった。Therefore, in order to increase the T extrusion sensitivity, it is necessary to make the total electrostatic field 4c sufficiently small. Charge detection junction layer 6
The total electrostatic field 1htct possessed by is determined by the static valley amount CFli between the semiconducting substrate 4 and 5, the capacitance C between the output gate 1 pole 7, and the capacitance between the reset electrode 9. Cru and
The static direct response maximum CF"t+ between the original shielding film 4, the ground capacitance 1 hill 2 of the conductive wire 1, and the ground capacitance C of the input gate 12
It is expressed as a combination with G+. 1, that is, Ct = CF'S + CFO + CFR + Crn, medium C
r12+ CcrI River (1) Seven. Here, the values of CFLI and (JL2 and CGI) are large, so it was not possible to make the charge detection sensitivity sufficiently large.Also, the ground capacitance CLO between the output junction layer 14 and the output junction layer 14 is also large, and the output is isometrically There was a problem that the load capacity increased and the frequency response deteriorated.
（発明の目的〕
本発明は上記型′１ｋを′４１ハしてなされたもので、
′電荷検出感度が高く、周波数応答のよい固体撮像装置
を提供することを目的とする。(Object of the invention) The present invention has been made by modifying the above type '1k' to '41c',
'The purpose is to provide a solid-state imaging device with high charge detection sensitivity and good frequency response.
この目的を達成するために本発明による固体撮像装置は
、纏亀注元遮蔽膜の元酸変挨素子上の領域に開口部を設
けるとともに、出力回路上の少なくとも一部の領域に開
口部を設けることを特徴とする。In order to achieve this object, the solid-state imaging device according to the present invention provides an opening in the area above the original acid-transforming element of the cover film and an opening in at least a part of the area above the output circuit. It is characterized by providing.
本発明の第１の実施例による固体撮像装置を第３図？こ
示す。この固体撮像装置は、被数の光′電変換素子１と
、この光゛眠変侠素子１の信号電荷を転送する電荷転送
装置２と、この電荷転送装置２により転送された信号電
荷を出力電圧としてとり出す出力回路３とを有しており
、九′亀変換索子１上に開口部を有する導電性の元シー
ルド膜４でおおわれている。本実施例では出力回路３上
の領域にも光シールド膜４に開口部３０を設けている点
が特徴である。FIG. 3 shows a solid-state imaging device according to a first embodiment of the present invention. This is shown. This solid-state imaging device includes a photoelectric conversion element 1, a charge transfer device 2 that transfers signal charges of the photoelectric conversion device 1, and outputs the signal charges transferred by the charge transfer device 2. It has an output circuit 3 that outputs voltage, and is covered with a conductive original shield film 4 having an opening on the nine-tooth converter 1. This embodiment is characterized in that an opening 30 is provided in the light shield film 4 also in the region above the output circuit 3.
この出力回路３を第４図、第５図に詳細に示す。This output circuit 3 is shown in detail in FIGS. 4 and 5.
第４図はこの出力回路３の平面構成を示し、第５図は断
面構成を示す。たた゛し第５図の断面構成は本実施例を
理解しやすくするため変形しであり、実際の断面とは少
し異なるところがある。本来流側の出力回路３は、フロ
ーテインク接合型の電荷検出回路と、２段構成のソース
ホロワ回路とからなっている。出力ゲート′電極７は転
送電極８に隣接して形成され障壁電位を形成する。リセ
ット電極９は、電荷検出接合層６と所定電位の接合層１
゜とを電気的に接続し、電荷検出接合層６を所定電位に
リセットするためのものである。導電線１１は′電荷検
出接合層６の電位をソースホロワ回路の入力ゲート１．
２に接続するものである。ソースホロワ回路は、２段構
成である。第１段目のソースホロワ回路は、ドレイン接
合層１０と、入力ゲート２と、出力接合層１４と、負荷
トランジスタのソース接合層３２とゲート３１とでｉＪ
’ｉ’成され−こおり、第２段目のソースホロワ回路は
、ドレイン接合層１０と、入力ゲート３４と、出力１妾
合層３５と、負荷トランジスタのソース接合層；３２と
ゲート：３１とでＦｆｉ成されている。FIG. 4 shows a planar configuration of this output circuit 3, and FIG. 5 shows a cross-sectional configuration. However, the cross-sectional configuration in FIG. 5 has been modified to make it easier to understand this embodiment, and there are some differences from the actual cross-section. The output circuit 3 on the original flow side consists of a floating ink junction type charge detection circuit and a two-stage source follower circuit. The output gate' electrode 7 is formed adjacent to the transfer electrode 8 and forms a barrier potential. The reset electrode 9 connects the charge detection junction layer 6 and the junction layer 1 at a predetermined potential.
This is for electrically connecting the two electrodes and resetting the charge detection junction layer 6 to a predetermined potential. The conductive line 11 connects the potential of the charge detection junction layer 6 to the input gate 1. of the source follower circuit.
2. The source follower circuit has a two-stage configuration. The first stage source follower circuit has an iJ
The second stage source follower circuit consists of the drain junction layer 10, the input gate 34, the output 1 coupling layer 35, the source junction layer 32 of the load transistor, and the gate 31. Ffi is made.
第１段目のソースホロワ回路の出力→妾合層１＝１と第
２段目のソースホロワ回路の入力ゲー１−３４は導′醒
線３６で接続されている。尋電緋４５はソースホロワ回
路のソース鼠合層：′３２を基＄電位とするもので、通
常半導体基板５の電位に接地される。砺−一線４６はソ
ースホロワ回１浴の出力、すなわぢ出力回路３の出力を
とりたずものである。導電線４７は・６諒電圧を供給す
るものである。The output of the first stage source follower circuit→conjunction layer 1=1 and the input gate 1-34 of the second stage source follower circuit are connected by a lead line 36. The electric potential 45 is set to a potential of $ based on the source junction layer 32 of the source follower circuit, and is normally grounded to the potential of the semiconductor substrate 5. The line 46 is the output of the source follower circuit 1, that is, the output of the output circuit 3. The conductive wire 47 is for supplying a voltage of 1.6 volts.
４電（′、ｔの光シールド瞑４は、従来のように全面を
おおわずに開口部１００を有している。本実施例では開
口ｉ１：ｊ（１００は、出力回路３のうぢフローティン
ク接合型の′…：而ｊ面出回路と第１段目のソースホロ
ワ回路の一部の領域の上部に設けられている。The light shield 4 of the 4-electron (', t) has an opening 100 instead of covering the entire surface as in the conventional case. Tink junction type '...: Provided above a part of the area of the surface output circuit and the first stage source follower circuit.
具体的には、出力ゲート電極７の一部と、電荷検出接合
層６と、接合層１０と、リセット電極９の一部と、４電
ＭｉＷ１１と、入力ゲート１２の上部である。Specifically, they are a part of the output gate electrode 7 , the charge detection junction layer 6 , the junction layer 10 , a part of the reset electrode 9 , the 4-electronic MiW 11 , and the upper part of the input gate 12 .
このように本実施例では元シールド膜４の一部が除去さ
れているため、電荷検出接合層６の有する全静電容量Ｃ
Ｔは、半導体基板との間の静電芥−敏Ｃｖｓと、出力ゲ
ート・屯、饋７との間の静電容量ＣＦＯと、リセット電
極９との間の静電容量ＣＦＲと、入力ゲート１２が有す
るＦＪ”ｍ 谷ｍ ＣＦＤとの和であられされる。すな
わち、
ＣＴ ＝ ＣＦＳ ＋ ＣＦＯ＋ ＣＦＲ＋ ＣＦＤ
・・・・・・・・・（２）となる。すなわぢ、従来の（
１）式と比較ずれはわがるように、対元シールド膜との
間の静電容量ＣＦ項。As described above, in this embodiment, since a part of the original shield film 4 is removed, the total capacitance C of the charge detection junction layer 6 is reduced.
T is the electrostatic capacitance Cvs between the semiconductor substrate, the electrostatic capacitance CFO between the output gate 7, the electrostatic capacitance CFR between the reset electrode 9, and the input gate 12. It is calculated by the sum of FJ”m valley m CFD that has. That is, CT = CFS + CFO + CFR + CFD
......(2). In other words, the conventional (
1) As can be seen from the equation, the difference is the capacitance CF term between the pair and the original shield film.
ＣＦＩ、２がなくなり、静電容量ＣＴ は小さくなる。CFI,2 disappears, and the capacitance CT becomes smaller.
したがって、電荷検出接合層６０電位変化ＶＳ と転送
された電荷量Ｑｓ との比である電荷検出感度Ｖｓ／Ｑ
ｓ ＝ １．／Ｃｒは、非常に旨くなる。Therefore, the charge detection sensitivity Vs/Q is the ratio between the potential change VS of the charge detection junction layer 60 and the transferred charge amount Qs.
s = 1. /Cr makes it very tasty.
本実施例の動作を説明すると、リセット電極９１をオン
すると、リセット′電極９下の′電位は高くなって、電
荷検出接合層６の電位は接合層１０の電位と同（じにな
る。リセット山、・１甑９をオフすると、リセット′Ｈ
ｃ＋１返９Ｆの電位は低くなり、嵯荷検りＪ旧妾合１９
６６はフローティング状態となる。この状態で電荷検出
感度からの転送′１乞荷が出力ゲート＝ｍ極７の障壁電
位を超えて流れ込み′−荷・演出接合層６の電位を変化
させる。この′電位変化Ｖｓを２段構成のソースホロワ
回路で検出する。削述したように本実施例では゛東向・
演出接合層６の全静′直容量Ｃ丁が小さいので、電位変
化Ｖｓ は転送電信Ｑｓ に対して大きくなり、検出感
度が筒くなる。To explain the operation of this embodiment, when the reset electrode 91 is turned on, the potential under the reset electrode 9 becomes high, and the potential of the charge detection junction layer 6 becomes the same as the potential of the junction layer 10.Reset Mountain, ・When you turn off 1-koshiki 9, reset 'H
The potential of c+1 return 9F becomes low, and the inspection J former concubine 19
66 is in a floating state. In this state, the transfer '1 signal from the charge detection sensitivity flows beyond the barrier potential of the output gate=m pole 7 and changes the potential of the charge/direction junction layer 6. This 'potential change Vs is detected by a two-stage source follower circuit. As mentioned above, in this example,
Since the total static direct capacitance C of the production bonding layer 6 is small, the potential change Vs becomes large with respect to the transfer wire Qs, and the detection sensitivity becomes large.
なお、光シールド膜４かないため、入射光により、屯荷
検出叛合層６、接合／’ｊ １（Ｊと半／＃一杯基イ反
５とで何成されるＰｎ接合で九軍変かされ６荷が発生す
るが、転送電荷の恢出とリセットとを例えばＩ Ｍ Ｉ
−１ｚ以上の高速で周期動作さぜれはこの目り荷をほと
んど無祝することができるので四状はない。In addition, since there is no light shielding film 4, the incident light causes the load detection interlayer 6, the junction /' 6 charges are generated, but the transfer charge generation and reset are performed using, for example, IMI
If the periodic operation is performed at a high speed of -1z or more, this burden can be almost completely ignored, so there is no four-way condition.
本発明の第２の実施例による固体撮像装置ａの出力回路
３を第６１２］第７図に示す。本実流例は第１の実施列
と光シールド祠４の開口部１０１の形状が異なる。すな
わち第１の実施例における開口部１０１（９）
よりも、広い領域の光シールドＩＮ ４が除去されてい
る。具体的には、出力ゲート７の一部と、電荷検出接合
層６と、接合層１０と、リセット電極９の−６１３と、
導電線１１との上部の領域に加えて、第１段目のソース
ホロワ回路の出力接合層１４と第２段目のソースホロワ
回路の入力ゲート３４とを接続する導電線３６と、第２
段目のソースホロワ回路の入力ゲート３６と出力接合層
３５との上部の領域の元シールド膜４が除去されている
。本実施例では、靜′鑞芥量Ｃｙｔｉ１ 、 ＣＩＰ］
Ｌ２に加えて、出力接合層１４の出力導電線３６の対地
容駐ＣＬＯもなくなることになる。The output circuit 3 of the solid-state imaging device a according to the second embodiment of the present invention is shown in FIG. In this actual flow example, the shape of the opening 101 of the light shield shrine 4 is different from that of the first implementation row. That is, a wider area of the optical shield IN 4 is removed than the opening 101 (9) in the first embodiment. Specifically, a part of the output gate 7, the charge detection junction layer 6, the junction layer 10, -613 of the reset electrode 9,
In addition to the area above the conductive line 11, the conductive line 36 connecting the output bonding layer 14 of the first stage source follower circuit and the input gate 34 of the second stage source follower circuit;
The original shield film 4 in the region above the input gate 36 and output junction layer 35 of the source follower circuit in the third stage is removed. In this example, the amount of waste Cyti1, CIP]
In addition to L2, the ground-to-ground parking CLO of the output conductive line 36 of the output bonding layer 14 will also be eliminated.
したがって電荷検出感度が高くなるとともに、静電容量
１０の存在のために劣化していた周波数応答が改善され
る。Therefore, the charge detection sensitivity is increased, and the frequency response, which has been degraded due to the presence of the capacitance 10, is improved.
なお、第８図は、第４図から第７図に示す出力回路の等
価回路である。第１の実施例におけるように開口部を設
ければ、参照番号６１で示す静電容量ＣｖＩ、（＝ ｃ
ｙＬ、、 ＋ ＣＦ鴎）がなくなるため検出感度が向ヒ
することがわかる。また第２の実施例におけるように開
口部を設けれは、さらに参照番号６２で（１０）
示す静軍容ｆｆ１ｃｔｏがなくなるので周波数応答か改
善することがわかる。Note that FIG. 8 is an equivalent circuit of the output circuits shown in FIGS. 4 to 7. If an opening is provided as in the first embodiment, the capacitance CvI, (= c
It can be seen that the detection sensitivity is improved due to the elimination of yL, , + CF seaweed). Further, it can be seen that when an opening is provided as in the second embodiment, the static force ff1cto indicated by reference numeral 62 (10) is further eliminated, so that the frequency response is improved.
以上の実施例は出力回路がフローテインク接合形の検出
回り洛であったが、フローティングゲート形あるいはそ
の他の容量蓄積形検出回路の場合にも適用できる。また
固体撮像装置の他の回路上の光遮、１１に膜を除けば、
その回路の周波数応答を改善できる。In the above embodiments, the output circuit is a floating ink junction type detection circuit, but the present invention can also be applied to a floating gate type or other capacitance storage type detection circuit. Also, if we exclude the light shielding on other circuits of the solid-state imaging device and the film in 11,
The frequency response of the circuit can be improved.
以上の埋り、本発明によれば専醒性光遮蔽膜の光遮蔽４
炊能を十負うことなく ゛ｍｉ荷検出感度の商い出力回
路を有する固体撮像装置Ｉ′！：を実現できる。また元
遮蔽映を除去する領域により周波数応答を改善すること
ができる。According to the present invention, the light shielding film 4 of the exclusive light shielding film
A solid-state imaging device I' that has an output circuit that has the same load detection sensitivity without having to take on too much power! : Can be realized. Also, the frequency response can be improved by removing the original occluded image.
第１図は従来の固体（１ｆ家装置コｊの平面図、第２図
（ａ）は同固体撮１象挟１ｄの出力回路の１□ＩＪｒ
ｍ図、第２図（ｂ）は同出力回路の！助作を示すポテン
シャル図、第３図は本発明の第１の実施例による固体撮
像装置の平［＋′：ｌ□１図、第４図は同固体撮像装置
の出力回路の平面図、第５図は同出力回路の断面図、第
６図は本発明の第２の実施例による固体撮像装置の出力
回路の平面図、第７図は同出力回路の１新面図、第８図
は同出力回路の回路図である。
■・・・光篭変挨素子、２・・・電荷転送装置、３・・
・出力回路、４・・・光シールド膜、５・・・半導体基
板、６・・・電荷検出段介層、７・・・出力ゲート―極
、８・・・転送′成極、９ ・リセット′亀億、１０・
・接合層、１１・・・導’を綜、１２・・入カゲー１−
１１３・・・ドレイン接合層、１４・・・出力接合層、
１５・・・ゲート、１６・・・ソース接合層、２４・・
絶縁層、３１・・ゲート、３２・・・ソース接合層、３
４・・・入力ゲート、３５・・出力接合層、３６・・・
専′祿畝１００・・・開口部、１０１・・・開口部。
出願人代理人 猪 股 清Figure 1 is a plan view of a conventional solid-state device (1F home device), and Figure 2 (a) is a diagram of the output circuit of the same solid-state camera (1D).
Figure m and Figure 2 (b) are of the same output circuit! FIG. 3 is a potential diagram showing an auxiliary work, and FIG. 3 is a plan view of the solid-state imaging device according to the first embodiment of the present invention. 5 is a sectional view of the output circuit, FIG. 6 is a plan view of the output circuit of the solid-state imaging device according to the second embodiment of the present invention, FIG. 7 is a new view of the output circuit, and FIG. 8 is a new view of the output circuit. It is a circuit diagram of the same output circuit. ■... Light basket changing element, 2... Charge transfer device, 3...
- Output circuit, 4... Light shield film, 5... Semiconductor substrate, 6... Charge detection stage interlayer, 7... Output gate - pole, 8... Transfer' polarization, 9 - Reset 'Kamebillion, 10・
・Joining layer, 11... Connecting layer, 12... Input game 1-
113...Drain junction layer, 14...Output junction layer,
15... Gate, 16... Source junction layer, 24...
Insulating layer, 31...gate, 32...source junction layer, 3
4...Input gate, 35...Output junction layer, 36...
Special ridge 100...opening, 101...opening. Applicant's agent Kiyoshi Inomata
Claims (1)
と、これら光電変換素子により発生された信号電荷を転
送する電荷転送手段と、この電荷転送手段により転送さ
れた信号′電荷を電圧信号としてとり出す出力回路と、
入射光を遮蔽するとともに電気遮蔽する導電性元遮蔽膜
とを備えた固体撮像装置において、 前記導電性元遮蔽膜は、前記光電変換素子上の領域に開
口部を有するとともに前記出力回路上の少なくとも一部
の領域に開口部を有することを特徴とする固体撮像装置
。[Scope of Claims] A plurality of photoelectric conversion elements that generate signal charges according to incident light, charge transfer means that transfers the signal charges generated by these photoelectric conversion elements, and signals transferred by the charge transfer means. 'An output circuit that extracts the charge as a voltage signal,
In a solid-state imaging device including a conductive original shielding film that shields incident light as well as electrically shields, the conductive original shielding film has an opening in a region above the photoelectric conversion element and at least one part above the output circuit. A solid-state imaging device characterized by having an opening in a part of the region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58118526A JPS6010671A (en) | 1983-06-30 | 1983-06-30 | Solid state image sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58118526A JPS6010671A (en) | 1983-06-30 | 1983-06-30 | Solid state image sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6010671A true JPS6010671A (en) | 1985-01-19 |
| JPH0524671B2 JPH0524671B2 (en) | 1993-04-08 |
Family
ID=14738784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58118526A Granted JPS6010671A (en) | 1983-06-30 | 1983-06-30 | Solid state image sensor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6010671A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63292286A (en) * | 1987-05-25 | 1988-11-29 | Matsushita Electric Ind Co Ltd | Character recognizing device |
| JPS63312671A (en) * | 1987-06-15 | 1988-12-21 | Nec Corp | Charge transfer image sensor |
| JPH01119884A (en) * | 1987-11-02 | 1989-05-11 | Matsushita Electric Ind Co Ltd | Character recognizing device |
| JPH02285676A (en) * | 1989-04-27 | 1990-11-22 | Toppan Printing Co Ltd | Solid-state image sensing device |
| JPH05304280A (en) * | 1992-04-27 | 1993-11-16 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
| JP2012019359A (en) * | 2010-07-07 | 2012-01-26 | Canon Inc | Solid state imaging device and an imaging system |
| JP2017139281A (en) * | 2016-02-02 | 2017-08-10 | 三菱電機株式会社 | Solid-state imaging apparatus and method for manufacturing the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5645086A (en) * | 1979-09-21 | 1981-04-24 | Hitachi Ltd | Photosensor |
| JPS5869176A (en) * | 1981-10-20 | 1983-04-25 | Fuji Photo Film Co Ltd | Solid-state image pickup device |
-
1983
- 1983-06-30 JP JP58118526A patent/JPS6010671A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5645086A (en) * | 1979-09-21 | 1981-04-24 | Hitachi Ltd | Photosensor |
| JPS5869176A (en) * | 1981-10-20 | 1983-04-25 | Fuji Photo Film Co Ltd | Solid-state image pickup device |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63292286A (en) * | 1987-05-25 | 1988-11-29 | Matsushita Electric Ind Co Ltd | Character recognizing device |
| JPS63312671A (en) * | 1987-06-15 | 1988-12-21 | Nec Corp | Charge transfer image sensor |
| JPH01119884A (en) * | 1987-11-02 | 1989-05-11 | Matsushita Electric Ind Co Ltd | Character recognizing device |
| JPH02285676A (en) * | 1989-04-27 | 1990-11-22 | Toppan Printing Co Ltd | Solid-state image sensing device |
| JPH05304280A (en) * | 1992-04-27 | 1993-11-16 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
| JP2012019359A (en) * | 2010-07-07 | 2012-01-26 | Canon Inc | Solid state imaging device and an imaging system |
| JP2017139281A (en) * | 2016-02-02 | 2017-08-10 | 三菱電機株式会社 | Solid-state imaging apparatus and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0524671B2 (en) | 1993-04-08 |
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