JPS6010638B2 - Readout device for matrix type thin film EL display device - Google Patents

Description

Detailed Description of the Invention <Summary> The present invention relates to a memory readout device for a three-layer thin film EL display device having hysteresis memory characteristics in the relationship between applied voltage and luminance, and particularly to a thin film EL display device having a matrix electrode. The present invention relates to a reading device with improved S/N ratio.

<Prior art> The structure and hysteresis characteristics of a three-layer thin film EL display device are as explained in Tokubuta No. 50-183767, for example. A dielectric material such as Y203, Si8N4, Ti02A metal 203, etc. is further added, for example, 0.1 to 5M% Mn.
A fluorescent layer such as ZnS (yellow light emitting) doped with ZnS is formed on top of the phosphor layer, and a dielectric material such as Y203, Si3N4, Ti02AI203 is further deposited using thin film techniques such as vapor deposition or sputtering.
It is deposited to a thickness of 0 to 10,000 Δ to form a double-insulated three-layer structure, and a cotton-like electrode is arranged thereon in a direction perpendicular to the transparent electrode to form a matrix electrode.

In the three-layer thin film L display device having such a structure, the first
When one of the electrode groups and one of the second electrode group are selected and an appropriate alternating current voltage is applied, a small area sandwiched between the two electrodes crosses and emits light. This corresponds to one picture element on the screen. By combining these, characters, symbol patterns, etc. are displayed. EL with this structure has superior characteristics in terms of brightness, lifespan, and stability compared to conventional distributed EL elements, but this EL has a new hysteresis between applied voltage and luminance. Show characteristics. To explain this, when a pulse with a voltage amplitude of V is first applied, the brightness decreases to a low level of brightness B.
,It is in. Here, the sustaining voltage V, is V,>V, where Vth is the luminescent voltage Vth. When the sustaining voltage V, is continuously applied, the brightness B, is maintained. Next, when the write voltage V2 is applied, the brightness rises all at once to the maximum, and even if the voltage returns to the sustaining voltage V, within a certain period of time thereafter, the brightness settles to a brightness &, which is higher than the previous brightness B. The brightness B2 is maintained by continuously applying the sustaining voltage V. In this state, next erase voltage V3
When V is applied, the brightness level decreases rapidly, and when it is returned to the sustaining voltage V, it settles down to the brightness B. In short, the sustaining voltage V needs to be selected at a point where the difference between the brightness B when the voltage rises and the brightness B when the voltage falls is large. This hysteresis phenomenon can take any small loop depending on the amplitude, pulse width (not shown), and pulse frequency of the write voltage. That is, it is also possible to display halftones. A major feature of this EL display device, which other display devices do not have, is that once a write voltage or erase voltage is applied, each picture element continues to emit light without losing the gradation given to it by the sustain pulse. be.
The above voltages vary considerably depending on the physical conditions such as composition and film thickness, as well as the applied waveform, but in a prototype example, Vth
200V, V,: 210V, V2=210~280V
, V3=190V. This three-layer structure thin film EL display device can not only perform programming, erasing, and memorization by changing the applied voltage, pulse width, and pulse frequency as described above, but also can electrically display the memory state.

Since a thin film EL element has a light emitting layer sandwiched between two insulating layers, it can be thought of as a capacitive element, and a displacement current flows when a sustaining voltage is applied, but when this element is memorizing the light emitting state, a displacement current flows. By applying a sustaining voltage, a current corresponding to the magnitude of the luminance of the emitted light flows in addition to the displacement current.

This current is called a polarization current. Actually, even in the erased state, there is a slight rise in the background, and a correspondingly small amount of polarization current flows. For example, when a sustaining voltage pulse as shown in Figure a is applied to the EL element,
When the current flowing through the element is in the erased state, it shows a displacement current waveform as shown by the solid line 11 in Fig. Shows the folded waveform. In order to determine the polarization current, the inventors of the present invention used Samurai Sho 49-101718 ``Method for detecting memory contents of light-emitting element'' (see Tsubaki Seki No. 51-28446) to detect a specific current flowing through the EL element. Time (
For example, if there is a polarizing current, the point at which it gives its peak)
proposed a method and circuit for detecting whether a light emitting state or an erasing state is present based on whether the displacement current exceeds a certain predetermined level including a noise margin. However, since this method separates the displacement current and polarization current at a specific point in time and at a specific level, not only careful consideration is required in setting the specific level at the specific point in time, but also the magnitude of the displacement current. As t becomes larger than the polarization current, S/
N is bad.

It is also possible to construct an equivalent circuit at the time of erasing using analog elements such as capacitors and resistors for a current similar to the above displacement current, or to remove the current at the time of erasing by storing the waveform itself at the time of erasing in a ROM etc. .

However, even with this method, if the EL element is a single unit, there is only one waveform during erasing, and the above idea can be applied, but in the case of a matrix element, there are the following problems. ■ In the case of matrix drive, the drive method In some cases, as the number of matrices increases, the magnitude of the displacement current increases significantly due to causes such as wraparound.

Therefore, it is difficult to construct an equivalent circuit during erasing or to detect polarization current with good S/N. ■ In order to efficiently guide the light emitted from the thin-film L element to the outside, at least the electrode on the display side is made of a transparent electrode, but when the resistance of this electrode is high, it is necessary to reduce the display density as in a matrix display. In this case, the electrode line width is narrow and the resistance becomes high, and there is a large difference in resistance value between the display electrode near the lead wire extraction part and the display electrode and the tip part far from the lead wire extraction part, resulting in a large change in the effective applied voltage. Therefore, even if the same pulse is applied from the outside, the current waveform changes greatly depending on the read position, and having a corresponding number of erase equivalent circuits, and preparing the erase waveform makes the device complicated. It is too large and not economical. The circulation capacitance CN is a matrix of m rows and n columns, and 1
When the capacitance per picture element is C, if all electrodes other than the selected point are in a floating state, the circuit can be expressed as shown in Figure 2, and the circulating capacitance CM
becomes (mkenkusen)XC.

In a 240x180 matrix panel, CN is CN2102xC, and the circulation capacity is 102, which is the capacity of one pixel.
It becomes twice the size.

In an ideal state, even in this case, the level ratio at the time of commitment and erasure will not change because the magnitude of the displacement current is the same in both cases, but in reality, if the ratio of the desired signal to the unnecessary signal becomes too small, noise will occur. , level drift, etc. will cause problems with the signal,
Detection of signal components becomes difficult. Even in the case of a single picture element, the best ratio of polarization current during writing to displacement current during erasing is 1.
Therefore, if the above-mentioned wrap-around capacitance exists, it is almost impossible to perform a reduction in the matrix element. In order to solve these problems, the inventors of the present invention previously filed a patent application for the circuit shown in FIG.

In a matrix type thin film EL display device, a reference electrode is prepared in a part of the display device, and the current flowing through this reference electrode is used as the above-mentioned erasing current, thereby canceling out the displacement current and reducing only the polarization current. I'm trying to take it out. Further, it eliminates the leakage capacitance and significantly improves the ratio of write current, ie, polarization current, to erasure current, ie, displacement current, and greatly facilitates reading.

In order to eliminate the wrap-around, it is sufficient to fix the levels of all the electrodes at non-selected points that have been left in a floating state.

The easiest way to fix the level is to ground it. It is desirable to ground both the horizontal and vertical electrodes, but in reality, if only the horizontal scanning electrode that connects the readout circuit is grounded, the vertical scanning electrodes other than the electrode at the selected picture point will be in a floating state. However, since there is no potential change with respect to the ground potential, no wraparound occurs.
The circuit shown in FIG. 3 will be explained below.

This embodiment mainly consists of six blocks.

The first block is a sustain drive circuit 10. Figure 3 shows 3
Although a phase resonance maintenance drive circuit is shown, a four-phase or more multi-phase drive circuit may be used. Two sustaining voltage sources E and -E2 are prepared, and the three switches SW, SW2, SW3 are sequentially operated to apply three voltages to the EL display device 50, namely E, , ○.
, -E2.

The transformer T forms a series resonant circuit together with the capacitive component of the EL display device 50, and supplies voltage with high efficiency. The second block is a write/read switch circuit 20, which applies a write voltage Vw to the line
This circuit applies voltage from w via switch WSk (k=1 to m).

Further, when reading is desired, the switching circuit applies a reading voltage Vr from the reading driving circuit Er to the reading line Y via the switch RS during the reading phase. The output drive circuit is a power supply circuit for applying a voltage equal to the maintenance voltage Vs. The third block is a switch group 30 provided on a transparent electrode constituting a horizontal scanning electrode of an EL display element.

This switch group 30 is all short-circuited during sustain drive, and only the desired x line is turned on during write and erase drive, and the others are turned off. Conversely, when driving the line, only the desired line is turned off, and the others are turned on and grounded. The fourth block is a write and logical separation and a sustain amplitude holding circuit 40.

This is a diode circuit for separating the write line and non-write line and at the same time for maintaining resonance drive amplitude. Fifth
The block is a matrix type three-layer structure EL display device, and only the electrodes are shown in this figure.

The electrode at the end of the pulse on the transparent electrode side is prepared as a reference electrode r. The sixth block is a switch group 60 for selecting a pixel point to be read out from among the horizontal scanning electrodes, and turns on the switch of the electrode including the pixel point to be discussed and turns off the others.

The seventh block is a circuit 70, which includes a resistor R commonly connected to the horizontal scanning electrodes 1 to n, and a resistor R connected to the reference electrode r.
2 is canceled out by the common-mode signal removal amplifier 71, and only the polarized current is extracted and output.

Prototyped by the inventors6.

The specifications of the EL panel are as follows. Line pitch: 2 lines / skin x 240 lines (transparent electrodes), 180 Y lines (N electrodes) Display characters: 5 x 7 dot configuration, 64 types of Roman letters, Arabic numerals, symbol display and specify the start and end points, In Figure 3, when the first holding switch SW is closed at the first timing, the third holding potential VH and the first
The difference between the voltage and the power supply potential E is a capacitive element (in this figure, the entire EL panel is considered to be a capacitive element Ct with approximately constant capacitance).

), and the first holding power is VSI=EI+(BI
1 VH) ・． ．． ... is held at m.

Similarly, when the second holding switch SW2 is closed at the second timing 2, the second holding potential is -VS2=-E2Itto (
VI+E2). ．． …． {21, and then the third holding switch SW3 is closed at 3 at the third timing, the third holding potential becomes VHi or V2
...[3,] In this way, three-phase maintenance drive is realized.

Three-phase total holding drive is performed by writing at an intermediate holding potential (in this embodiment, the third holding potential VH) to
The withstand voltage requirements of S, to n can be reduced.

Writing is performed by selecting the X and Y sides of the write picture element M (i, j) by the write and read switch circuit 20 and the switch circuit 30, respectively, during the intermediate holding potential (VH period), and applying the write voltage V.
This is done by applying w.

Erasing is performed in the same manner as writing, except that the erase voltage (
(not shown) is supplied to the selected picture element.

Next, the logical selection drive will be explained.

When driving, the switch WSi on the side corresponding to the output selection point M (i, j) is selected and closed, the switch DSj in the × side switch group 30 is turned off, and the others are turned on, and the switch group 60 is turned off. Then switch RSi is turned on and the others are turned off.

This switch state is shown in FIG. Thus, the voltage reduction pulse voltage Vr is applied to the selection point M. The other electrodes of the horizontal scanning electrodes are grounded by a switch group 30. A pulse current generated by the output pulse voltage Vr appears in the resistor R, and is supplied to the ten terminal of the amplifier 71. At the same time, a reference current at the reference point P(i, r) of the reference electrode r appears across the resistor. Since the reference line r is never written to, it always outputs only an erase current, that is, a displacement current. This is connected to one terminal of the amplifier 71. In the amplifier 71, only the displacement current at the readout pixel point is canceled out by the current appearing in the resistor R2, that is, a differential voltage is derived, and only the polarization current is output when the readout pixel point is in the write state. When the starting pixel point is in the erased state, the output is 0 because all of them are canceled out. Since the horizontal scanning electrodes other than the output selection point M are grounded across the three switch groups, they are fixed at zero potential and can be easily removed without generating any circulating capacitance.

In the embodiment shown in FIG. 3, only one reference electrode is prepared, but in a thin film EL display device, the extraction electrodes of the horizontal scanning electrodes are alternately led out to the upper and lower sides due to the electrode density. , two reference electrodes may be prepared so as to be aligned with the direction of the extraction electrode, and a current obtained from the reference electrode in the same direction as the extraction electrode may be used.

However, when the number of write primes supplied to one horizontal scanning electrode increases, the polarization current, which is the signal component, does not change due to the characteristics of the element, but the displacement current, etc., which corresponds to the noise component, increases. increases approximately in proportion to the number of selected picture elements from the level when all picture elements on the horizontal scanning electrode including the selected picture element are erased.

For example, when all picture elements except one picture element are written, the level of the picture elements that were not written rises to about the writing level when only one picture element is written. The state of this fluctuation is shown in FIG. In the figure, 1 is the displacement current during multi-point writing and 2
is the displacement current at the time of decimal point writing, 3 is the polarization current waveform, and 4 is the displacement current waveform. Since the level of the displacement current fluctuates in accordance with the number of selected picture elements in this way, it is impossible to read by the method of fixing the start bell as described above.

However, what should be noted is that no level fluctuation of the selection electrode appears in the horizontal scanning side electrode that is different from the selection electrode. In addition, since the level fluctuation of the selection electrode appears almost uniformly over the entire selection electrode, one of the vertical scanning side electrodes is used to correct the level fluctuation at the time of reading. By removing the erasing level of the picture element selected in , from the readout level of the selected picture element, the influence of level fluctuation can be removed.Furthermore, since the erasing level is removed for each horizontal scanning side electrode, the horizontal scanning side driver is slightly It can be absorbed even if the characteristics of
Preferred Embodiment FIG. 5 shows a circuit diagram of an embodiment of the device of the invention.

The embodiment of FIG. 5 shows a circuit that reads one data at a time,
In the figure, the same reference numerals as in FIG. 3 indicate the same parts, and the explanation will be omitted.

Note that in this figure, the circuit for supplying the sustain pulse, that is, the blocks 10 and 40, is omitted for the sake of simplicity. In this embodiment, the vertical scanning side electrode m is used to correct level fluctuations.

Therefore, the output determined as described above is applied to the level correction and leveling signal determination circuit 80.

In this circuit 80, the signal is applied from the amplifier 71 to the ten terminal of an analog comparator 81, and the output of the D/A converter 82 is applied to one terminal of the analog comparator 81. The output of the analog comparator 81 is applied to an AND gate 83 for extracting a signal only when an output pulse is applied to one terminal. This and gate 83
The output of is applied to input terminal C of a flip-flop 84 for holding input data. The output of the vertical scanning side electrode m is used for level correction by a control microcomputer 85, and the control microcomputer 85 applies data to set a value to the D/A converter 82 via a data line 86. A time chart of the circuit 80 is shown in FIG.

When the sustaining pulse Ps is applied as shown in FIG. 6a, when the starting pulse Pr is applied, a selected pixel current is obtained at the selected supply element electrode as shown in FIG. 6b. The waveform E shown by the solid line in FIG. 6b is the current waveform during erasing,
A waveform W shown by a dotted line is a current waveform during writing. same as below. The selected pixel current is compared with the analog output S of the D/A converter in the analog comparator 81 (sixth
Figure c), outputs "1" and '0'.

This output is output via an AND gate 83 (FIG. 6d). The output of the AND gate 83 inverts the flip-flop 84 and maintains the readout output. Note that this flip-flop is set so that a clear pulse is always applied to the terminal Cr before starting, so the flip-flop is set according to the level of the starting current. In the above embodiment of the present invention, the procedure for reading out the M(i, i) point will be described below with reference to the flowchart of FIG.

This uses a well-known successive approximation type A/D conversion method.

In other words, MSB (Most Si starvation) is applied to the D/A converter input.
ficantBit, the most significant bit), compare the output with the input voltage, and if the input voltage is larger, leave that bit as 1, and conversely, if the input is smaller, reset it to 0. . This operation starts from MSB to L.
When the process is executed up to SB (Least significant bit), the input of the D/A converter becomes the input voltage value. This method can be implemented with a relatively simple circuit, and 1
High precision can be obtained up to about 6 bits, and conversion time is also fast. The data register and bit register described below are built into the control microcomputer 85.

First, when starting, in the first step, the vertical scanning electrode m and the horizontal scanning electrode i are selected, and an operation for determining the erase level of the reference picture element (m, i) by A/D conversion is started.

In the second stage, M is added to the data register and test bit register.
Set only SB. In the third stage, the contents of the data register are output to the D/A converter 82. Next, in the fourth step, a start pulse is applied to the thin film EL pulse, and then the contents of flip-flop 84 are examined. flip flop 84
In the fifth step, it is determined whether the output of Clear. If YES, it is determined in the seventh step whether the test bit is mountain B or not. NO at step 7
In this case, proceed to step 8 and set the contents of the test bit register to 1.
Shift bits to the right. In the case of YES, the process moves to the first mountain stage and subsequent stages in order to detect the contents of the selected picture element. Next, in the ninth stage, add the data register and test bit register,
Place the result in the data register. Then go back to the previous third stage. The first peak stage and subsequent stages are operations for detecting the contents of the selected picture element, and in the first stage, the vertical scanning side electrode i and the horizontal scanning side electrode i are selected.

Next, a margin is added to the erasure level data of the reference segment element obtained in the eleventh step, and the resultant data is output to the D/A converter 82. In the twelfth step, a bleed pulse is applied and then the flip-flop 84 is examined. At the 1st $ stage, it is determined whether the output is 1 or not, and if YES, at the 14th stage (i, i)
is in the write state. If NO, it is detected in the first technique step that (i, j) is in the erased state. Note that when discussing the contents of a series of picture elements, (m,
If you calculate the erasure level of points i) to (m, n) plus a margin, from now on, no matter which picture element you want to read,
It is no longer necessary to perform A/D conversion, which requires a long time, and it becomes possible to perform conversion in a short time.

<Effects of the Invention> As described above, according to the present invention, one of the vertical scanning electrodes is used as a reference electrode to determine its erase level, and this is removed when determining the read current. There is no plot to get out.

[Brief explanation of drawings]

Fig. 1 is a waveform diagram of read exposure current to explain the read operation, Fig. 2 is an equivalent circuit diagram to explain the invention of the earlier application, Fig. 3 is a circuit diagram of the device of the earlier invention, and Fig. 4 is A current waveform diagram for explaining the subject matter of the present invention, FIG. 5 is a circuit diagram of a reading device according to an embodiment of the present invention, FIG. 6 is a time chart of the above-mentioned embodiment of the device of the present invention, and FIG. 7 is a flowchart diagram of the same device. m is a reference electrode, 71 is an amplifier, 81 is an analog comparator, 82 is a D/A converter, 83 is an AND gate,
84 is a flip-flop, and 85 is a control microcomputer. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7

Claims (1)

[Claims] 1. In a thin film EL display device in which a fluorescent layer sandwiched between dielectric layers is interposed between electrodes arranged in a matrix shape, at least one of which is a transparent electrode, and a hysteresis phenomenon occurs in applied voltage and luminance characteristics, the thin film EL at least one reference electrode provided on the horizontal scanning side electrode of the display device;
A circuit for selectively deriving readout signals for arbitrary picture elements from horizontal scanning electrodes other than the reference electrode, a circuit for comparing and outputting the output of the reference electrode and the output of the readout signal derivation circuit, and a circuit for vertical scanning. a circuit that uses at least one reference electrode provided on the side electrode for level correction and determines a judgment level of the horizontal scanning side electrode selected for the readout, and from the comparison output and the judgment level. 1. A readout device for a matrix type thin film EL display device, comprising a circuit for determining and outputting whether a selected picture element is in a written state or an erased state.