JPH0513320B2 - - Google Patents

Description

[Detailed description of the invention] The present invention provides nonlinear voltage-current characteristics (VI characteristics)
The present invention relates to a method for driving a liquid crystal electro-optical device whose driving performance is improved by a nonlinear element having the following characteristics.

By combining non-linear elements (paristers, diodes, metal-insulator-metal elements (hereinafter referred to as MIM elements), discharge tubes, etc.) with liquid crystal electro-optical devices, it is possible to realize multi-digit driving than before. It has been known. This makes it possible to realize liquid crystal display devices that can display a large amount of information, optical switches that can display more detailed patterns, and the like.

FIG. 1 shows an equivalent circuit for one pixel to briefly explain the operation of a liquid crystal electro-optical device using nonlinear elements. The equivalent capacitance C _LO and equivalent resistance R _LO of the liquid crystal layer are connected to the equivalent resistance R _NL of the nonlinear element. _RNL
has nonlinearity that does not follow Ohm's law as shown in FIG. 2, and has a low resistance R _NLON when the voltage is high and a high resistance R _NLOFF when the voltage is low. When voltage E is applied across the equivalent circuit of FIG. 1, the equivalent resistance of the nonlinear element becomes R _NLON and C _LO is charged. Next, if the voltage E is lowered to E-ΔE, the nonlinear element becomes
R _NLOFF becomes and C _LO starts discharging. R _NLOFF ≫R _LO
≫R _NLON , the time constants τ for charging and discharging are R _NLON・C _LO and R _LO・C _LO , respectively. FIG. 3 shows the voltage waveform applied to the liquid crystal layer at this time. In other words, C _LO is charged in a very short write time tw, and the voltage V _LO thus increased is held for a sufficiently long time tk (several msec to several tens of msec of R _LO and C _LO ). As a result, the applied voltage during the writing time tw determines the effective value, and it is possible to obtain a larger effective value ratio between ON and OFF than in a normal liquid crystal electro-optical device. Through such operations, multi-digit driving of several hundred digits is realized.

Although the electro-optical device has many advantages as described above, the voltage averaging method of the two-frame AC method (frame period t _F ) that is generally used (Figure 4)
If the liquid crystal layer is driven, a problem arises in that the effective voltage applied to the liquid crystal layer changes due to the influence of other pixels on the same data electrode. This is because the discharge curve of V _LO depends on the applied voltage during the holding period tk in FIG. In Figure 4, the applied voltage given by Tm (timing) - Dn (data) changes variously during the retention period depending on the display pattern of other pixels on the same data electrode, and the voltage V _LO applied to the liquid crystal layer changes accordingly. . FIG. 4a shows an example of the case where the effective voltage of V _LO is the smallest, b shows the case where it is the largest, and c shows an example of a general display pattern. In this way, when the effective voltage applied to the liquid crystal changes depending on the display pattern, deterioration in display quality such as display unevenness and halftone occurs.

The present invention eliminates such drawbacks, and its purpose is to include periods in the drive waveform that are unnecessary for operation.
The present invention provides a driving method that reduces halftones and display unevenness caused by display patterns by providing a pause period.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 5 is an example of a drive waveform obtained by setting a pause period according to the present invention. The display pattern is the same as in FIG. 4, where a is the minimum effective value, b is the maximum effective value, and c is a general display pattern. What is different from Fig. 4 is that within the frame period t _F , there is a pause period t _I
are provided in two places, at the beginning and end of one frame. In the case of FIG. 5, the voltage level during this pause period is such that the data signal is set at the selection level (ON level) and the timing signal is set at the data signal _selection level.
The voltage Tm-Dn applied to n) is 0V.

Further, by providing the pause period t _I within the frame period t _F , the write time t _W is reduced to t _F −2t _I /t _F. As shown in Figure 3, a decrease in t _W works to suppress the charging of C _LO , but if the switching ratio of the nonlinear element, R _NLOFF /R _NLON , is large, even an extremely short writing time t _W can be sufficient to reduce C LO. Since _{the LO} can be charged, there is no problem in practical use except for multi-branch drive with a very large number of digits (several thousand digits or more).

Next, the remaining frame period _tA excluding the pause period will be explained. Compare Figures 4 and 5. When the voltage waveform within t _A in FIG. 5 is connected except for the rest period t _I , it can be seen that it matches the waveform obtained by compressing the voltage waveform in FIG. 4 in the time axis direction. In other words,
The conventional drive waveform is inserted into _{the rest period tA after} setting the rest period tI. This increases the multiplicity in terms of the frame period, and naturally t _W decreases as described above. Also, in the drive waveform during the non-selection period (holding period) other than t _W , t _W
Similarly, the time interval is decreasing.

The voltage _VLO applied to the liquid crystal layer when driven with the given drive waveform is shown in Figure 5 as _VLO.
It was shown as Comparing Figures 4 and 5, a
In the case of the minimum effective value display pattern of , the effective value increases compared to Fig. 4, in the case of the maximum effective value display pattern of b, it decreases, and in the case of the general display pattern of c, it is almost the same. ing. An enlarged view of this situation is shown in FIG. The broken line represents the conventional example shown in FIG. 4, and the solid line represents the case shown in FIG. a, b, c are in Figure 4,
According to Figure 5. The fact that the minimum effective value increases and the maximum effective value decreases depends on the display pattern.
This is nothing more than suppressing the effective value fluctuation of V _LO .

In this way, other pixels on the same data electrode
It has become possible to drive with suppressed ON/OFF effects.

In addition, the ratio of the idle period t _I to the frame period t _F , its installation time position, and the set voltage level during the idle time are optimized according to the number of driving multiplex digits, the switching performance of the nonlinear element, the driving voltage, etc. be able to. In the case of Figure 5, t _I is set at the beginning and end of the frame, and the applied voltage Tm at t _I is
This is an example of setting -Dn to 0V.

In Figure 7, the rest period t _I is set at the end of the frame to be t _I = 2/5 t _F , and the applied voltage at t _I is
Tm−Dn is Vo/a [V] (positive frame period, Vo
...Drive peak voltage, a...1/a bias method)
This is an example of a drive waveform when given as follows. For simplicity, only the case of a general display pattern is shown. In this way, the setting of the pause period can be changed in various ways.

There is no problem in setting the voltage level during the idle period either on the data side or the timing side, but it is preferable to select it so as not to increase the number of required voltage levels and to reduce power consumption. In addition, by making the effective value applied to the liquid crystal as large as possible, the peak voltage required for driving (Vo in Figure 7)
Therefore, it is advantageous to set the applied voltage (Tm-Dn) during the rest period as large as possible (positive side frame). OFF
Although it is possible to increase the waveform writing peak voltage (see the broken line in Figure 7), in practice Vo/a [V] shown in Figure 7 is the best as it does not require an increase in the voltage level. be.

Next, a circuit for generating a drive waveform according to the present invention will be described.

FIG. 8 shows an example of a circuit that generates a drive waveform according to the present invention, including a nonlinear element liquid crystal panel, a data driver section, a timing driver section, a basic voltage level generation section, a crystal oscillation control circuit,
Consists of display memory. Each circuit block that makes up the drive circuit, except for the control circuit,
A circuit having the same configuration as that of a normally used liquid crystal drive circuit is used. The data driver section includes a selection circuit consisting of a shift register and a latch circuit.
It consists of a level shifter and a demultiplexer that switches the basic voltage level, and the timing driver section is similar to the data driver section.
It consists of a scanning circuit consisting of a shift register, a level shifter, and a demultiplexer.

The basic voltage level generation section outputs the basic voltage obtained by resistor division or the like to the demultiplexer as data ON/OFF level timing selection, non-selection level, and rest level.

The control circuit transfers display data from the display memory to the selection circuit together with a transfer clock, and also outputs a latch pulse. Data pulses and scan clocks are transferred to the timing driver.

The drive waveform of the present invention can be most easily realized when the basic voltage level shown in _FIG . All ON
(or all OFF) display data may be stored. In other words, this means that the number of timing electrodes is J
For a panel with K data electrodes, display data equivalent to a panel with J + α timing electrodes and K data electrodes is stored in memory, and data for α timing electrodes that are not displayed is stored in memory. This means that an extra amount of information is stored in the display memory.

However, since the above method of storing data corresponding to the pause period in the display memory wastes memory, it is actually desirable to add a function to the control circuit. Specifically, the shift register of the timing driver may be reset during the idle period, and the data driver may also supply specific data to all data electrodes in response to the timing reset. This is achieved using a combination of simple counters and logic.

As described above, the present invention can be easily realized by slightly modifying the conventional drive circuit.

As described above, in the method for driving a liquid crystal electro-optical device of the present invention, a liquid crystal is sandwiched between a pair of substrates, and one of the pair of substrates has a plurality of timing lines or data lines, a plurality of nonlinear A switching element consisting of an element and a plurality of pixel electrodes are formed, and the timing line or data line and the switching element consisting of a plurality of nonlinear elements and the plurality of pixel electrodes are electrically connected. In a method for driving a liquid crystal electro-optical device in which a liquid crystal display panel in which a plurality of timing lines or data lines are formed on the other substrate is driven using a two-frame alternating current method, the data lines are passed through the other substrate within one frame period. By providing a pause period for the applied data signal, display unevenness and halftone can be prevented in a liquid crystal electro-optical device using a non-linear element. Furthermore, it also has the advantage that the driving margin increases and matching between the liquid crystal layer and the nonlinear element becomes easier.

The present invention provides an innovative driving method in the field of liquid crystal electro-optical devices that handle a large amount of information.

[Brief explanation of the drawing]

FIG. 1 shows an equivalent circuit for one pixel of a liquid crystal electro-optical device using nonlinear elements. FIG. 2 shows the voltage-current characteristics of the nonlinear element. FIG. 3 is a diagram conceptually showing the voltage waveform applied to the liquid crystal layer. (For simplicity, positive frames are drawn.) Figure 4 shows the two-frame AC drive with frame period t _F.
Voltage applied to m-th timing electrode Tm, n-th data electrode Dn, and pixel (m, n) in ON state
Tm-Dn and the voltage applied to the liquid crystal layer V _LO (m, n)
It is a depiction of a shows the case where the effective voltage applied to the liquid crystal is minimum, b shows the case where it is also the maximum, and c shows the case with a general display pattern. 1... Nonlinear element liquid crystal panel, 2... Data electrode group, 3... Timing electrode group. FIG. 5 shows an example of a drive waveform according to the present invention. a, b, and c correspond to the same display states as in FIG. FIG. 6 shows the voltage _VLO waveform applied to the liquid crystal layer when driving according to the present invention. The solid line is the one according to the present invention, and the broken line is the one according to the conventional drive. a, b, and c correspond to a, b, and c in FIGS. 4 and 5. FIG. 7 shows another example of the drive waveform according to the present invention. The broken line shows the OFF waveform. Note that, in order to explain the concept of the present invention, all of FIGS. 4 to 7 are drawn with the number of digits of the multiplex drive reduced. FIG. 8 is a block diagram of a drive circuit according to the present invention. 4... Data driver section, 5... Timing driver section, 6... Basic voltage level generation section, 7
... Control circuit, 8 ... Display memory, 9 ... Selection circuit, 10 ... Level shifter, 11 ... Demultiplexer.

Claims (1)

[Claims] 1 A liquid crystal is sandwiched between a pair of substrates, and a plurality of timing lines or data lines, a switching element consisting of a plurality of nonlinear elements, and a plurality of pixel electrodes are formed on one of the pair of substrates. , the timing line or data line, a switching element including a plurality of nonlinear elements, and a plurality of pixel electrodes are electrically connected, and a plurality of timing lines or data lines are provided on the other substrate of the pair of substrates. 2 liquid crystal display panels formed by
A method for driving a liquid crystal electro-optical device driven by a frame alternating current method, characterized in that a pause period is provided for a data signal applied through the data line within a period of one frame.