JPS60105252A - Function selective integrated circuit - Google Patents

Function selective integrated circuit

Info

Publication number
JPS60105252A
JPS60105252A JP21201383A JP21201383A JPS60105252A JP S60105252 A JPS60105252 A JP S60105252A JP 21201383 A JP21201383 A JP 21201383A JP 21201383 A JP21201383 A JP 21201383A JP S60105252 A JPS60105252 A JP S60105252A
Authority
JP
Japan
Prior art keywords
integrated circuit
terminals
terminal
input
added
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21201383A
Other languages
Japanese (ja)
Inventor
Bunichi Miyamoto
宮本 文一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21201383A priority Critical patent/JPS60105252A/en
Publication of JPS60105252A publication Critical patent/JPS60105252A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Abstract

PURPOSE:To enable to select any desired function block by controlling the external connection terminal portion of a plurality of function blocks through the switch portion formed on the one and same integrated circuit chip. CONSTITUTION:When ''1'' is added to a control terminal 1 and ''0'' to the other control terminals, ''1'' is added to each of the input-side terminals of AND gate circuit 22, 25, 28, 32, 35 and 38. If ''1'' is inputted through the terminals 11, 13 and 15, ''1'' is inputted to all of the other input-side terminals of the AND gate circuits 30-38, while only the AND gate circuits 32, 35 and 38 become ''ON'' and ''1'' added to the terminal 11, 13 and 15 is inputted to a function block 6. Meanwhile, an output signal from the function block 6 is applied from terminals 61-63 to the input-side terminals of the AND gate circuits 22, 25 and 28. Since ''1'' has been added to the other input-side terminals from the control terminal 1, only the output signals of the terminals 61-63 are outputted from the terminal 14, so that this large scale integrated circuit 7 operates as the function block 6.

Description

【発明の詳細な説明】 fat 発明の技術分野 本発明は機能選択型集積回路に係り、特にゲート・アレ
イ型集積回路に使用する機能選択型集積回路に関するも
のである。
TECHNICAL FIELD OF THE INVENTION The present invention relates to a function selection type integrated circuit, and more particularly to a function selection type integrated circuit used in a gate array type integrated circuit.

(b) 従来技術と問題点 現在、セミカスタムのゲート・アレイ集積回路は大規模
化の方向に向かって進んでいる為に、多くの電子機器、
通信機器はその主要部分の大半或いは大部分は大規模集
積回路1〜2個位で構成される様になってきている。
(b) Prior art and problems At present, semi-custom gate array integrated circuits are progressing in the direction of larger scale, so many electronic devices,
Most or most of the main parts of communication equipment are now composed of one or two large-scale integrated circuits.

しかしながら、上記の主要部分の周辺部の多くは小規模
、多品種であまり量産出来ない、云うなれば大規模集積
回路化しに(い部分になっている。
However, many of the peripheral parts of the above-mentioned main parts are small-scale, multi-product, and cannot be mass-produced; in other words, they are difficult to fabricate into large-scale integrated circuits.

そのため、装置が小型化し難い、製作工数が増加する、
価格が高いなどの問題があった。
As a result, it is difficult to downsize the device, and the number of manufacturing steps increases.
There were problems such as high prices.

(C) 発明の目的 本発明は上記従来技術の問題に渇みなされたものであっ
て、大規模集積回路化が困難な回路の大規模集積回路化
を促進する為の機能選択型集積回路を提供することを目
的としている。
(C) Purpose of the Invention The present invention has been made to solve the problems of the prior art described above, and provides a function selection type integrated circuit for promoting the large-scale integration of circuits that are difficult to integrate into large-scale circuits. is intended to provide.

(d) 発明の構成 上記発明の目的は一つの集積回路用チップ上に形成され
た複数の機能ブロックの外部接続端子部を同一集積回路
チップ上に形成されたスイッチ部を介して該集積回路用
チップを収容したパッケージの外部接続端子部と接続し
、該スイッチ部を外部から制御することにより該複数の
機能プロソクのうちの任意の機能ブロックを選択出来る
様にしたことを特徴とする機能選択型集積回路を提供す
ることにより達成される。
(d) Structure of the Invention The object of the above invention is to connect the external connection terminal portions of a plurality of functional blocks formed on one integrated circuit chip to the integrated circuit via a switch portion formed on the same integrated circuit chip. A function selection type characterized in that an arbitrary functional block among the plurality of functional blocks can be selected by connecting to an external connection terminal section of a package containing a chip and controlling the switch section from the outside. This is accomplished by providing an integrated circuit.

(el 発明の実施例 第1図は本発明の一実施例を示す図である。(el Embodiments of the invention FIG. 1 is a diagram showing an embodiment of the present invention.

図中、1〜3は制御端子を、4〜6は機(jジブロック
を、7は大規模集積回路を、10〜15は大規模集積回
路7の端子を、20〜28及び30〜38はアンドゲー
ト回路を、41〜48.5]、〜58及び61〜68は
機能ブロックの端子をそれぞれ示す。
In the figure, 1 to 3 are control terminals, 4 to 6 are machine blocks, 7 is a large scale integrated circuit, 10 to 15 are terminals of the large scale integrated circuit 7, 20 to 28 and 30 to 38 41 to 48.5], -58 and 61 to 68 indicate terminals of the functional blocks, respectively.

これらの各要素は次の様に接続されている。Each of these elements is connected as follows.

即ち、制御端子1はアンドゲート回路22,25.28
及び32.35.38と、制御端子2はアンドゲート回
路21.24.27及び3L34.37と、制御端子3
はアンドゲート回路20,23.26及び30,33.
36とそれぞれ接続される。
That is, the control terminal 1 is connected to the AND gate circuits 22, 25, 28
and 32.35.38, control terminal 2 is AND gate circuit 21.24.27 and 3L34.37, and control terminal 3
are AND gate circuits 20, 23, 26 and 30, 33 .
36, respectively.

又、端子4L42,43はアントゲ−1−回路20,2
3.26を介して端子10と、端子51,52.53は
アンドゲート回路21,24.27を介して端子12と
、端子6L62.63はアンド回路22,25,213
を介して端子14と、端子45゜46.47はアンドケ
ート回路30,33.36を介しで端子LL 13.1
5と、端子55,56,57.ばアンドゲート回路31
.34.37を介して端子LL13.15と、端子65
,66.67はアンド回路32,35.38を介して端
子11.13.15とそれぞれ接続される。
Also, the terminals 4L42 and 43 are connected to the Antogame 1-circuits 20 and 2.
3.26 to the terminal 10, the terminals 51, 52.53 to the AND gate circuit 21, 24.27 to the terminal 12, and the terminal 6L62.63 to the AND circuit 22, 25, 213.
Terminal 14 through and terminal 45° 46.47 connects to terminal LL 13.1 through AND gate circuit 30, 33.36.
5, and terminals 55, 56, 57 . BAND gate circuit 31
.. 34.37 to terminal LL13.15 and terminal 65
, 66.67 are connected to terminals 11, 13, and 15 via AND circuits 32, 35, and 38, respectively.

この様に接続された機能選択型大規模集積回路の動作は
次の様である。
The function selection type large-scale integrated circuit connected in this manner operates as follows.

即ち、例えば制御端子1に“1”が、他の制御端子に”
 o ”が加えられると7ンドゲー1−回路22.25
.2B、及び32,35.38のそれぞれの入力側の&
::1子に1″が加えられる。
That is, for example, "1" is set at control terminal 1, and "1" is set at other control terminals.
o ” is added, 7nd game 1 - circuit 22.25
.. 2B, and & on each input side of 32, 35.38
:: 1″ is added to 1 child.

そこで、端子11.13及び15から“1゛が入力され
ればアンドゲート回路30〜38の入力側の別の端子は
全て1″が入力されるが、制御端子1から1゛が入力さ
れたアンドゲート回路32+35及び38のみがオンの
状態になり、′端子11.13及び15に加えられた1
″が機能ブロック6に入力される。
Therefore, if "1" is input from terminals 11, 13 and 15, 1" is input to all other terminals on the input side of AND gate circuits 30 to 38, but 1" is input from control terminal 1. Only the AND gate circuits 32+35 and 38 are turned on, and the 1 applied to terminals 11, 13 and 15
” is input to function block 6.

一方、機能ブロック6からの出力信号は端子61〜63
からアンドゲート回路22.25及び28の入力側の端
子に加えられる。このアンドゲート回路の入力側の別の
端子には前記の様に制御端子1からの′“1”が加えら
れているので、端子61〜63の出力信号のみが端子1
4から出力されこの大規模集積回路7は機能ブロック6
として動作する。
On the other hand, the output signal from the functional block 6 is output from terminals 61 to 63.
and is applied to the input side terminals of AND gate circuits 22, 25 and 28. As mentioned above, '1' from control terminal 1 is added to another terminal on the input side of this AND gate circuit, so only the output signals from terminals 61 to 63 are sent to terminal 1.
4, this large-scale integrated circuit 7 is outputted from the functional block 6.
operates as

同様に、制御端子2に“1”を入力すると機能ブロック
5として、制御端子3に“1”を入力すると機能フロッ
ク4として大規模集積回路7はそたが、これは3つに限
定されるものではない事は云うまでもない。
Similarly, when "1" is input to the control terminal 2, the function block 5 is set, and when "1" is input to the control terminal 3, the large-scale integrated circuit 7 is set as the function block 4, but this is limited to three. Needless to say, it is not a thing.

又スイッチ回路としてアンドゲート回路を使用したが、
これもアンドゲート回路に限定されるものではなく原理
的にはスイッチ回路であれば良い。
Also, I used an AND gate circuit as a switch circuit, but
This is also not limited to an AND gate circuit, and in principle any switch circuit may be used.

更に、第1図では機能ブロック4,5.6は互に独立の
ブロックになっているが必ずしも独立である必要はなく
、一部機能に就いては一部のブロック間又は全部のブロ
ック間で共通にする事ができる事は当然である。
Furthermore, although functional blocks 4, 5, and 6 are mutually independent blocks in FIG. 1, they do not necessarily have to be independent; some functions may be exchanged between some or all blocks. It goes without saying that things can be made common.

(fl 発明の詳細 な説明した様に本発明によれば、1個の集積回路チップ
に複数の機能ブロックを形成し、その各機能ブロックの
外部接続端子と集積回路パッケージの外部接続端子との
間を外部からの制御に依ってオンまたはオフが可能なス
イッチ回路を介して接続する様に構成する。
(fl As described in detail, according to the present invention, a plurality of functional blocks are formed on one integrated circuit chip, and between the external connection terminal of each functional block and the external connection terminal of the integrated circuit package. is connected via a switch circuit that can be turned on or off under external control.

ソシて、この集積回路の完成後はこのスイッチ回路を制
御して複数の機能ブロックの中の一つの機能ブロックの
みを集積回路パッケージの外部接続端子に接続出来る様
にした為、1(1間の集積回路チップによる1個の集積
回路として設計・型造されながら使用する段階では複数
の種類の集積回路と等価となる。
So, after this integrated circuit was completed, we controlled this switch circuit so that only one of the multiple functional blocks could be connected to the external connection terminal of the integrated circuit package. Although it is designed and molded as a single integrated circuit using an integrated circuit chip, when it is used, it becomes equivalent to multiple types of integrated circuits.

従って、比較的大規模のセミカスタムゲ−1−・アレイ
の集積回路チップに比較的小規模の回路を多数搭載して
も比較的小型の安1i11iなパッケージで間に合わせ
ることが出来る。
Therefore, even if a large number of relatively small-scale circuits are mounted on a relatively large-scale semi-custom game array integrated circuit chip, it can be done with a relatively small and inexpensive package.

又、機能が拡大される為に用途も広かり、■個当たりの
需要も拡大され量産効果によるコストの低域にも役立つ
In addition, since the functions are expanded, the applications are also widened, ■The demand per unit is expanded, and the mass production effect is useful for lowering costs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す。 図中、1〜3は制御端子を、4〜6は機能ブロックを、
7は大規模集積回路を、10〜15.41〜48゜51
〜58.61〜68は端子を、20〜28及び30〜3
8はアントケート回路をそれぞれ示す。
FIG. 1 shows an embodiment of the invention. In the figure, 1 to 3 are control terminals, 4 to 6 are functional blocks,
7 is a large-scale integrated circuit, 10~15.41~48°51
~58.61~68 are terminals, 20~28 and 30~3
8 each indicate an anchor circuit.

Claims (1)

【特許請求の範囲】[Claims] 一つの集積回路用チップ上に形成された複数の機能ブロ
ックの外部接続端子部を同一集積回路チップ上に形成さ
れたスイッチ部を介して該集積回路用チップを収容した
パッケージの外部接続端子部と接続し、該スイッチ部を
外部から制御することにより該複数の機能ブロックのう
ちの任意の機能ブロックを選択出来る様にしたことを特
徴とする機能選択型集積回路。
The external connection terminal portions of a plurality of functional blocks formed on one integrated circuit chip are connected to the external connection terminal portion of a package housing the integrated circuit chip via a switch portion formed on the same integrated circuit chip. 1. A function selection type integrated circuit, wherein any one of the plurality of functional blocks can be selected by connecting the plurality of functional blocks and controlling the switch section from the outside.
JP21201383A 1983-11-11 1983-11-11 Function selective integrated circuit Pending JPS60105252A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21201383A JPS60105252A (en) 1983-11-11 1983-11-11 Function selective integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21201383A JPS60105252A (en) 1983-11-11 1983-11-11 Function selective integrated circuit

Publications (1)

Publication Number Publication Date
JPS60105252A true JPS60105252A (en) 1985-06-10

Family

ID=16615433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21201383A Pending JPS60105252A (en) 1983-11-11 1983-11-11 Function selective integrated circuit

Country Status (1)

Country Link
JP (1) JPS60105252A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145901A (en) * 1985-12-19 1987-06-30 Mitsubishi Electric Corp Oscillation circuit
JPS62241365A (en) * 1986-04-11 1987-10-22 Nec Corp Method for making system into lsi
JPH01134790A (en) * 1987-11-19 1989-05-26 Mitsubishi Electric Corp Semiconductor storage device
WO1994008356A1 (en) * 1992-10-02 1994-04-14 Seiko Epson Corporation Semiconductor memory device
US5563821A (en) * 1992-10-02 1996-10-08 Seiko Epson Corporation Semiconductor memory device having a program circuit for selecting device type
US7148503B2 (en) 2000-10-05 2006-12-12 Matsushita Electric Industrial Co., Ltd. Semiconductor device, function setting method thereof, and evaluation method thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145901A (en) * 1985-12-19 1987-06-30 Mitsubishi Electric Corp Oscillation circuit
JPS62241365A (en) * 1986-04-11 1987-10-22 Nec Corp Method for making system into lsi
JPH01134790A (en) * 1987-11-19 1989-05-26 Mitsubishi Electric Corp Semiconductor storage device
WO1994008356A1 (en) * 1992-10-02 1994-04-14 Seiko Epson Corporation Semiconductor memory device
US5563821A (en) * 1992-10-02 1996-10-08 Seiko Epson Corporation Semiconductor memory device having a program circuit for selecting device type
US7148503B2 (en) 2000-10-05 2006-12-12 Matsushita Electric Industrial Co., Ltd. Semiconductor device, function setting method thereof, and evaluation method thereof

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