JPS5850768A - Semiconductor ic device - Google Patents

Semiconductor ic device

Info

Publication number
JPS5850768A
JPS5850768A JP56150334A JP15033481A JPS5850768A JP S5850768 A JPS5850768 A JP S5850768A JP 56150334 A JP56150334 A JP 56150334A JP 15033481 A JP15033481 A JP 15033481A JP S5850768 A JPS5850768 A JP S5850768A
Authority
JP
Japan
Prior art keywords
power supply
voltage
circuit
contact pairs
constant voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56150334A
Other languages
Japanese (ja)
Inventor
Shigeru Yasuda
茂 安田
Eijiro Toyoda
豊田 栄次郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP56150334A priority Critical patent/JPS5850768A/en
Publication of JPS5850768A publication Critical patent/JPS5850768A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/59Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load

Abstract

PURPOSE:To enable to easily convert the source voltage in a C MOS IC and thus contrive the realization of a system directive to a low power consumption, by changing the mask of wiring members. CONSTITUTION:The group of contact pairs 2-1-2-n is purposed to connect the pad for the power source 1 to supply the source voltage from the outside of the IC to a specific constant-voltage regulated power supply circuit 3-i, and the group of contact pairs 4-1-4-n is purposed to connect the specific constant-voltage regulated power supply circuit 3-i to the power source line 6 of an internal functional block 5. To fit the using purpose of the C MOS IC, the group of contact pairs are kept as follows, that is only a pair of contact pairs 2-i and 4-i before and behind the used constant voltage circuit 3-i in a state of conduction and the other contact pairs all in a state of non-conduction. When the source voltage used in common to the system is supplied from the pad for the power source 1, it is converted into the source voltage fitted to the using purpose by mediating contact pair 2-i, constant-voltage regulated supply circuit 3-i and contact pair 4-i and supplied into the power source line 6 to the internal functional block 5.

Description

【発明の詳細な説明】 この発明は同一半導体基板に内蔵した2種類以上の定電
圧電源回路を、接点対群によって任意にパ1− 選択可能とする構成の半導体集積回路装置に関するもの
である。有用な応用例として相補型MO8集積回路につ
いて説明する。近年低消費電力を目的として相補型MO
8集積回路を使ったシステムが多く用いられるようにな
ってきたが、一般に相補型MO8集積回路ではその消費
電流が電源電圧、及び電源電圧によって制限される動作
速度に比例する。従って低消費電力にするため電源電圧
及び動作速度は使用目的を達成する範囲内において可能
な限り低くすることが望まれている。ところでマイクロ
コンピュータ等の汎用に使用される集積回路は仕様に記
載されている電源電圧の範囲内で高速動作を確保するた
めに内部機能回路ブロックは高速仕様を満足するように
設計する。しかし使用目的によって、動作速度において
必ずしも高速を必要としないが他の低速仕様のマイクロ
コンピュータでは遅すぎて使用でき彦い場合には高速仕
様ノマイクロコンピュータを使用せざるを得ない。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit device having a structure in which two or more types of constant voltage power supply circuits built into the same semiconductor substrate can be arbitrarily selected by a group of contact pairs. A complementary MO8 integrated circuit will be described as a useful application example. In recent years, complementary MO has been developed for the purpose of lower power consumption.
Systems using MO8 integrated circuits have come into widespread use, and in general, the current consumption of complementary MO8 integrated circuits is proportional to the power supply voltage and the operating speed limited by the power supply voltage. Therefore, in order to reduce power consumption, it is desired that the power supply voltage and operating speed be as low as possible within the range that achieves the intended use. By the way, in general-purpose integrated circuits such as microcomputers, internal functional circuit blocks are designed to satisfy high-speed specifications in order to ensure high-speed operation within the power supply voltage range specified in the specifications. However, depending on the purpose of use, if a high operating speed is not necessarily required but other low-speed microcomputers are too slow to use, a high-speed microcomputer must be used.

この時集積回路を含むシステムで共通に用いる電源電圧
は高速仕様の集積回路にとっては充分すぎるものとなり
、実際それ以下の電圧を集積回路に印加しても充分に使
用目的を満足し、かつ消費電力の点では有益である。但
し、集積回路のだめの特別な電源電圧を集積回路の外部
で実現しようとすれば外部においで余分の電源を用意し
なければならない。
At this time, the power supply voltage commonly used in systems containing integrated circuits is more than sufficient for high-speed integrated circuits, and in fact, even if a lower voltage is applied to the integrated circuit, it still satisfies the purpose of use and consumes less power. It is beneficial in this respect. However, if a special power supply voltage for the integrated circuit is to be realized outside the integrated circuit, an extra power supply must be provided externally.

この発明は半導体集積回路の外部から供給される単一の
電源電圧に対し、半導体基板に内蔵した2種類以上の定
電圧電源回路から、半導体集積回路装置の素子製造過程
(例えば金属配線蒸着工槌の段階で配線部材(例えば前
記金属配線)をマスクプログラマブルにより選択的に構
成し、この配線部材によりそのうちの少なくとも1つを
使用目的に応じて適宜選択することによって半導体集積
回路の内部機能口・路ブロックの電源電圧を最適な値に
変換し、消費電力に無駄の少ないシステムの構成を目的
としたものである。
This invention utilizes two or more types of constant voltage power supply circuits built into a semiconductor substrate in response to a single power supply voltage supplied from the outside of a semiconductor integrated circuit, in the process of manufacturing elements of a semiconductor integrated circuit device (for example, using a metal wiring evaporation hammer). At this stage, wiring members (for example, the metal wiring) are selectively configured using a mask programmable mask, and at least one of the wiring members is appropriately selected depending on the purpose of use, thereby forming internal functional ports and paths of the semiconductor integrated circuit. The purpose is to convert the block power supply voltage to an optimal value and configure a system with less wasted power consumption.

第1図に本発明の一実施例を示す。第1図は同一半導体
基板に内蔵されたn種類の定電圧回路からなる定電圧電
源回路群3−1〜3−nのうちから1つだけを選択して
内部機能回路ブロック5に必要充分なる電源電圧を供給
する相補型MO8集積回路のブロック図である。基板上
には通常動作に必要な内部機能回路ブロック5及びその
電源ライン6のほかに定電圧電源回路群3−1〜3−n
FIG. 1 shows an embodiment of the present invention. FIG. 1 shows that only one of the constant voltage power supply circuit groups 3-1 to 3-n consisting of n types of constant voltage circuits built into the same semiconductor substrate is selected to provide the necessary and sufficient internal function circuit block 5. FIG. 2 is a block diagram of a complementary MO8 integrated circuit that provides a power supply voltage. On the board, in addition to the internal functional circuit block 5 and its power supply line 6 necessary for normal operation, there are constant voltage power supply circuit groups 3-1 to 3-n.
.

接点対群2−1〜2−n1及び接点対群4−1〜4−n
がある。接点対群2−1〜2−nは集積回路の外部から
電源電圧を供給するだめの電源用パッド1を特定の定電
圧電源回路3−iと接続するだめのものであり、接点対
群4−1〜4−nは特定の定電圧電源回路3−iを内部
機能ブロック5の電源ライン6に接続するだめのもので
ある。相補型MO3集積回路の使用目的に合うように接
点対群は使用する定電圧回路3−iの前後の1組の接点
対2−iと4−iだけを導通状態、その他の接点対は全
て非導通状態にしておく。電源用パッド1から相補型M
O8集積回路を含むシステムにおいて共通に使用する電
源電圧を供給すると、接点対2−1.定電圧□電源回路
3−1.接点対4−1を介することにより使用目的に合
った電源電圧に変換されて内部機能回路ブ・ロック6の
電源ライン6に供給される。この時、定電圧電源回路群
3−1〜3−nの前後に接点対群2−1〜2−n及び4
−1〜4−nを配することによって、使用しない定電圧
電源回路での不必要な電力の消費をなくシ(接点対群2
−1〜2−nによる)、又内部機能ブロック6の電源ラ
イン6に対する寄生的な効果をなくす(接点対群4−1
〜4−nによる)ことができる。
Contact pair groups 2-1 to 2-n1 and contact pair groups 4-1 to 4-n
There is. Contact pair groups 2-1 to 2-n are used to connect the power supply pad 1, which supplies power voltage from outside the integrated circuit, to a specific constant voltage power supply circuit 3-i. -1 to 4-n are for connecting a specific constant voltage power supply circuit 3-i to the power supply line 6 of the internal functional block 5. In order to meet the purpose of use of the complementary MO3 integrated circuit, the contact pair group is such that only one contact pair 2-i and 4-i before and after the constant voltage circuit 3-i to be used is in a conductive state, and all other contact pairs are in a conductive state. Leave it in a non-conducting state. Complementary type M from power pad 1
When a power supply voltage commonly used in a system including an O8 integrated circuit is supplied, contact pair 2-1. Constant voltage □ Power supply circuit 3-1. It is converted into a power supply voltage suitable for the purpose of use and supplied to the power supply line 6 of the internal functional circuit block 6 via the contact pair 4-1. At this time, contact pair groups 2-1 to 2-n and 4 are placed before and after constant voltage power supply circuit groups 3-1 to 3-n.
-1 to 4-n eliminates unnecessary power consumption in unused constant voltage power supply circuits (contact pair group 2
-1 to 2-n), and also eliminate the parasitic effect of the internal functional block 6 on the power supply line 6 (contact pair group 4-1
~4-n).

第2図は半導体基板に内蔵された定電圧電源回路群の中
から必要に応じて2つ以上の定電圧電源回路を選択する
場合の相補型MO8集積回路のブロック図である。基板
上には前記第1図における構成のほかに内部機能ブロッ
ク5からの信号を集積回路の外部に伝えるインタフェイ
ス回路7及びその電源ライスがある。電源用ノくラド1
から供給される電源電圧は接点対2−5.定電圧電源回
路3−5.接点対4−jなる経路により内部機能回路ブ
ロック5の電源ライン6に供給され、又電源角パッド1
から接点対2−に、定電圧電源回路3−に、接点対4−
になる経路によりインタフェイス回路7の電源ライン8
に供給される。さらにこの場合、電源用パッド1を内部
機能回路ブロック5の電源ライン6或いはインタフェイ
ス回路7の電源ラインと直接に接続する接点対を設ける
ことも可能である。
FIG. 2 is a block diagram of a complementary MO8 integrated circuit in which two or more constant voltage power supply circuits are selected from a group of constant voltage power supply circuits built into a semiconductor substrate as necessary. In addition to the configuration shown in FIG. 1, the board includes an interface circuit 7 for transmitting signals from the internal functional block 5 to the outside of the integrated circuit and its power source. Nokurado 1 for power supply
The power supply voltage supplied from contact pair 2-5. Constant voltage power supply circuit 3-5. It is supplied to the power line 6 of the internal functional circuit block 5 through the path of contact pair 4-j, and the power supply square pad 1
to contact pair 2-, to constant voltage power supply circuit 3-, to contact pair 4-
The power line 8 of the interface circuit 7
supplied to Furthermore, in this case, it is also possible to provide a contact pair that directly connects the power supply pad 1 to the power supply line 6 of the internal functional circuit block 5 or the power supply line of the interface circuit 7.

以上の如く本発明は配線部材のマスクを変更することに
よって相補型MO8集積回路の内部での電源電圧を容易
に変換することを可能とし、低消費電力志向のシステム
の実現に大きな効果をもたらすものである。なお以上の
説明は相補型MO8集積回路について行なったが一般の
半導体集積回路についても適用可能である。
As described above, the present invention makes it possible to easily convert the power supply voltage inside a complementary MO8 integrated circuit by changing the mask of the wiring member, and has a great effect on realizing a system oriented toward low power consumption. It is. Although the above description has been made regarding a complementary MO8 integrated circuit, it is also applicable to general semiconductor integrated circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は本発明による相補型MO8集積回路
の概要を示すブロック図である。 1・・・・・・電源用パッド、2−1〜2−n・・・・
・・接点対群、3−1〜3−n・・・・・・定電圧電源
回路群、4−1〜4−n・・・・・・接点対群、5・・
・・・・内部機能回路ブロック、6・・・・・・内部機
能ブロック6の電源ライン、7・・・・・・インタフェ
イス回路、74−− 8−・・・・・・インタフェイス回路7の電源ライン。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
1 and 2 are block diagrams schematically showing a complementary MO8 integrated circuit according to the present invention. 1... Power supply pad, 2-1 to 2-n...
...Contact pair group, 3-1 to 3-n... Constant voltage power supply circuit group, 4-1 to 4-n... Contact pair group, 5...
...Internal functional circuit block, 6... Power line of internal functional block 6, 7... Interface circuit, 74-- 8-... Interface circuit 7 power line. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (1)

【特許請求の範囲】[Claims] (1)同一半導体基板において2種類以上の定電圧電源
回路を設け、前記定電圧電源回路の各々の入力部と外部
電源入力端子との間、及び前記定電圧電源回路の各々の
出力部と集積回路の機能回路ブロック群の電源ラインと
の間を、それぞれ選択的に接続可能とする接点対を設け
て接続し、機能回路ブロック群に印加される動作電圧が
前記定電圧電源回路から接点対により選択設定されるこ
とを特徴とする半導体集積回路装置。 (2、特許請求の範囲第1項記載の半導体集積回路装置
において、接点対を配線部材によシ選択的に構成するこ
とを特徴とする半導体集積回路装置。
(1) Two or more types of constant voltage power supply circuits are provided on the same semiconductor substrate, and integrated between the input section of each of the constant voltage power supply circuits and the external power input terminal, and with the output section of each of the constant voltage power supply circuits. The functional circuit blocks of the circuit are connected to the power supply lines by providing contact pairs that can be selectively connected to each other, and the operating voltage applied to the functional circuit blocks is connected from the constant voltage power supply circuit to the contact pairs. A semiconductor integrated circuit device characterized by being selectively set. (2. A semiconductor integrated circuit device according to claim 1, wherein the contact pairs are configured selectively depending on wiring members.
JP56150334A 1981-09-21 1981-09-21 Semiconductor ic device Pending JPS5850768A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56150334A JPS5850768A (en) 1981-09-21 1981-09-21 Semiconductor ic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56150334A JPS5850768A (en) 1981-09-21 1981-09-21 Semiconductor ic device

Publications (1)

Publication Number Publication Date
JPS5850768A true JPS5850768A (en) 1983-03-25

Family

ID=15494733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56150334A Pending JPS5850768A (en) 1981-09-21 1981-09-21 Semiconductor ic device

Country Status (1)

Country Link
JP (1) JPS5850768A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6074455A (en) * 1983-09-29 1985-04-26 Fujitsu Ltd Master slice integrated circuit
JPS60113946A (en) * 1983-11-25 1985-06-20 Nec Corp Characteristic correction type master slice gate array
JPH0297058A (en) * 1988-10-03 1990-04-09 Mitsubishi Electric Corp Semiconductor memory device
JPH0462963A (en) * 1990-07-02 1992-02-27 Kawasaki Steel Corp Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156354A (en) * 1979-05-24 1980-12-05 Nippon Telegr & Teleph Corp <Ntt> Feeding method for large scale semiconductor ic

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156354A (en) * 1979-05-24 1980-12-05 Nippon Telegr & Teleph Corp <Ntt> Feeding method for large scale semiconductor ic

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6074455A (en) * 1983-09-29 1985-04-26 Fujitsu Ltd Master slice integrated circuit
JPH0531309B2 (en) * 1983-09-29 1993-05-12 Fujitsu Ltd
JPS60113946A (en) * 1983-11-25 1985-06-20 Nec Corp Characteristic correction type master slice gate array
JPH0470784B2 (en) * 1983-11-25 1992-11-11 Nippon Electric Co
JPH0297058A (en) * 1988-10-03 1990-04-09 Mitsubishi Electric Corp Semiconductor memory device
JPH0462963A (en) * 1990-07-02 1992-02-27 Kawasaki Steel Corp Semiconductor device

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