JPS599995A - Method of mounting part of hybrid integrated circuit device - Google Patents

Method of mounting part of hybrid integrated circuit device

Info

Publication number
JPS599995A
JPS599995A JP11853582A JP11853582A JPS599995A JP S599995 A JPS599995 A JP S599995A JP 11853582 A JP11853582 A JP 11853582A JP 11853582 A JP11853582 A JP 11853582A JP S599995 A JPS599995 A JP S599995A
Authority
JP
Japan
Prior art keywords
circuit board
integrated circuit
components
hybrid integrated
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11853582A
Other languages
Japanese (ja)
Inventor
角田 莞爾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11853582A priority Critical patent/JPS599995A/en
Publication of JPS599995A publication Critical patent/JPS599995A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は混成集積回路装置の回路基板の両面に部品を取
付ける方法に係り、特に混成集積回路装置の高密度実装
化に有効な方法を揚供するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for attaching components to both sides of a circuit board of a hybrid integrated circuit device, and particularly provides a method effective for high-density packaging of a hybrid integrated circuit device.

混成集積回路装置の高集積化を行なう場合、混成集積回
路装着の内部の回路基板の両面にリード線を有しないチ
ップ部品やフラットパッケージ等のLSIなどを取り付
けて集積度を上げる方法を取っている。以下従来行って
いた方法について第1図に従って述べる。部品を取り付
ける電極2を持つ回路基板1の一方の面に接着剤ろを塗
布しチップ部品4を搭載して接着剤6を硬化し、チップ
部品4を固定する。次に他の一方の面にも同様に接着剤
6′を塗布し、フラットパッケージ等の面付部品6を載
せ、接着剤6′を硬化し、面付部品6を固定する。次に
外部リード7を部品搭載を終了した回路基板に挿入した
後、溶融半田に浸漬し搭載した部品及び外部リードの半
田付を行ない外装樹脂(図示せず)で覆い混成集積回路
装置を製作していた。しかしながら面付部品6がLSI
等のリードを多数持つ場合には溶融半田に浸漬するとL
SI等のリード部間に半田タッチが生じ修正する作業が
多(かかっていた。又、回路基板の両面に接着剤塗布作
業が必要であり工数が多(かかる欠点があった。
When increasing the degree of integration of a hybrid integrated circuit device, a method is used to increase the degree of integration by attaching chip components without lead wires, LSIs such as flat packages, etc. to both sides of the circuit board inside the hybrid integrated circuit device. . The conventional method will be described below with reference to FIG. An adhesive layer is applied to one surface of a circuit board 1 having an electrode 2 to which a component is attached, a chip component 4 is mounted, the adhesive 6 is hardened, and the chip component 4 is fixed. Next, an adhesive 6' is applied to the other side in the same manner, a surface-mounted component 6 such as a flat package is placed thereon, the adhesive 6' is cured, and the surface-mounted component 6 is fixed. Next, after inserting the external leads 7 into the circuit board on which components have been mounted, the mounted components and external leads are soldered by immersing them in molten solder, and then covered with an exterior resin (not shown) to produce a hybrid integrated circuit device. was. However, surface mounted part 6 is LSI
If you have a large number of leads such as
Solder touches occur between the lead parts of the SI, which requires a lot of work to repair.Also, it requires a lot of man-hours because it requires applying adhesive to both sides of the circuit board.

本発明の目的は接着剤を塗布する工程を減らし又LSI
等のリードが多数ある部品の半田タッチ不良を皆無にす
る混成集積回路装置の部品取付方法を提供するにある。
The purpose of the present invention is to reduce the process of applying adhesive and to
It is an object of the present invention to provide a component mounting method for a hybrid integrated circuit device that completely eliminates solder touch failures in components having a large number of leads.

上記目的は回路基板の一方の面に接着剤を塗布し部品を
固定し、溶融半田槽に浸漬し半田付すると同時に他方の
面の電極に迎え半田を行なう。次に迎え半田されたとこ
ろにLSI等の部品を載せ、加熱し半田接続することに
より達成できる、 以下本発明の一実施例を第2図、第3図により説明する
。第2図は回路基板の一方の面にチップ部品を搭載し、
半田接続した本実施例を説明する図であり、第3図は第
2図に続いて他方の面にLSIを搭載し半田接続した本
実施例を説明する図であり、1は回路基板、2t、  
2r+は電極、5″は接続剤、4′はチップ部品、5’
、5”は半田、6′はL S I、7′は外部リードで
ある。
The above purpose is to apply an adhesive to one side of a circuit board to fix the parts, dip it into a molten solder bath and solder it, and at the same time apply solder to the electrodes on the other side. Next, an embodiment of the present invention, which can be achieved by placing a component such as an LSI on the soldered part, heating it, and making a solder connection, will be described below with reference to FIGS. 2 and 3. Figure 2 shows chip components mounted on one side of the circuit board.
FIG. 3 is a diagram illustrating this embodiment in which an LSI is mounted on the other surface and connected by solder, following FIG. 2, and 1 is a circuit board, 2t ,
2r+ is an electrode, 5″ is a connecting agent, 4′ is a chip component, 5′
, 5'' is solder, 6' is LSI, and 7' is an external lead.

第2図において回路基板1′の一方の面のチップ部品4
′が搭載される場所に接着剤6″を塗布し、その上にチ
ップ部品4′を搭載する。その後接着剤3″を硬化しチ
ップ部品4′を固定する。次に外部リード7′をチップ
部品4′を搭載した回路基板1′に挿入し溶融半田槽中
VC,浸漬し半田5′により電極2′とチップ部品4′
及び外部リード7′を接続する。この時、回路基板1′
の他方の面の電極2″には迎え半田の形で半田5#が付
く。次に46図に示す様にL S I 6’のリードを
電極2#に合わせて搭載し、刀口熱して半田5#ヲ溶融
することにより半田付を行ないJ、 S I 6’のリ
ードと電極2#を接続する。その後外装樹脂を塗布して
混成集積回路装置を完成させる。
In FIG. 2, the chip component 4 on one side of the circuit board 1'
Adhesive 6'' is applied to the place where the chip 4' is to be mounted, and the chip component 4' is mounted thereon.The adhesive 3'' is then cured and the chip component 4' is fixed. Next, the external lead 7' is inserted into the circuit board 1' on which the chip component 4' is mounted, and immersed in the VC in a molten solder bath, and the electrode 2' and the chip component 4' are connected by soldering 5'.
and connect the external lead 7'. At this time, circuit board 1'
Solder 5# is attached to the electrode 2'' on the other side of the board in the form of pick-up solder.Next, as shown in Figure 46, the lead of LSI 6' is mounted to match the electrode 2#, and the solder is applied with heat. By melting 5#, soldering is performed to connect the leads of J and SI 6' and electrode 2#.After that, an exterior resin is applied to complete the hybrid integrated circuit device.

fなわち回路基板1′の一方の面にチップ部品4′を接
着剤6′で固定し半田浸漬を行なうので他方の面の電極
2″に半田5″が付く。この時半田5″の1はit 4
k 2”のパターン形状で一定量に規定されるのでLS
Iのリード部のみ半田付が行なわれる為LSIのリード
間のショートが発生する危険が無く半田付不良を皆無に
することが出来る。
In other words, since the chip component 4' is fixed to one side of the circuit board 1' with an adhesive 6' and dipped in solder, the solder 5'' is attached to the electrode 2'' on the other side. This Santa 5″ 1 is it 4
Since it is defined as a certain amount by the pattern shape of k2'', LS
Since only the lead portion of I is soldered, there is no risk of short-circuiting between the leads of the LSI, and soldering defects can be completely eliminated.

本発明によiLば回路基板の両面に部品を取り付ける場
合一方σ)面の部品を半田浸漬により接続すると同時に
他方の面の成極には迎え半田されるため半田量が規定さ
れ、搭載部品のリード間ンヨートの半田付不良は無くな
り、又接着剤塗布の工程が減り工数が少な(て済む効果
がある。
According to the present invention, when components are mounted on both sides of a circuit board, the components on one side (σ) are connected by solder dipping, and at the same time the other side is polarized and soldered. There are no soldering defects between the leads, and the process of applying adhesive is reduced, resulting in fewer man-hours.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来技術により搭載部品を組み立てた回路基板
の断面図、第2図、第6図は本発明の一実施例の搭載部
品を組み立てた回路基板の断面図である。 1′・・・回路基板    3″・・・接着剤4′・・
チップ部品   6′・、LSI−43( 才30 に′
FIG. 1 is a cross-sectional view of a circuit board with mounted components assembled according to a conventional technique, and FIGS. 2 and 6 are cross-sectional views of a circuit board with mounted components assembled according to an embodiment of the present invention. 1'...Circuit board 3''...Adhesive 4'...
Chip parts 6', LSI-43 (30 years old)

Claims (1)

【特許請求の範囲】[Claims] 混成集積回路の回路基板の両面に搭載部品を取付ける方
法において、第1に前記回路基板の一方の面に搭載部品
を接着剤で固定し、溶融半田に浸漬して半田付すると同
時に回路基板の他方の面の搭載部品が半田付される電極
に向え半田を行ない、第2に前記迎え半田された電極に
搭載部品を配置し、その後加熱して半田を溶融させて回
路基板に電気的1機械的に接合させたことを特徴とする
混成集積回路装置の部品取付方法。
In a method for attaching mounted components to both sides of a circuit board of a hybrid integrated circuit, first, the mounted components are fixed to one side of the circuit board with an adhesive, dipped in molten solder to be soldered, and simultaneously attached to the other side of the circuit board. The mounting components on the surface are soldered to the electrodes to be soldered. Second, the mounting components are placed on the soldered electrodes, and then heated to melt the solder and attach an electrical wire to the circuit board. A method for attaching components of a hybrid integrated circuit device, characterized in that the components are joined together.
JP11853582A 1982-07-09 1982-07-09 Method of mounting part of hybrid integrated circuit device Pending JPS599995A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11853582A JPS599995A (en) 1982-07-09 1982-07-09 Method of mounting part of hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11853582A JPS599995A (en) 1982-07-09 1982-07-09 Method of mounting part of hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS599995A true JPS599995A (en) 1984-01-19

Family

ID=14738994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11853582A Pending JPS599995A (en) 1982-07-09 1982-07-09 Method of mounting part of hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS599995A (en)

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