JPS5999769A - Semiconductor device - Google Patents

Abstract

PURPOSE:To equalize the turn off time of each cathode-emitter in a substrate by a method wherein the width of cathode-emitter layer is reduced in proportion to the distance from the connecting point of a gate lead to a gate electrode. CONSTITUTION:Making a practical application of the fact that a turn off time may be shortened by reducing the size of a cathode emitter, the length of all cathode emitters of GTO is equalized while the width thereof is reduced in proportion to the distance from the connecting point of leads 8(81, 82). By means of properly changing the size of cathode emitters in this way, the negative bias of the cathode emitters at the point distant from the connecting point of the lead 8 is reduced, however the width of cathode emitters is proportionally reduced to make turning off easier. Resultantly all cathode emitters may be simultaneously turned off. Making a practical application of such a constitution to a transistor with multiple emitters, a base electrode opposing to a gate electrode may be made effective.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device such as a gate turn-off silicon (G'r6) having a plurality of divided emitters and a transistor.

[Technical background of the invention and its problems]

Figures 1(a) and 1(b) are GTOs made using conventional technology.
It is a top view of an example, and its AA' sectional view. 1 is the emitter N, 2 is the base layer, 3 is the p space layer (I), and the h emitter layer (cannide emitter layer) 4 (41°4□) divided into many parts on the surface of the p' page layer 3 is
2...) is formed. 5 (51, 5□,...
) is a cando electrode made of At or the like, 6 is a dart electrode commonly arranged surrounding the cathode emitter, and 7 is a dart electrode.
is the anode electrode. 8 (8i+8□) is a dirt lead wire that electrically connects the gate electrode 6 and an external r-to pulse generator, and in the figure, it contacts the dirt electrode 6 at two points. In the case shown, the cathode emitter layers 4 are arranged radially in four annular shapes.

In FIG. 1 (direct), for simplicity, only two cans and two domics are shown for each ring, and other cathode emitters are shown by broken lines and omitted. As shown in the figure, the conventional method has been to arrange cathode emitter layers 4 of the same shape in parallel.

In addition to the type of GTO in which the contacts of the cable lead wires are provided around the GTO base as shown in FIG. 1, there is also a type of GTO provided in the center of the GTO base called a center dart.

As is widely known, the dart turn-off operation of the GTO is performed by applying a reverse voltage between the cathode and the dart and sucking current from the dart. Therefore, the current sucked out to various parts of the dart electrode during dart turn-off flows from each point to the nearest contact point with the lead wire. At this time, a voltage drop occurs due to the lateral resistance of the dart electrode 6.

Because such a voltage drop occurs, even if a reverse voltage is applied between the dirt layer and the cathode, the reverse voltage (junction voltage at G-) between the dirt layer and the dirt layer as seen from each cathode electrode 5 differs.

Since the gate electrode @6 is generally formed of metal such as Atn using a vacuum evaporation device, its thickness is 10
It is extremely thin at ~20 [μm] and has a lateral resistance of several hundred [μm].
μΩ] to several tens of mΩ. When a negative dart current of several tens to hundreds of amperes flows through a gate electrode layer having such resistance, the voltage drop that occurs in the dart electrode is several tens of meters (meters).
V) to several hundred [mv]. Therefore, the cathode emitter layer located at the longest distance from the contact position of the dirt lead wire 8 has a lower negative bias than the cathode emitter layer closer to it.

This difference in negative bias causes a difference in the time until gate turn-off (toff),
Current concentration occurs because current flows to the cathode emitter with the longest turn-off time until the end. This current concentration causes partial overheating of the GTO substrate, which has the disadvantage of causing characteristic deterioration and destruction.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a semiconductor device with improved reliability by making the turn-off time of each cathode emitter uniform.

[Summary of the invention]

The invention takes advantage of the fact that reducing the dimensions of the cathode emitter reduces the turn-off time.

That is, the cathode emitter distribution is divided into at least two regions depending on the distance from the contact position of the gate lead wire with the dirt electrode, and the width of the cathode emitter layer in the region far from the contact position is made smaller than that in the near region. By setting υ, the turn-off time of each cathode emitter region in the substrate is made uniform.

〔Effect of the invention〕

By applying the present invention to GTO, the following effects can be obtained.

■ All cathode emics of the GTO can be gated turned on at approximately the same time, thus greatly increasing the overall isolation capacity.

■ Even if the present invention is applied, the manufacturing cost will not increase because only the dimensions are changed on the mask.

■ Highly reliable and easy-to-use GTO can be obtained.

Similar effects can be obtained even when the present invention is applied to a transistor having a split emitter structure.

[Embodiments of the invention]

Before explaining the embodiments of the present invention, as a basic experiment, we will examine the width of the cathode emitter and the date Kuhn-off time (when the anode current is flowing in the forward direction in the GTO, the anode current starts from the time when negative bias is applied to the gate). The relationship between f7c7''' and f7c7''' is shown in FIG. 2.

The turn-off time is exponentially longer if the width of the cathode emitter is wide; if the width exceeds a certain level, so-called squeezing, which narrows the current-carrying area of the GTO, becomes insufficient and turn-off becomes impossible.

As shown in FIG. 2, by applying the fact that the turn-off time varies depending on the width of the cathode emitter, it is possible to make the turn-off time of the cathode electrode over the entire surface of the GTO substrate substantially uniform.

FIG. 3 shows a plan view of a GTO according to an embodiment of the present invention. The base structure is the same as that shown in FIG. 1, so a cross-sectional view is omitted, and parts corresponding to those in FIG. 1 are given the same reference numerals. The length of the cathode emitters 4 is all the same, and the difference from the conventional one is that the width becomes thinner as the distance from the contact position of the lead wire 8 increases. Actually, in the case of a wafer of 8cnIφ and a rated current of 3 (100A, the central part of the wafer
c! Cathode emitters having a length of 4 to 5 mm are arranged radially around a region of nφ in a ring shape of 5 to 6 pieces, and the width of the cathode emitters is gradually increased from the inner ring to the outer side.

By changing the cathode emitter with appropriate dimensions according to this,
The cathode emitter located far from the contact position of the lead wire 8 has a low negative bias due to the reason mentioned above, but the narrow width of the cathode emitter makes it easier to turn off. This allows all emitters to be turned off almost simultaneously.

FIG. 4 shows another embodiment of the invention. That is, this experiment is a quiz GTO in which the gate lead wire 8 is brought into contact with the center part of the dart electrode 6. In this case as well, the further away from the contact position, i.e. the center of the wafer, the more canned emitters
The width of the ivy layer is narrowed. As a result, the same effects as in the previous embodiment can be obtained.

The length i of the cathode emitter layer has less influence on the turn-on time than the width, but the shorter it is, the shorter the turn-on crystal is, so it is better to not only make it thinner but also shorten the length. It goes without saying that the turn-off time will be shortened, so it goes without saying that this fact can be applied.

Although the present invention has been described above using a GTO as an example, it goes without saying that the present invention can be applied to a transistor having a plurality of RAMICs. In this case, the dart electrode corresponds to the pace electrode.

[Brief explanation of the drawing]

Figures 1 (a) and (b) are a plan view of a conventional GTO and its A-A' cross-sectional view, Figure 2 is a diagram showing the relationship between the width of the canned emitter and dart turn-off time, and Figure 3 is the diagram of the book. FIG. 4 is a plan view of a GTO according to another embodiment of the present invention. '('t+42+...)...Cathode emitter layer,
5 (51* 52 +...)...Cathode electrode,
6...-Kate electrode, 5 (sl 182)...
gate lead wire. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 3

Claims (1)

[Claims] It has an emitter layer divided into a plurality of parts, a common dirt electrode or pace electrode is arranged surrounding the circumferential recess of each emitter layer, and a common dart electrode or pace electrode is provided between this gate electrode or penis electrode and an external circuit. In a semiconductor device configured to be connected by a lead wire, the shape of the plurality of emitter layers is divided into at least two regions based on a distance from the contact position of the lead wire, and This is a semiconductor device that is patented in that the width of the emitter layer in the far region is set to be smaller than that in the close □ region.