JPS599927B2 - Data transfer control method - Google Patents

Description

[Detailed Description of the Invention] This relates to a transfer control method, and in particular, the block multiplexer channel and the multiplexer channel are controlled even between the channel end and the device end during data transfer during IPL. The present invention relates to a data transfer control system configured to maintain a connection with a control device to prevent undesired disturbances from entering during the above-mentioned IPL execution.

For example, as shown in FIG.
Channel 6, input/output control device 7, 8, 9, 10, input/output device 11, 12, 13, 14, 15, 16, 11, 18
, card readers 19, 20, and line printer 21
When operating a data processing system consisting of a computer, etc., it is necessary to transfer the program necessary for IPL stored on a magnetic tape or the like to the main storage device.

The program is currently stored on the magnetic disk, and is stored in the PX area of the main storage device 2 from the input/output device 15 via the input/output control device 9, block multiplexer channel 5, and channel control device 3. It is assumed that

In this IPL data transfer operation, the central processing unit 1 transfers the necessary IP information from the input/output device 15 to the channel control device 3.
Instructs to transfer the L program.

As a result, the channel control device 3 transfers data between the main storage device 2 and the input/output device 15 in accordance with the CCW (channel control word) stored in the main storage device 2. At this time, operations are performed as shown in FIG.

First, startup sequence control is performed on the input/output control device 9. At this time, calling the address of the input/output device 15 from the block multiplexer channel 5,
It generates an address out signal (not shown) and a select out signal SLO.

The input/output control device 9 receives the address out signal and generates an operational in signal 0PLI, and also generates an address in signal (not shown). When the address in signal is received by the block multiplexer channel 5, the block multiplexer channel 5 issues a command according to the CCW.

In response, the input/output device 15 generates a status in signal (not shown) indicating that the command can be executed. When the block multiplexer channel 5 receives the status in signal and can perform a data transfer operation, it shifts to a data transfer operation. In the data transfer operation, the CCW instructs the CCW to transfer data for the specified count, and the input/output device 15 transfers the data in accordance with this instruction. When the data transfer is completed, a status in signal is generated from the input/output control device 9, and at the same time, a channel end signal indicating the end of the data transfer is sent on the bus in.

As a result, the block multiplexer channel 5 resets the select out signal in order to temporarily release the connection with the input/output control device 9. After that, when a request to report a device end signal is issued from the human output control device 9, the block multiplexer channel 5 again restores the connection relationship with the input/output control device 9, receives the device end signal, and then restarts it by the next CCW in the command chain. A similar operation is performed. In this way, when the execution of all IPLf)CCWs is completed, the block multiplexer channel 5 sends an IPL end signal to the central processing unit 1, and the IP
The data transfer operation of L is completed.

In the case of normal data transfer, the block multiplexer channel 5 utilizes the time from the generation of the channel end signal CHE to the generation of the device end signal DVE to transfer data to other input/output devices, e.g. , has the function of operating the input/output device 17.

However, during IPL transfer, an operation from another device z such as the input/output control device 10 (for example, an asynchronous interrupt such as a NOtReadytORReady interrupt) may occur during this period, so the interface of this input/output control device 10 may be interrupted. If an error that causes a channel failure occurs due to a failure in the input/output control device 10 during face operation, an IPL error may occur.

In this case, 1PL transfer must be performed again. In addition, the asynchronous interrupts of other input/output control devices 17 and IP
If the device end signals DVE from the input/output device 15 during L transfer overlap, the 1PL operation may be delayed by the amount of the asynchronous interrupt. In either case, the start of operation of the data processing device will be delayed. Although the above description has been made with respect to the proc multiplexer channel 5, similar problems exist when multiplexer channel 6 is used to control the IPL operation as described above.

The data transfer control method of the present invention is aimed at solving these problems.During IPL operation, only one input/output device operates, so during this period, the block multiplexer channel and multiplexer channel are not operated. It focuses on the point that it may be operated in the same manner as a selector channel, and for this purpose, at least a central processing unit, a main memory, a block multiplexer channel and/or a multiplexer channel and an input/output device are provided. The program multiplexer channel and/or the multiplexer channel are provided with means for generating a select out signal indicating that the input/output device is being connected when the input/output device is activated, and a means for generating a select out signal indicating that the input/output device is connected to the input/output device when the input/output device is activated. In a data processing device configured to once reset select out and disconnect from the input/output device in response to a channel end signal at the time of termination, means is provided for displaying whether or not IPL processing is in progress. and to the block multiplexer channel and/or multiplexer channel in response to the channel end signal except during IPL processing, and in response to the device end signal rather than the channel end signal during IPL processing. Select above
The present invention is characterized in that a gate means is provided for creating a reset signal so as to reset the out signal.

An embodiment of the present invention will be described below with reference to FIGS. 3 and 4.

In the data transfer method during IPL of the present invention, as shown in FIG. No release is performed, and the next start-up sequence begins after receiving the device end signal, which is reported after the channel end signal.

This means that while the select out signal SLO is continuously output in the block multiplexer channel 5 shown in FIG. It takes advantage of the property that connections are maintained. Of course, along with this, the operational in signal 0PLI generated from the input/output control medium 9 is also continued until the device end signal DVE is reported. In this way, in order for the block multiplexer channel and the multiplexer channel to continuously generate the select out signal SLO even after the channel end signal CHE is generated during IPL processing, a configuration is provided for each channel. Fourth
The diagram will be explained.

In the figure, 22, 24, and 25 are AND circuits, 23 is a NOT circuit, and 26 is an OR circuit.

Then, the select out signal SL is output from the OR circuit.
It is configured to reset the output signal SLO, that is, to stop the generation of the select out signal SLO. A logic 1 is applied to one input terminal of the AND circuit 22 during IPL, and a device end signal DVE is applied to the other input terminal of the AND circuit 22. The input terminal of the AND circuit 24 is [
The block multiplexer channel signal BMC, the channel end signal CHE, and the NOT circuit 23 are connected, and the IPL signal is applied to the NOT circuit 23. "Protsk
The multiplexer channel signal is
It can be thought of as a signal that is a logic 1 when it is a multiplexer channel. Further, the AND circuit 25 is applied with a "multiplexer channel" signal, an address in signal, and a NOT circuit 23. The "multiplexer channel" signal can be considered as a signal that is set to logic "1" when it is a multiplexer channel.And circuit 2
The outputs of 2, 24, and 25 are input to an OR circuit 26K, and when the output of the OR circuit 26 is logic 1, the select out signal SLO is controlled to be reset.

As is clear from the circuit shown in FIG. 4, when data transfer is performed during IPL via block multiplexer channel 5 or multiplexer channel 6, data transfer for one proc is completed and input/output control is performed. If the content reported from the device is only the channel end, the select-out reset condition is not satisfied, and the select-out reset condition is satisfied only after the device end generated from the input/output device is reported after the channel end.

Therefore, the connection relationship between the input/output control device and the block multiplexer channel or multiplexer channel is maintained until the device end is reported, and is not disturbed as in the conventional case. This situation is shown in FIG. Also, when transferring data other than IPL,
In the case of a multiplexer channel, when one process of data transfer is completed and the end of the channel is reported from the input/output controller, the select-out is reset, and the connection with the input/output controller is released regardless of the device end. multiplex operation can be performed on a block-by-block basis.

In addition, in the case of a multiplexer channel in a data transfer operation other than IPL, select-out is reset when the address-in is generated from the input/output control device during the start-up sequence, so the multiplexer channel The connection relationship between the input/output controller and the input/output control device is opened, and byte multiplexing operations specific to the multiplexer channel can be performed. As explained above, the present invention was made with the consideration that only one input/output device needs to be operated during data transfer during IPL, and that suppressing the multiplexer function will not cause any adverse effects. be.

Then, the select out signal generation mechanism provided in the flock multiplexer channel and the multiplexer channel is controlled by an extremely simple mechanism.
By configuring these 10 interfaces to remain open during the data transfer period during PL, it becomes possible to effectively prevent the failures that existed in conventional systems.

Therefore, it is possible to significantly improve the drawback of the conventional system that the start of operation of the data processing system is delayed due to reasons such as redoing the IPL operation.

[Brief explanation of drawings]

FIG. 1 explains the data processing system, FIG. 2 explains the conventional data transfer during IPL, FIG. 3 explains the data transfer according to the present invention, and FIG.
This figure constitutes one embodiment of a control circuit provided to execute the illustrated data transfer. In the figure, 1 is a central processing unit, 2 is a main memory, 3 is a channel control device, 4 is a selector channel, 5 is a block multiplexer channel, 6 is a multiplexer channel, 7 to 10 are input/output control devices, 11 18 to 18 are input/output devices, 19 and 20 are card readers, 21 is a line printer, 22 is an AND circuit, 23 is a note circuit, 24 to 25 are AND circuits, and 26 is an OR circuit.

Claims (1)

[Claims] 1 It has at least a central processing unit, a main memory, a block multiplexer channel and/or a multiplexer channel, and an input/output device, and the block multiplexer channel and/or multiplexer channel has at least one of the input/output devices. It is equipped with means for generating a select out signal indicating that it is connected to the input/output device at startup, and once resets the select out in response to the channel end signal at the end of data transfer to connect the input/output device. The data processing device is configured to disconnect from the block multiplexer channel and/or the multiplexer channel, and is provided with means for displaying whether or not IPL processing is in progress, and the block multiplexer channel and/or multiplexer channel is connected to the block multiplexer channel during IPL processing.・
The present invention is characterized by providing a gate means for generating a reset signal in response to the end signal, and in response to the device end signal instead of the channel end signal during IPL processing, so as to reset the select out signal. Data transfer control method.