JPS5995588A - Cursor display circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a cursor display circuit suitable for moving a cursor at high speed or changing the type of a cursor on a cathode ray tube (hereinafter abbreviated as CRT) display.

Conventionally, when specifying a position on a display screen such as a CRT, a method has often been used in which a cursor consisting of symbols such as a cross or an arrow is simultaneously displayed on the screen and the position is specified using this cursor. .

By the way, the method for displaying the cursor in such cases is to store the address corresponding to the position on the screen where the cursor should be displayed in a register, compare it with the address in the display memory, and when the address matches, display the cursor. There is a method that outputs and displays image data, and a method that has a dedicated cursor brain in the display memory, writes the cursor directly there, and moves the cursor by replacing the memory.

However, the former method has the disadvantage that the shape of the cursor is fixed, and the latter method has the disadvantage that if the cursor is moved frequently, the cursor's changing speed cannot keep up with the movement speed.

SUMMARY OF THE INVENTION An object of the present invention is to provide a cursor display circuit which can eliminate such drawbacks and which can move a cursor and change the type of cursor easily and quickly.

In addition to the general screen plane PLI that stores image data such as characters, symbols, and figures as shown in FIG. 1(a) in a CRT display memory, A cursor-dedicated brain PL2 that stores only the cursor C8R is provided, and the cursor is fixed and written at, for example, the center of the screen of PI, 2, and this is superimposed on the general screen play;/PL l, and the cursor is moved to PL2. By converting the address of PL2 and moving the entire PL2, CR
It is displayed on the T screen DPY, and other types of cursors are also displayed on the PL.
This is characterized in that the cursor is stored in another position within Z and the cursor can be changed at high speed by similarly converting the address.

FIG. 2 is a block diagram of main parts showing an embodiment of the cursor display circuit according to the present invention. In the same figure, the GDCfi graphic display controller (Graphic
Display Controller) generates addresses (16 pitnos) for general screen plane memory Ml and cursor brain memory M2 under the control of the CPU of a computer (not shown).CA
R is a cursor address register in which the amount of deviation between the current position of the cursor and the initial drawing position calculated by the computer is set. This register is the Word Address register.
s Reglstor) WAR and Dot Address Register
) The WAR has a 13-bit configuration (the number of bits sufficient to indicate one screen), and the WAR has a 17-dot (16-bit) deviation value (the number of bits is enough to indicate one screen), and the DAR has a dot-based deviation value (O ~15) are set respectively. In this case 1
A dot corresponds to one pixel on the CRT screen. and,
For example, if you want to shift 32 dots to the left on the display screen, W
2 is set in AR and 0 is set in DAR.

Note that WAR and DAR are transmitted in 13 bits and 4 bits, respectively. Adder ADD adds the address of GDC and the address of WAR and outputs the address to memory M2 in a 16-hit configuration.

Each address of memory M2 has 16 dots on a one-to-one basis.
Each is stored as 16-bit dot data in correspondence, and when an address is specified, the contents are output in 16-bit parallel format. The shift circuit 5HIF shifts this 16-bit parallel data in parallel by the value of DAR and returns it to 16 bits.
Output in bits.

For example, if the input data is data as shown in (a) of FIG. 3 and the DARO value is 4, data shifted in parallel by 4 bits as shown in (b) of FIG. 3 is sent out. The shifted data is serially converted by the parallel-to-serial converter ps2 and sequentially sent out one bit at a time, and is used as a video signal for the cursor brain.

On the other hand, general screen data is stored in the memory M1, and this brain is displayed in seven images without shifting its position relative to the CRT screen.
The data (parallel output) of 16 fc dots (each dot corresponds to 1 pixel on the CRT screen) that is accessed and read by the DC address is serially converted by the parallel-serial converter ps1 and sent out one bit at a time. and is used as a general screen plane video signal.

In such a configuration, general screen data is stored in the memory M according to gradually increasing addresses that are output from the GDC.
At the same time, the cursor plane data is read out in units of 16 dots to obtain a video signal, and the address from the GDC is 16 by adding the amount of address to be moved (the amount of movement in units of 16 dots in the first stage). By reading out the dots and further moving the cursor by a predetermined number of dots in the second stage, it is possible to obtain a video signal of the cursor moved by a predetermined amount with respect to the general screen.

In this case, there is one brane as the cursor plane, so a cursor of any shape and size can be stored in its memory M.
2. When changing the type of cursor, simply use a computer to determine the positional displacement of the cursor on the cursor plane and rewrite the address to the CAD, making it easy and fast to change the type of cursor. Can be done.

Note that there is a limit to the number of cursors that can be placed in the cursor plane, so if you want to use a different type of cursor, write the cursor in the cursor plane and then perform the same operation as above. can do.

As described above, according to the present invention, cursor movement is accomplished simply by rewriting the cursor address register, so processing can be performed easily and quickly without the need for erasing or writing cursor figures as in the prior art. Furthermore, since the CPU only calculates the position, a sufficient tracking speed can be obtained no matter where the cursor is moved.

Furthermore, since an l-plane is prepared as a cursor plane, you can prepare a variety of cursors of any shape and size and use them as you wish.Cursor changes can be made by simply rewriting the cursor address register. This allows you to move the cursor easily and quickly.

[Brief explanation of drawings]

Fig. 1 is a diagram for explaining the relationship between the memory plane and the CRT screen, Fig. 2 is a configuration diagram showing an embodiment of the cursor display circuit according to the present invention, and Fig. 3 is a diagram showing how dot data is shifted. This is a diagram to explain. GDC...Graphic display controller, Ml, M2...Memory, CAD...Cursor address register, WAR...Word address register, DAR...Dot address register, ADD... ...Adder, SHIF...Shift circuit, psl, ps2...Parallel-serial converter. 485 Figure 3 MSB 486- SB 11111 //' 11 ooo.

Claims (1)

[Claims] (1) A cursor-dedicated plane is provided as a memory plane for CRT display in addition to a general screen plane, and the CRT is displayed by a method of overwriting the cursor-dedicated plane on the general screen plane, and
A cursor display circuit characterized in that a cursor is moved or changed by moving a cursor-dedicated plane relative to a general screen plane. (2) The cursor display circuit according to claim 1, wherein movement of the cursor-dedicated plane is performed by rewriting an address. (31) Various cursors can be stored in the cursor-dedicated plane, and a desired cursor can be appropriately selected by address specification. Cursor display circuit. (4) The cursor dedicated plane stores data for 16 dots for each address, and movement or change of the cursor is divided into movement in 16 dot units and movement in units of drums and dots. 2. The cursor display circuit according to claim 1, wherein movement in units is performed by switching addresses, and movement in units of dots is performed by shifting plane read parallel data in parallel.