JPS5988758U - Data reading circuit - Google Patents
Data reading circuitInfo
- Publication number
- JPS5988758U JPS5988758U JP18083682U JP18083682U JPS5988758U JP S5988758 U JPS5988758 U JP S5988758U JP 18083682 U JP18083682 U JP 18083682U JP 18083682 U JP18083682 U JP 18083682U JP S5988758 U JPS5988758 U JP S5988758U
- Authority
- JP
- Japan
- Prior art keywords
- data
- control signal
- reading circuit
- data reading
- writes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Clocks (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はタイマー装置のパネル面を示す正面図、第２図
はカードの例を示す平面図、第３図は本考案の一実施例
を示す構成図である。
２はカード挿入口、３はカード、１３１〜１５は夫々フ
ォトダイオード、１７は光源、２０はバッファメモリで
ある。FIG. 1 is a front view showing the panel surface of the timer device, FIG. 2 is a plan view showing an example of a card, and FIG. 3 is a configuration diagram showing an embodiment of the present invention. 2 is a card insertion slot, 3 is a card, 131 to 15 are photodiodes, 17 is a light source, and 20 is a buffer memory.
Claims (1)
信号に対応してデータが記載されたデータ記録媒体を備
え、上記フントロール信号を読み取ると共に上記データ
を読み取り、上記コントロール信号に対応したメモリの
アドレスに上記データを順次書き込むようにしたデータ
読取回路。A data recording medium is provided in which a control signal is recorded and data corresponding to the control signal is written, and the data storage medium reads the control signal and the data, and writes the data to the memory address corresponding to the control signal. A data reading circuit that writes sequentially.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18083682U JPS5988758U (en) | 1982-11-30 | 1982-11-30 | Data reading circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18083682U JPS5988758U (en) | 1982-11-30 | 1982-11-30 | Data reading circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5988758U true JPS5988758U (en) | 1984-06-15 |
Family
ID=30392000
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18083682U Pending JPS5988758U (en) | 1982-11-30 | 1982-11-30 | Data reading circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5988758U (en) |
-
1982
- 1982-11-30 JP JP18083682U patent/JPS5988758U/en active Pending
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