JPS5984432A - シリコン基板 - Google Patents

シリコン基板

Info

Publication number
JPS5984432A
JPS5984432A JP57194289A JP19428982A JPS5984432A JP S5984432 A JPS5984432 A JP S5984432A JP 57194289 A JP57194289 A JP 57194289A JP 19428982 A JP19428982 A JP 19428982A JP S5984432 A JPS5984432 A JP S5984432A
Authority
JP
Japan
Prior art keywords
layer
substrate
main surface
concentration
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57194289A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0434300B2 (enrdf_load_stackoverflow
Inventor
Hideki Tsuya
英樹 津屋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57194289A priority Critical patent/JPS5984432A/ja
Publication of JPS5984432A publication Critical patent/JPS5984432A/ja
Publication of JPH0434300B2 publication Critical patent/JPH0434300B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
JP57194289A 1982-11-05 1982-11-05 シリコン基板 Granted JPS5984432A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57194289A JPS5984432A (ja) 1982-11-05 1982-11-05 シリコン基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57194289A JPS5984432A (ja) 1982-11-05 1982-11-05 シリコン基板

Publications (2)

Publication Number Publication Date
JPS5984432A true JPS5984432A (ja) 1984-05-16
JPH0434300B2 JPH0434300B2 (enrdf_load_stackoverflow) 1992-06-05

Family

ID=16322117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57194289A Granted JPS5984432A (ja) 1982-11-05 1982-11-05 シリコン基板

Country Status (1)

Country Link
JP (1) JPS5984432A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60245235A (ja) * 1984-05-21 1985-12-05 Matsushita Electronics Corp 半導体装置の製造方法
US4885257A (en) * 1983-07-29 1989-12-05 Kabushiki Kaisha Toshiba Gettering process with multi-step annealing and inert ion implantation
US5227314A (en) * 1989-03-22 1993-07-13 At&T Bell Laboratories Method of making metal conductors having a mobile inn getterer therein

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4885257A (en) * 1983-07-29 1989-12-05 Kabushiki Kaisha Toshiba Gettering process with multi-step annealing and inert ion implantation
JPS60245235A (ja) * 1984-05-21 1985-12-05 Matsushita Electronics Corp 半導体装置の製造方法
US5227314A (en) * 1989-03-22 1993-07-13 At&T Bell Laboratories Method of making metal conductors having a mobile inn getterer therein

Also Published As

Publication number Publication date
JPH0434300B2 (enrdf_load_stackoverflow) 1992-06-05

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