JPS5983256A - メモリ制御方式 - Google Patents

メモリ制御方式

Info

Publication number
JPS5983256A
JPS5983256A JP19442982A JP19442982A JPS5983256A JP S5983256 A JPS5983256 A JP S5983256A JP 19442982 A JP19442982 A JP 19442982A JP 19442982 A JP19442982 A JP 19442982A JP S5983256 A JPS5983256 A JP S5983256A
Authority
JP
Japan
Prior art keywords
memory access
access request
memory
register
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19442982A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0243214B2 (enExample
Inventor
Masao Hasegawa
正雄 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP19442982A priority Critical patent/JPS5983256A/ja
Publication of JPS5983256A publication Critical patent/JPS5983256A/ja
Publication of JPH0243214B2 publication Critical patent/JPH0243214B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP19442982A 1982-11-05 1982-11-05 メモリ制御方式 Granted JPS5983256A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19442982A JPS5983256A (ja) 1982-11-05 1982-11-05 メモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19442982A JPS5983256A (ja) 1982-11-05 1982-11-05 メモリ制御方式

Publications (2)

Publication Number Publication Date
JPS5983256A true JPS5983256A (ja) 1984-05-14
JPH0243214B2 JPH0243214B2 (enExample) 1990-09-27

Family

ID=16324448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19442982A Granted JPS5983256A (ja) 1982-11-05 1982-11-05 メモリ制御方式

Country Status (1)

Country Link
JP (1) JPS5983256A (enExample)

Also Published As

Publication number Publication date
JPH0243214B2 (enExample) 1990-09-27

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