JPS5978743U - display circuit - Google Patents

display circuit

Info

Publication number
JPS5978743U
JPS5978743U JP17498882U JP17498882U JPS5978743U JP S5978743 U JPS5978743 U JP S5978743U JP 17498882 U JP17498882 U JP 17498882U JP 17498882 U JP17498882 U JP 17498882U JP S5978743 U JPS5978743 U JP S5978743U
Authority
JP
Japan
Prior art keywords
display circuit
utility
manual
activated
response
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17498882U
Other languages
Japanese (ja)
Inventor
今川　敏幸
和也 大原
Original Assignee
クラリオン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by クラリオン株式会社 filed Critical クラリオン株式会社
Priority to JP17498882U priority Critical patent/JPS5978743U/en
Publication of JPS5978743U publication Critical patent/JPS5978743U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例を示すブロック図である。 １・・・ＰＬＬ、シンセサイザー回路、２・・・表示回
路、３・・・ディジット・ドライバ回路、５・・・電源
回路、６・・・制御回路、Ｘ、・・くニーティング出力
端子。The figure is a block diagram showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...PLL, synthesizer circuit, 2...Display circuit, 3...Digit driver circuit, 5...Power supply circuit, 6...Control circuit, X...Knitting output terminal.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] （１）　　ＰＬＬ周波数シンセサイザ一方式のラジオ受
信機において、スキャン又はスイーク操作に応答して受
信周波数表示回路の表示機能を一時的に停止させる手段
を備えたことを特徴とする表示回路。(1) A display circuit in a PLL frequency synthesizer type radio receiver, comprising means for temporarily stopping the display function of the reception frequency display circuit in response to a scan or sweep operation. （２）前記手段が、受信機のミューティング出力端子か
らの高レベル出力によって動作するようになつｎ２る実
用新案登録請求の範囲第（１）項記載。 の表示回路。(2) The utility model described in claim (1), wherein the means is activated by a high-level output from a muting output terminal of a receiver. display circuit. （３）マニュアルアップ又はダウン釦の早送り一操作に
応じて前記手動を作動させるようにした実用新案登録請
求の範囲第（１）項記載め表示回路。(3) A display circuit according to claim (1) of the registered utility model, wherein the manual is activated in response to a fast forward operation of a manual up or down button.
JP17498882U 1982-11-18 1982-11-18 display circuit Pending JPS5978743U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17498882U JPS5978743U (en) 1982-11-18 1982-11-18 display circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17498882U JPS5978743U (en) 1982-11-18 1982-11-18 display circuit

Publications (1)

Publication Number Publication Date
JPS5978743U true JPS5978743U (en) 1984-05-28

Family

ID=30380815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17498882U Pending JPS5978743U (en) 1982-11-18 1982-11-18 display circuit

Country Status (1)

Country Link
JP (1) JPS5978743U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5736051B2 (en) * 1980-06-11 1982-08-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5736051B2 (en) * 1980-06-11 1982-08-02

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