JPS5974736A - 位相同期ル−プ回路 - Google Patents

位相同期ル−プ回路

Info

Publication number
JPS5974736A
JPS5974736A JP57185248A JP18524882A JPS5974736A JP S5974736 A JPS5974736 A JP S5974736A JP 57185248 A JP57185248 A JP 57185248A JP 18524882 A JP18524882 A JP 18524882A JP S5974736 A JPS5974736 A JP S5974736A
Authority
JP
Japan
Prior art keywords
adder
amplifier
loop
circuit
oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57185248A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0432573B2 (https=
Inventor
Toyoe Yamazaki
豊栄 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57185248A priority Critical patent/JPS5974736A/ja
Publication of JPS5974736A publication Critical patent/JPS5974736A/ja
Publication of JPH0432573B2 publication Critical patent/JPH0432573B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/12—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a scanning signal

Landscapes

  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP57185248A 1982-10-20 1982-10-20 位相同期ル−プ回路 Granted JPS5974736A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57185248A JPS5974736A (ja) 1982-10-20 1982-10-20 位相同期ル−プ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57185248A JPS5974736A (ja) 1982-10-20 1982-10-20 位相同期ル−プ回路

Publications (2)

Publication Number Publication Date
JPS5974736A true JPS5974736A (ja) 1984-04-27
JPH0432573B2 JPH0432573B2 (https=) 1992-05-29

Family

ID=16167479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57185248A Granted JPS5974736A (ja) 1982-10-20 1982-10-20 位相同期ル−プ回路

Country Status (1)

Country Link
JP (1) JPS5974736A (https=)

Also Published As

Publication number Publication date
JPH0432573B2 (https=) 1992-05-29

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