JPS5972182A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5972182A
JPS5972182A JP57182546A JP18254682A JPS5972182A JP S5972182 A JPS5972182 A JP S5972182A JP 57182546 A JP57182546 A JP 57182546A JP 18254682 A JP18254682 A JP 18254682A JP S5972182 A JPS5972182 A JP S5972182A
Authority
JP
Japan
Prior art keywords
silane
semiconductor
concentration
specified
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57182546A
Other languages
Japanese (ja)
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP57182546A priority Critical patent/JPS5972182A/en
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to US06/525,459 priority patent/US4591892A/en
Priority to GB08322583A priority patent/GB2130008B/en
Priority to AU18327/83A priority patent/AU568504B2/en
Publication of JPS5972182A publication Critical patent/JPS5972182A/en
Priority to US06/800,694 priority patent/US4690717A/en
Priority to US07/047,933 priority patent/US4758527A/en
Priority to US08/165,536 priority patent/US5468653A/en
Priority to US08/350,115 priority patent/US5521400A/en
Priority to US08/910,465 priority patent/US6028264A/en
Priority to US08/999,682 priority patent/USRE38727E1/en
Priority to US08/947,732 priority patent/USRE37441E1/en
Priority to US09/771,624 priority patent/US6664566B1/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/075Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To improve intrinsic conversion efficiency by a method wherein the effective molecular diameter of a reactive gas is rendered not smaller than specified and P leading to the generation of recombination cores is rendered very low in concentration. CONSTITUTION:A reaction furnace 1 is provided with an external heating furnace 21, a substrate 22, a pair of electrodes 3, 3', a high frequency oscillator 2 and, for the purpose of activating and decomposing a reactive gas, with a microwave oscillator 17 and an attenuator 18. For the formation of an Si film, silane is supplied through a supply pipe 4 as a reactive gas. Diborane diluted with H, a P type impurity, is supplied through a supply pipe 5, and phospine is supplied through a supply pipe 6. Specified quantities of these gases are put into the active furnace 1 with the intermediary of gas refining means 11, 14; 12, 15; 13, 16. A molecular sieve or the like of a specified effective molecular diameter is employed to keep the effective diameter of molecules of silane etc. not smaller than specified and the concentration low of P in phospine.

Description

【発明の詳細な説明】 本発明は、リンを極低濃度にした超高純度の半導体製造
用気体を用いて、P工、N工またはP工N接合を少なく
とも1つ有する真性または実質的に真性の半導体層を構
成せしめた光電変換装置およびその作製方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention utilizes an ultra-high purity semiconductor manufacturing gas with an extremely low concentration of phosphorus to produce an intrinsic or substantially The present invention relates to a photoelectric conversion device comprising an intrinsic semiconductor layer and a method for manufacturing the same.

本発明は、基板または基板上の第1の電極と該電極上K
P工、N工またはP工N接合を少なくとも1つ有する非
単結晶半導体層を、P型半導体層工型半導体層およびN
型半導体層をそれぞれ独立に積層して接合を構成するこ
とによシ、設けた半導体装置例えば光電変換装置におい
て、特に光照射により光起電力を発生する活性半導体層
である真性または実質的に真性(P型用不純物が1×1
0〜5X10’ cm’の濃度に人為的またはバックグ
ラウンドレベルで混入した)半導体に対し特に絶縁性の
助長またはP型不純物と結合して不純物散乱になるキュ
リア特にポールの拡散長の低下をもたらし、さらに再結
合中心の発生をもたらすリンを5X10 am以下好ま
しくは1×10″〜3X10 am即ちシラン等の珪化
物気体中のPH。
The present invention provides a substrate or a first electrode on the substrate and a K on the electrode.
A non-single-crystal semiconductor layer having at least one P-type semiconductor layer, N-type semiconductor layer, or N-type junction
By laminating semiconductor layers independently to form a junction, it is possible to use an intrinsic or substantially intrinsic semiconductor layer, which is an active semiconductor layer that generates a photovoltaic force upon irradiation with light, in a provided semiconductor device, such as a photoelectric conversion device. (P-type impurity is 1×1
Curia (artificially mixed at a concentration of 0 to 5 x 10'cm' or at a background level) that promotes insulation or combines with P-type impurities to cause impurity scattering (contains artificially or at a background level) reduces the diffusion length of the poles, in particular, Furthermore, the phosphorus, which results in the generation of recombination centers, is preferably lower than 5X10 am, i.e., the pH in the silicide gas such as silane, from 1x10'' to 3X10 am.

の濃度を3×10〜1ppbの極低濃度にすることを目
的としている。
The aim is to reduce the concentration to an extremely low concentration of 3 x 10 to 1 ppb.

本発明はかかる目的のため、半導体用の反応性気体例え
ば珪化物気体であるシラン、ポリシラン、フッ化珪素、
またゲルマニューム化物気体であるゲルマン等がその有
効分子直径が4.砿以上を有することを利用したもので
ある。
For this purpose, the present invention provides reactive gases for semiconductors such as silicide gases such as silane, polysilane, silicon fluoride,
In addition, germanium compound gases such as germane have an effective molecular diameter of 4. This method takes advantage of the fact that it has more than copper.

即ち、有効分子径が2゜9−4.65Aのモレキュラー
シーズまたはゼオライトを利用して、4゜5A以下の有
効分子直径(以下分子径という)を有する不純物である
リンを、特にリンの水素化物であるイオスヒンを除去す
ることを目的としている。さらに加えて半導体の酸化物
または炭化物の混入によるドナーセンターまたは絶縁性
にする不純物としての反応性気体である酸化物気体例え
ば氷島り、炭酸ガス(aqL酸素(0,)また炭化物気
体例えばメタン(O叩、エタン(0,Hρ、プロパン(
a、ntt、a H,OI(、atH?Jを吸着、除去
することを目的としている。
That is, by using molecular seeds or zeolite with an effective molecular diameter of 2°9-4.65A, phosphorus, an impurity having an effective molecular diameter of 4°5A or less (hereinafter referred to as molecular diameter), can be purified, especially phosphorus hydride. The aim is to remove iosuhin, which is In addition, oxide gases such as ice, carbon dioxide (aqL oxygen (0,)) and carbide gases such as methane ( O striking, ethane (0, Hρ, propane (
The purpose is to adsorb and remove a, ntt, a H, OI (, atH?J).

さらにこの吸着力を助長するため、この化学吸着をする
吸着材を室温〜−so’c好ましくは−20〜−40′
aに冷却し、さらにその吸着能力の最大となる一30±
10’Cにカラムを冷却し、その能力を高温に比べて5
00倍以上高めることを目的として体特にアモルファス
半導体がAMI (loomW、zc= )の条件下に
て6〜8チの変換効率しか出なかつたものを、11〜1
4.5%にまで真性変換効率を高めることができる。
Furthermore, in order to promote this adsorption power, the adsorbent that performs this chemical adsorption is used at room temperature to -so'c, preferably -20 to -40'.
a, and further cooled to -30±, which is the maximum adsorption capacity.
Cool the column to 10'C and increase its capacity by 5
With the aim of increasing the conversion efficiency by more than 00 times, the conversion efficiency of amorphous semiconductors, which had a conversion efficiency of only 6 to 8 cm under the condition of AMI (roomW, zc= ), was increased to 11 to 1.
The intrinsic conversion efficiency can be increased to 4.5%.

特にこの活性半導体層である1層において、一般KN型
化または弱N型化しゃすい理由を調べた結果、N型化の
不純物として反応性気体中にリン化物、酸化物、炭化物
が残存していることがその大きな理由であることが判明
した。このため本発明においてはリンの濃度を従来の6 5X10〜lXl0 cmよシその115トル/10+
に下げ、lXl0” cm’以下好ましくはψ8□♂〜
、X10′icmノKtで下げたことを特徴としている
。さらに加えてその酸素濃度を従来の2x4X10 c
m’よp 5X10 cm−’以下好ましくは1×10
〜lXl0 am Kまで低め、さらに半導体中KO−
0結合を多数有する、即ちクラスフ状に混入した炭素を
4X10 am以下好ましくは4×10〜lXl0cm
K′まで下げることにょシ、半導体例えばシリコン半導
体中の再結合中心の密度をlXl0 QmよシlXl0
 am以下好ましくは5×10〜lXl0 cm Kま
で下げるのに成功したことを特徴としている。
In particular, we investigated the reason why this first layer, which is the active semiconductor layer, tends to become KN-type or weakly N-type, and found that phosphides, oxides, and carbides remain in the reactive gas as impurities for N-type conversion. It turns out that the main reason for this is that. Therefore, in the present invention, the concentration of phosphorus is changed from the conventional 65X10 to 1X10 cm to 115 torr/10+
lower to lXl0"cm' or less, preferably ψ8□♂ ~
, it is characterized by lowering the Kt by X10'icm. Furthermore, the oxygen concentration is increased to the conventional 2x4x10 c
m'yop 5X10 cm-' or less preferably 1x10
As low as ~lXl0 am K, and furthermore, KO-
Carbon having a large number of 0 bonds, that is, mixed in a clasp shape, is 4×10 am or less, preferably 4×10 to 1×10 cm.
In order to reduce the density to K', the density of recombination centers in a semiconductor, for example, a silicon semiconductor, is
am or less, preferably 5×10 to 1×10 cm K.

従来、リンは半導体例えば単結晶シリコン半導体中でド
ナー型の不純物として作用してしまうため、その濃度は
低ければ低い程よいとされている。しかし非単結晶シリ
コンにおいては、水素等の再結合中心が入っているため
、このリンの濃度を単結晶程低くすることの要求はほと
んどなかった。しかし本発明はこの非単結晶半導体にお
いては、単結晶半導体以上に少数キャリア特にホールの
拡散長を下げている主因でちることが判明した。このた
め本発明はこのリンをその出発材料である半導体用反応
性気体例えばシラン中に7オスヒンの形で混入する不純
物をO,IPPM以下好ましくは1憾、 0IPP’b
 Kまで下げることを目的としている。さらに従来工型
半導体層の他の不純物として、酸素は半導体例えばシリ
コン半導体中にて局部的KSi→41を構成し、絶縁性
をのみ示すものとしていた。しかしシリコン中に酸素が
数ケル十数ケ集合してクラスタを作ると、それは電子、
ホールの再結合中心を作り、光照射によって発生した少
数キャリアのキラーとして作用してしまうことは、水素
捷たはハロゲン元素が添加されたプラズマ気相法によシ
得られた非単結晶半導体においてもきわめて顕著である
ことが判明した。また、酸素の不対結合手はN型のドナ
ーセンタとしても作用してしまい、非単結晶半導体をア
モルファスより格子歪を有する構造敏感性をもった半非
晶質(半結晶質)とするとN型化してしまうことがわか
った。
Conventionally, since phosphorus acts as a donor type impurity in semiconductors such as single crystal silicon semiconductors, it has been thought that the lower the concentration, the better. However, since non-single-crystal silicon contains recombination centers such as hydrogen, there has been little demand for the phosphorus concentration to be as low as in single-crystal silicon. However, in the present invention, it has been found that in this non-single crystal semiconductor, the main reason is that the diffusion length of minority carriers, particularly holes, is reduced more than in a single crystal semiconductor. For this reason, the present invention incorporates impurities in the form of 7 osphine into the starting material of the phosphorus, such as silane, into a reactive gas for semiconductors, such as silane.
The aim is to lower it to K. Furthermore, as another impurity in the conventional semiconductor layer, oxygen forms local KSi→41 in a semiconductor, for example, a silicon semiconductor, and exhibits only insulating properties. However, when a few dozen oxygen molecules gather together in silicon to form a cluster, it creates electrons,
In non-single-crystal semiconductors obtained by plasma vapor phase method with addition of hydrogen or halogen elements, it is possible to create recombination centers of holes and act as a killer of minority carriers generated by light irradiation. was also found to be extremely significant. In addition, the dangling bond of oxygen also acts as an N-type donor center, so if a non-single crystal semiconductor is semi-amorphous (semi-crystalline), which has lattice strain and is more sensitive to structure than amorphous, N It turns out that it becomes a pattern.

このため、かかるドナーセンターになるリンまたは酸素
を本質的に除去し、構造的に敏感性を有する真性(フェ
ルミレベルがバンド巾のほぼ中央部)の半導体を作るこ
とは工業的応用を考える時きわめて重要であった。
Therefore, when considering industrial applications, it is extremely important to essentially remove phosphorus or oxygen, which would become donor centers, and create a structurally sensitive intrinsic semiconductor (Fermi level is approximately in the middle of the band width). It was important.

本発明は、かかる不純物を除去し、シリコン半導体中は
珪素と再結合中心中和用に必要な水素またはハロゲン元
素を副成分とし、さらにフェルミレベルをシストさせる
ための■価の不純物を(10−5XIOam )添加し
たことを特徴としている。
The present invention removes such impurities, makes hydrogen or halogen elements necessary for neutralizing silicon and recombination centers in silicon semiconductors as subcomponents, and further adds (10- 5XIOam) is added.

従来シランは有効分子径を5′5−弱(4,8〜5イ有
し、またゲルマンは約6λを有している。Cシラン等の
ポリシラン等はさらに大きな有効分子径を有する) しかし、例えば最も有効分子径の小さいシラン(モノシ
ラン)において、その反応性気体中に含有される不純物
を調べると、表1の如くである。
Conventional silane has an effective molecular diameter of just under 5'5 (4,8 to 5), and germane has an effective molecular diameter of approximately 6λ. Polysilanes such as C silane have an even larger effective molecular diameter. For example, Table 1 shows the impurities contained in the reactive gas of silane (monosilane), which has the smallest effective molecular diameter.

表   1 エピタキシアル用   エレクトロニクス用純度(%)
    99,99    99.99水素(P P 
M)  300      3000窒素      
  550 酸素         0.11 アルゴン      1050 ヘリューム     10        50メタン
       550 エタン        0.1        0.5
エチレン      Q、 1.       0.5
プロパン      0.10.5 プロピレン      0.10・5 塩素化物      1050 フオスヒン     0.05      0.5水 
         35 これらを調べて、特にこのエピタキシアル成長をさせる
場合、気相−固相反応の際、酸化物および窒化物は偏析
効果によシ、上記表1の約1730 K小さくなる0こ
のため比抵抗100ユam以上の実質的真性の半導体を
得ることカニできる。
Table 1 Purity for epitaxial and electronics (%)
99,99 99.99 Hydrogen (P P
M) 300 3000 Nitrogen
550 Oxygen 0.11 Argon 1050 Helium 10 50 Methane 550 Ethane 0.1 0.5
Ethylene Q, 1. 0.5
Propane 0.10.5 Propylene 0.10.5 Chloride 1050 Phuoshine 0.05 0.5 Water
35 Investigating these, we found that, especially when performing this epitaxial growth, oxides and nitrides have a segregation effect during the gas phase-solid phase reaction, which reduces the specific resistance by about 1730 K in Table 1 above. It is possible to obtain a substantially intrinsic semiconductor of 100 U am or more.

しかし、100−400’Oで行なわれるグロー放電を
用いたプラズマ気相法においては、かかる物理精製であ
る不純物の偏析効果を期待することはできない。
However, in the plasma vapor phase method using glow discharge carried out at 100-400'O, the effect of segregation of impurities resulting from such physical purification cannot be expected.

このため、表1の示す不純物はそのまま半導体中に混入
してしまい、特にリンはフオスヒンより分解してドナー
不純物となシ、さらに酸素については、すべてシランと
反応し、酸化珪素反応生成物を作る。シラン自体につい
ては、プラズマ反応によシ活性化(イオン化)が1−5
係であシ、そのため実質的にガス状態よシもさらに約2
0−30倍に濃縮されて半導体膜中にリンは1〜3X1
0”c問′また酸素は2〜4X10 amもの濃度にな
ってしまうことがわかった。さらにリンはボンベを構成
する金属中K 15PPM程混入しておシ、これが長期
保存で水素と反応し、フオヌヒンとなり、シラン中に混
入し、不純物となってしまうことが判明した。
For this reason, the impurities shown in Table 1 are mixed into the semiconductor as they are, and in particular, phosphorus decomposes from phosphin and becomes a donor impurity, and all oxygen reacts with silane to form silicon oxide reaction products. . Regarding silane itself, activation (ionization) by plasma reaction is 1-5
Therefore, the gas state is essentially about 2.
Phosphorus is concentrated 0-30 times and phosphorus in the semiconductor film is 1-3X1
0"CQuestion'It was also found that the concentration of oxygen reached 2~4X10 am.Furthermore, phosphorus was mixed into the metal constituting the cylinder at a rate of about 15 PPM, and this reacted with hydrogen during long-term storage. It was found that this compound became huonuhin, mixed into silane, and became an impurity.

このため、反応性気体をプラズマ気相法用に用いる時、
その反応装置において反応性気体を使用する時に精製す
ることがきわめて重要であることが実験的に判明した。
For this reason, when using reactive gases for plasma vapor phase method,
It has been found experimentally that purification is extremely important when using reactive gases in the reactor.

かくして、本発明においては、AM1にて変換効率を1
0%以上保証するために、その1層中にリンをlXl0
 cm以下とし、さらに加えて酸素は5X10 am以
下とすることがきわめて重要である。
Thus, in the present invention, the conversion efficiency is reduced to 1 at AM1.
In order to guarantee 0% or more, phosphorus is added in one layer.
It is extremely important that the oxygen concentration be below 5×10 am.

かかる半導体の高純度化を本発明は目的としている。The present invention aims to improve the purity of such semiconductors.

以下に図面に従って示す。It is shown below according to the drawings.

第1図は本発明の半導体装置の作Ml/i′用いられた
製造装置の概要を示す。
FIG. 1 shows an outline of the manufacturing apparatus used for manufacturing the semiconductor device Ml/i' of the present invention.

図面において、反応炉(1)K対し、外部加熱炉Qυ、
基板(ハ)、一対をなす電極(3)、(イ)、高周波発
振器(2)(例えば13.56MHzまたは100KH
z)、さらに反応性気体の活性化、分解を行なうため、
1GH2以上の周波数のマイクロ波例えば2.45GH
zの発振器αη、アテニュエイターα枠を有している。
In the drawing, for the reaction furnace (1) K, external heating furnace Qυ,
A substrate (C), a pair of electrodes (3), (A), a high frequency oscillator (2) (for example, 13.56MHz or 100KH
z), to further activate and decompose reactive gases,
Microwaves with a frequency of 1GH2 or higher, e.g. 2.45GH
It has an oscillator αη of z and an attenuator α frame.

セラミックスαつで保護された放出部から、0、001
:〜10tOrrに保持された反応炉(1)へマイクロ
波を放出させた。反応炉全体は電波障害のないようにシ
ールド(イ)がなされ、反応性気体によシ基板(イ)土
に半導体膜を形成させるに際し、電気エネルギの電界は
、被形成面に平行に設けられている。また、反応性気体
は被形成面に平行に層流を有するように配置されている
0,001 from the emitting part protected by ceramic α
: Microwaves were emitted to the reactor (1) maintained at ~10 tOrr. The entire reactor is shielded (a) to prevent radio wave interference, and the reactive gas is shielded from the substrate (a).When forming a semiconductor film on soil, the electric field of electrical energy is set parallel to the surface to be formed. ing. Further, the reactive gas is arranged so as to have a laminar flow parallel to the surface on which it is formed.

キャリアガス例えば酸素、水の不純物は1ppb好まし
くはO,1ppb Kまで下げた水素を(7)よシ導入
させた。また反応性気体は例えば珪素膜を形成させよう
とする場合、珪化物気体であるシランを(4)より導入
した。また、P型用不純物である水素により500−5
000PPM K希釈されたジボランを(5)より、ま
た同様に水素によシ希釈されたフオスヒンを(6)よシ
導入した。
Impurities in carrier gas such as oxygen and water were reduced to 1 ppb, preferably O, and hydrogen was introduced as shown in (7). Further, as the reactive gas, for example, when a silicon film was to be formed, silane, which is a silicide gas, was introduced from (4). In addition, due to hydrogen, which is an impurity for P type, 500-5
Diborane diluted with 000 PPM K was introduced as (5), and phoschin, similarly diluted with hydrogen, was introduced as (6).

これら反応性気体は、ガス精製器0υ、(141,oa
、αG、0]0すを介して反応炉に所定の流量導入させ
た。
These reactive gases are supplied to the gas purifier 0υ, (141, oa
, αG, 0] A predetermined flow rate was introduced into the reactor through the 0.

) これらのガス精製器は、シラン(4)の反応ガスにおい
ては入口側に有効穴径4.3〜4.65k(代表的には
4.5i)の4.5Aのモレキュラーシープまたはゼオ
ライトを用いた。4.5Aは四z n、) (A 10
.) (S i q)、。
) These gas purifiers use a 4.5A molecular sheep or zeolite with an effective hole diameter of 4.3 to 4.65k (typically 4.5i) on the inlet side for the reaction gas of silane (4). there was. 4.5A is 4z n, ) (A 10
.. ) (S i q),.

X H,6の分子式で示される多孔性分子吸着材を用い
た。さらにこの後に有効穴径2.7〜3.3鯨の3への
モレキュラーシープまたはゼオライト等の高品名が用い
られている多孔性分子吸着材を用いた。このモレキュラ
ーシープスまたはゼオライトはNa(AIOρ(S i
 q)Z HOの分子式を有しているものを用いた。
A porous molecular adsorbent having the molecular formula of X H,6 was used. Further, after this, a porous molecular adsorbent having a high quality name such as Molecular Sheep or Zeolite with an effective pore diameter of 2.7 to 3.3 was used. This molecular sheep or zeolite is Na(AIOρ(S i
q) A compound having the molecular formula of Z HO was used.

さらにこれらの精製器の化学吸着性を向上させるため、
−’701>’ト室温好ましくはシラン等を吸着させず
に7オスヒ/のみを選択的に吸着させる温度−20−−
40’O例えば−30′Oに電子恒温そう(8ル(9)
 (10) Kよシ冷却した。水素希釈されたジボラン
ノ に対しては、その中の水、7オスヒン、酸素等のすべて
を除去するため、同様K 3Aまたは4Aおよび4.5
Aの2段精製を行なった。
Furthermore, to improve the chemisorption properties of these purifiers,
-'701>'T room temperature, preferably at a temperature at which only 7 osulfur is selectively adsorbed without adsorbing silane etc. -20--
40'O, e.g. -30'O (8 l(9)
(10) Cooled by K. For diboranno diluted with hydrogen, in order to remove all of the water, 7-oshin, oxygen, etc., K 3A or 4A and 4.5
A two-stage purification was performed.

特にシランに対しては、その中にあってN化しやすい不
純物である酸素以外に、フォスヒンがそのシランに対す
る濃度をo、 O’1ppb以下Kまで下ケルため、3
AKよシ水を除去し、さらに4、5A K ヨ9フオス
ヒンの除去を行なうのが特に有効であった。
In particular, for silane, in addition to oxygen, which is an impurity that easily converts into N, phosphin lowers the concentration of silane to less than 1 ppb.
Particularly effective was the removal of AK yo-shi water and the further removal of 4,5 AK yo-9 phosphin.

排気系はニードルバルブ(ハ)、ストップバルブ(ハ)
、真空ポンプに)をへて排気(ハ)させた。反応炉 □
内の圧力はニードルバルブ(ハ)によp 0.001〜
1゜t Orr代表的には0.05−0.15torr
に制御した。
The exhaust system has a needle valve (c) and a stop valve (c)
, to a vacuum pump) to exhaust air (c). Reactor □
The pressure inside is controlled by the needle valve (c) at p 0.001~
1°t Orr typically 0.05-0.15torr
was controlled.

第2図は第1図の結果によって得られた特性である。即
ち、基板温度25cf’c反応炉内の圧力0、1tor
rとした時、基板例えばガラス上に非単結晶半導体層を
1μの厚さに形成した場合の光照射(AMl)伝導度、
喧伝導度である。図面においてシランに対し、かかる精
製を行なわない場合、前記した如くのボンベ内での不純
物がそのまま半導体層内に入シ、特にリンがN型化し、
さらに酸素または炭素はシリコンを非晶質化する感作用
がある。このため光伝導度(ハ)、暗伝導度(30)を
得た。即ち図面において20−30Wの高周波出力にお
いて、光伝導度は10C?cm)を有するが、同時にこ
の時半導体が一部秩序性を有する半非晶質化する。この
ためこの半導体中の不純物であるリンさらに酸素がドナ
ーセンタとなシ、N型化してしまう。結果として、真性
半導体として用いんとする場合は、逆の不純物であるホ
ウ素を1〜3X10 amの濃度に添加するか、または
かかるドナー化しない低い光伝導度の1〜5Wの低い高
周波出力領域で作られる半導体を用いなければならない
。しかしこれらはいずれにおいても光電気伝導度を10
〜10←C呻のオーダーにまで下げてしまう。
FIG. 2 shows the characteristics obtained from the results shown in FIG. That is, the substrate temperature is 25 cf'c and the pressure inside the reactor is 0.1 torr.
When r is the light irradiation (AMl) conductivity when a non-single crystal semiconductor layer is formed to a thickness of 1 μ on a substrate, for example, glass,
It's the conductivity. In the drawings, if silane is not purified in this manner, impurities in the cylinder as described above will enter the semiconductor layer as is, and phosphorus in particular will become N-type.
Furthermore, oxygen or carbon has a sensitizing effect that makes silicon amorphous. For this reason, a photoconductivity (c) and a dark conductivity (30) were obtained. That is, in the drawing, at a high frequency output of 20-30W, the optical conductivity is 10C? cm), but at the same time, the semiconductor becomes semi-amorphous with some order. For this reason, the impurities in this semiconductor, such as phosphorus and oxygen, become donor centers and become N-type. As a result, if it is intended to be used as an intrinsic semiconductor, boron, which is the opposite impurity, should be added to a concentration of 1 to 3 x 10 am, or it should be used in a low high frequency output region of 1 to 5 W with low photoconductivity that does not become a donor. We must use the semiconductors that are made. However, in all of these, the photoelectric conductivity was 10
~10←I lowered it to the order of a C groan.

かかる従来の方法ではなく、本発明はシラン中の不純物
を精製後(第1図α])、α4)で十分除去するととも
に、ボンベにシランを充填するに際しても、十分なる精
製をして充填したものである。かくすることによシ、第
2図において光照射伝導度(ロ)、暗伝導度(ハ)を得
ることができた0この図面よシ明らかな如く、光伝導度
がプ會ズマ放電出力が1〜IOW においてlXl0 
(ncn)と大きく、加えて暗伝導度が10〜1o(m
ciと小さい。
Instead of such conventional methods, the present invention provides a method in which impurities in silane are sufficiently removed after purification (α] in Figure 1) and α4), and the silane is sufficiently purified before being filled into a cylinder. It is something. By doing this, we were able to obtain the light irradiation conductivity (b) and dark conductivity (c) in Figure 2.As is clear from this figure, the photoconductivity is the same as the plasma discharge output. lXl0 at 1~IOW
(ncn), and in addition, the dark conductivity is 10 to 1o (m
ci and small.

即ち、真性半導体としての活性化エネルギは十分大きく
、フェルミレベルもほぼE12“’eVを91 有せしめることができた。
That is, the activation energy as an intrinsic semiconductor was sufficiently large, and the Fermi level was approximately E12''eV of 91.

さらにこの特性を調べてみたところ、X線回折像におい
て弱い結晶性、格子歪を有して(結晶の回折角度よりも
0.5暑低い角度に観察され結晶化が5−10Wで得ら
れる被膜においてみられ、これらはアモルファス構造と
結晶化構造の中間構造のセミアモルファス(半非晶質)
半導体といえるものでおった。
Further investigation of this property revealed that the film had weak crystallinity and lattice distortion in the X-ray diffraction image (observed at an angle 0.5 degrees lower than the diffraction angle of the crystal, and crystallization was obtained at 5-10 W). These are semi-amorphous structures that are intermediate between amorphous and crystalline structures.
It was something that could be called a semiconductor.

即ち、真性半導体をプラズマ気相法によシ100〜30
0°C例えば250’Oで得ようとすると、その時との
シラン中の不純物が単なるOVDまたはエピタキシアル
成長に比べて30〜100倍もの濃度に入りやすい。そ
のため、出発材料中の不純物の混入を可能なかぎり少な
くした超高純度シランを用いることはきわめて重要であ
る。かくして1〜5Wの低いプラズマ出力においても、
暗伝導度が小さく、かつ光伝導度は単結晶の16′←c
m)’と同一レベルの10〜10C!Lcm)の値を得
ることができた。かかる電気伝導度を示すものの少数キ
ャリア特にホールの拡散長を調べたところ、3−20μ
を有し、従来のプラズマ気相法によりアモルファスシリ
コンの0.1−0.6μに比べて30倍以上の長い値を
有せしめることができた。
That is, an intrinsic semiconductor is produced by a plasma vapor phase method at a temperature of 100 to 30
When trying to obtain the film at 0°C, for example, 250'O, the concentration of impurities in the silane at that time tends to be 30 to 100 times higher than in simple OVD or epitaxial growth. Therefore, it is extremely important to use ultra-high purity silane in which the amount of impurities in the starting material is minimized. Thus, even at low plasma powers of 1 to 5 W,
Dark conductivity is small and photoconductivity is 16'←c of single crystal.
10~10C at the same level as m)'! It was possible to obtain the value of Lcm). When we investigated the diffusion length of minority carriers, especially holes, in a device exhibiting such electrical conductivity, we found that it was 3-20μ.
By using the conventional plasma vapor phase method, it was possible to obtain a value that is 30 times longer than that of amorphous silicon, which is 0.1-0.6μ.

特にこうした低い高周波出力でかかる良質の非単結晶半
導体が得られることは、本発明の如(PIN接合を漸次
P層、1層、N層と積層するに際し、その境界領域を面
として明確にするため、即ち2層上に1層を積層する際
、その放電がP層をスパッタ(損傷〕する効果により、
下地P層をたたき、混合層を作ってしまうことを防ぐこ
とができ、きわめて重要である。
In particular, the fact that such a high-quality non-single crystal semiconductor can be obtained with such a low high-frequency output is due to the present invention (when the PIN junction is gradually laminated with P layer, 1 layer, and N layer, the boundary area is defined as a plane). Therefore, when one layer is laminated on top of two layers, the discharge sputters (damages) the P layer.
This is extremely important because it can prevent the formation of a mixed layer by striking the underlying P layer.

さらに第2図において、2,45GHzのマイクロ波を
加えると、反応性気体のイオン化率を高めるため、その
特性は同様であったが、被膜の成長速度が約3−5倍に
増し、大きくすることができた。例えばシランを30c
c/l;f、0.1torrで導入し、高周波プラズマ
のみでは1−3A/秒と低かったが、この場合は10〜
15λ/秒と高速成長させることができた。
Furthermore, in Figure 2, when microwaves of 2.45 GHz are applied, the ionization rate of the reactive gas is increased, so although the characteristics are the same, the growth rate of the film increases about 3-5 times, making it larger. I was able to do that. For example, 30c of silane
Introduced at c/l;f, 0.1 torr, high frequency plasma alone was as low as 1-3 A/sec, but in this case it was 1-3 A/sec.
It was possible to grow at a high speed of 15λ/sec.

第3図は本発明のシランの精製に関し、ガス精製器の有
効性を確認する実験をしたものである0 図面において、横軸はリンtたn凛の被膜中の濃度を示
し、これはカメカ社製の工MA(イオンマイクロアナラ
イザー〕で調べたものであシた1軸は光照射時の電気伝
導度を示す。
Figure 3 shows an experiment conducted to confirm the effectiveness of the gas purifier for the purification of silane according to the present invention. The results were investigated using an Ion Micro Analyzer (MA) manufactured by Kogyo Co., Ltd. The first axis shows the electrical conductivity when irradiated with light.

シラン系に対し、4.541A544をともに用いた場
合であり、さらにとのカラムの温度を室温〜−30’C
まで可変することによjl 、3A、 4.5Aの吸着
性を向上させるものである。酸素はリンの濃度の30−
100倍の量でリンを減少させると同様に比例して減少
していった。
This is the case when 4.541A544 was used together with the silane system, and the temperature of the column was changed from room temperature to -30'C.
The adsorption properties of jl, 3A, and 4.5A can be improved by varying up to 100%. Oxygen is 30-
When phosphorus was reduced by a factor of 100, it was also reduced proportionally.

図面においてかかる純化装置のない場合の光伝導底0の
喧伝導度(46)を示している。さらに室温において純
化装置を用いると、1.2XlOCmにまで下げること
ができた。加えてこれをOhatm am Kまでそれ
ぞれ下げることができた。
In the figure, the conductivity (46) of the photoconductive bottom 0 without such a purification device is shown. Furthermore, by using a purification device at room temperature, it was possible to lower the concentration to 1.2XlOCm. In addition, we were able to lower this to Ohatmam K, respectively.

その結果光伝導度(41)喧伝導度Ω2)を得た。これ
らは第1図の装置において高周波出力2wの場合である
As a result, a photoconductivity (41) and a conductivity Ω2) were obtained. These are the cases where the high frequency output is 2W in the apparatus shown in FIG.

これらの酸素、炭素濃度とするには、シラン中にリンを
1ppb以下にし、さらに酸素を0.03PPM (3
0ppり以下にすることがきわめて重要であシ、特に精
製を上記室温ではな(,0’o−−3o’cとすると、
フオスヒンの不純物濃度は1oppb (o”a)0、
 ’1ppb (−30°のにまで下げることができ、
加えて酸素(水も含む)不純物濃度はO,OIPPM 
(0’(3)、0、003PPM (−30°b)[ま
で下げることができる。またOmHnはO,’l’PP
M、 O,OIPPM Kまで下げることができた。さ
らK −’100°CKすると、精製装置の4、5A、
 3Aの質量分析器の表面にシランの吸着がオキ、フオ
スヒンの吸着能力が悪くなってしまった。しかし酸素に
対してはさらにその吸着性を高めることができた。
In order to achieve these oxygen and carbon concentrations, the phosphorus in the silane should be reduced to 1 ppb or less, and the oxygen should be added to 0.03 PPM (3
It is extremely important to keep the concentration below 0pp, especially when purifying at the above room temperature (,0'o--3o'c,
The impurity concentration of phoschin is 1 opppb (o”a)0,
'1ppb (-30°),
In addition, the oxygen (including water) impurity concentration is O, OIPPM
(0'(3), 0,003PPM (-30°b) [OmHn is O,'l'PP
I was able to lower it to M, O, OIPPM K. Further K −'100°CK, 4, 5A of the purifier,
Silane was not adsorbed on the surface of the 3A mass spectrometer, and the adsorption ability of phosphin became poor. However, the adsorption of oxygen was further improved.

もちろん以上の如き高純度とするには、第1図に示され
た反応系においても、その全体のりQ QlBθC以下
とすることか重要であシ、ジョイト等の工夫も重要であ
ることを付記する。
Of course, in order to achieve the above-mentioned high purity, even in the reaction system shown in Fig. 1, it is important to keep the overall glue QQlBθC or less, and it is important to note that devices such as joints are also important. .

第4図は第1図の製造装置を用いて形成したもので、図
面(A)はガラス基板(32)上に透明導電膜(3勢、
さらKP型型化化珪素SiXO+−)LO<x<1例え
ばx=0.8)またはP型珪素半導体(34)Kよシ1
00Xの厚さに形成した。さらにこの後、この反応系を
クライオポンプ(45)Kて十分真空引をした後、精製
したシランにより真性半導体層を0.5μの厚さK(3
1)として形成した。さらに再び真空引をしてN型半導
体層(31)をシランにフオスヒンを饅の濃度に混入し
て200λの厚さに形成した。この後、公知のアルミニ
ューム(36)を真空蒸着して設けたものである。
Fig. 4 shows a film formed using the manufacturing apparatus shown in Fig. 1, and drawing (A) shows a transparent conductive film (three layers,
Furthermore, KP type silicon semiconductor (SiXO+-)LO<x<1 (for example, x=0.8) or P-type silicon semiconductor (34)Kyoshi1
It was formed to a thickness of 00X. Furthermore, after this reaction system was sufficiently evacuated using a cryopump (45), the intrinsic semiconductor layer was coated with purified silane to a thickness of 0.5 μm (3
1). Furthermore, vacuuming was performed again, and an N-type semiconductor layer (31) was formed by mixing silane with phosphin at a concentration similar to that of steamed rice to a thickness of 200λ. Thereafter, known aluminum (36) was vacuum deposited.

高周波出力は2W、基板温度25♂Cとした。すると変
換効率11.8%を得ることができた。
The high frequency output was 2W and the substrate temperature was 25♂C. As a result, a conversion efficiency of 11.8% could be obtained.

このガラス基板の特性をさらに改良するため第4図(B
)構造のPIN接合型光電変換装置を作製した。
In order to further improve the characteristics of this glass substrate, Fig. 4 (B
) A PIN junction photoelectric conversion device was manufactured.

図面において、ステンレス基板(32)上KPP半導体
層(34)、I型半導体層03)N型の繊維構造を有う する多結晶半導体層(35)を第1図の装置によシ、そ
れぞれ2ooi、 0.5μ、 15oiの厚さに形成
した0さらに透明導電膜(43)をITO(酸化インジ
ューム(酸化スズ0−10%))を真空蒸着し、アルミ
ニュームの補助電極(36)を設けた。
In the drawing, a KPP semiconductor layer (34), an I-type semiconductor layer (03), a polycrystalline semiconductor layer (35) having an N-type fiber structure on a stainless steel substrate (32) are deposited using the apparatus shown in FIG. A transparent conductive film (43) formed to a thickness of 0.5μ and 15oi was further vacuum-deposited with ITO (indium oxide (tin oxide 0-10%)), and an auxiliary electrode (36) of aluminum was provided. Ta.

3X10 cm以下即ち3×10〜1×10cmニなる
と、その変換効率はAMI KでICイの面積にて1棒
をこえることができた。またその曲線因子もO6′2(
ご v電え、また特に短絡電流も最高20mA/cm”を得
ることができるようになった。開放電圧は0.86〜0
.93Vであった。この時同様に酸素濃度を4X10”
 cm’以下にすることにより、シリコン半導体はより
シリコンのみからなるシリコンらしく作ることにより大
きな特性向上がみられた。
When the area is 3 x 10 cm or less, that is, 3 x 10 to 1 x 10 cm, the conversion efficiency can exceed 1 bar in the area of AMI K and IC. Also, its fill factor is O6'2(
It is now possible to obtain short circuit current of up to 20 mA/cm. The open circuit voltage is 0.86 to 0.
.. It was 93V. At this time, the oxygen concentration was also increased to 4X10"
cm' or less, the silicon semiconductor was made to look more like silicon made only of silicon, and a large improvement in characteristics was observed.

第4図(B)の実施例において、N型半導体層を繊維構
造を有する多結晶半導体とし、それを200−2506
0の低温で作ることに関しては、本発明水ノ出願になる
特許願57−08’7801 (S57.5.24)に
示されている。
In the embodiment shown in FIG. 4(B), the N-type semiconductor layer is a polycrystalline semiconductor having a fiber structure, and
Regarding production at a low temperature of 0, it is shown in patent application No. 57-08'7801 (S57.5.24), which is the application of the present invention.

以上の説明において、P工N接合をひと遣′有する光電
変換装置を示したが、これを重れてPINP工N・・・
・P工N接合と少なくとも2接合あらし7めることも本
発明の応用として重要であり、またこれらを基板上に集
積化してもよい。
In the above explanation, a photoelectric conversion device having a P-N junction has been shown, but this can also be added to a PIN-N junction...
- It is also important to form a P/N junction and at least two junctions as an application of the present invention, and these may also be integrated on a substrate.

また、これまでの説明においては珪化物気体としてシラ
ン特にモノシランを示した。しかしジシラン等のポリシ
ランに対しても、本発明は同様にその分子径が5^と大
きいため有効である。
Furthermore, in the explanations so far, silane, particularly monosilane, has been shown as the silicide gas. However, the present invention is also effective for polysilanes such as disilane because their molecular diameter is as large as 5^.

マタケルマニュームtllてハ、ケルマン(Ge)9を
用い、非単結晶半導体として5iXGe+−>、(0<
 x < 1)またはGeのみをPIN接合が有する工
型半導体層に用いることも可能である。
We used Kelman (Ge)9 as a non-single crystal semiconductor, 5iXGe+->, (0<
x < 1) or only Ge can be used in the semiconductor layer included in the PIN junction.

以上の説明においては、P工N接合を1つ有する光電変
換装置を主として説明した。しかし半導体層がN工また
はP工接合を少なくとも1つ有する即ちN(ソースまた
はドレイン〕 ■またはP(真性または弱P型のチャネ
ル形成領域)N(ドレインまたはソース)、PIF接合
を有する絶縁ゲイト型電界効果半導体装置またはNIP
IN。
In the above description, a photoelectric conversion device having one P-N junction was mainly explained. However, the semiconductor layer has at least one N-type or P-type junction, i.e., an insulated gate type with N (source or drain) or P (intrinsic or weak P-type channel forming region), N (drain or source), or PIF junction. Field effect semiconductor device or NIP
IN.

P工NIP接合を有するトランジスタに対しても本発明
はきわめて有効である。
The present invention is also extremely effective for transistors having P-type NIP junctions.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体装置作製用のプラズマ気相反応
炉の概要を示す。 第2図は本発明で得られた特性および従来の真性半導体
の電気特性を示す。 第3図は本発明のガス精製方法によって得られた電気特
性の変化を示す。 第4図は本発明の光電変換装置を示す。 第5図は第4図(B) Kよって得られた光電変換装置
の緒特性を示す。 0      70      20      30
、’5 fifl 波、t、6 (W)晃21図 fi31圀 箪午図 手続補正書(自発) 昭和58年71月10日 特許庁長官 殿 1、事件の表示 昭和57年特許願第182546号 (昭和57年10月18日出願) 2、発明の名称 半導体装置 3、補正をする者 事件との関係 特許出願人 4、補正の対象 明11[1ifの特許請求の範囲の欄、発明の詳細な説
明の欄および図面 5、補正の内容 (1)特許請求の範囲を別紙の通り補正する。 (2)明細書箱3頁16行目 r4.5AJとあるを、「4.5人」と補正する。 (3)明細書第5頁12行目 r2〜4X10I8cm−ヨより5 X 10”’ c
m−3」とあるを「2〜4×10見cm−ヨより5×1
0見cm’Jと補正する。 (4)明細書第5頁13行目 r I X 1016〜I X 10’4 cm−ヨ」
とあるを「1×101〜1×104cm−ヨ」と補正す
る。 (5)明細書第5頁15行目 r 4 X 101’l cm−ヨ」とあるをr 4 
X 10” cm−3Jと補正する。 (6)明細書箱5頁16行目 r 4 X 10” 〜l X 10I310l3 J
とあるを[4×10ユ〜lXl0二cm−ヨコと補正す
る。 (7)明細書箱1016〜I r 2〜4 X 101Bc101B Jとあるをr 
2〜4 X1020cm−3」と補正する。 (8)明細書箱11頁8行目 「5×1018cL11−3以下」とあるを「5 X 
1020cm−3以下」と補正する。 (9)明細書箱13頁9行目 「高品名」とあるを「M品名」と補正する。 (10)明細書第22頁2行目 「■型半導体層(33) Jとあるを[I型半導体層(
31) Jと補正する。 (11)明細書箱22頁8行〜9行目 「真性半導体層」とあるを[真性半導体層(31) J
と補正する。 (12)明細書箱22頁13行目 「変換効率」とあるを「変換効率」Uし」と補正する。 (13)明細書第22頁14行目 「曲線因子」とあるを「曲線因子」観し」と補正する。 (14)明細書量22頁15行目 「短絡電流」とあるを1短絡電流1虹と」と補正する。 (15)明細書第22頁18行目 14 X 10” cm−ヨJとあるをr 4 X 1
018 Cm−3」と補正する。 「これを止れて」とあるを1これを重力−で」と補正す
る。 (17)図面の第5図を別添のごとく補正する。 以上 特許請求の範囲 1、基板または基板上の第1の電極と、該電極上にPl
、NIまたはPIN接合を少なくとも1つ有する非単結
晶半導体と、該半導体上の第2の電極とが設けられた半
導体装置において、前記接合を構成する真性または実質
的に真性の半導体層は、リンを5 X 10” cm−
3以下の不純物濃度に含有したことを特徴とする半導体
装置。 2、特許請求の範囲第1項において、真性または実質的
に真性の半導体は、格子歪を有する半非晶質または非晶
質構造を有する水素またはハロゲン元素が添加された珪
素またはゲルマニュームよりなることを特徴とする半導
体装置。 3、特許請求の範囲第1項において、真性または実質的
に真性の半導体層には酸素が5 X 10” cm’以
下添加されたことを特徴とする半導体装置。 404
FIG. 1 shows an outline of a plasma vapor phase reactor for manufacturing a semiconductor device according to the present invention. FIG. 2 shows the characteristics obtained by the present invention and the electrical characteristics of a conventional intrinsic semiconductor. FIG. 3 shows changes in electrical properties obtained by the gas purification method of the present invention. FIG. 4 shows a photoelectric conversion device of the present invention. FIG. 5 shows the initial characteristics of the photoelectric conversion device obtained from FIG. 4(B). 0 70 20 30
, '5 fifl wave, t, 6 (W) Ko 21 figure fi 31 Kunouzu procedural amendment (spontaneous) November 10, 1980 Commissioner of the Japan Patent Office Tono 1, Indication of the case 1982 Patent Application No. 182546 (Application filed on October 18, 1982) 2. Name of the invention Semiconductor device 3. Relationship with the case of the person making the amendment Patent applicant 4. Subject of the amendment 11 [1if Claims column, Details of the invention Explanation column, Drawing 5, Contents of amendment (1) The claims are amended as shown in the attached sheet. (2) Correct the statement r4.5AJ on page 3, line 16 of the specification box to "4.5 people." (3) Specification page 5 line 12 r2~4X10I8cm-Yo 5X10'''c
m-3" is "2 to 4 x 10 cm-yo to 5 x 1
Correct it to 0cm'J. (4) Specification, page 5, line 13 r I X 1016 to I X 10'4 cm-yo
Correct the statement to "1 x 101 to 1 x 104 cm - yo." (5) Page 5, line 15 of the specification: r 4
Correct as X 10" cm-3J. (6) Statement box page 5, line 16 r 4 X 10" ~ l X 10I310l3 J
The statement is corrected to [4 x 10 units ~ lXl0 2 cm-horizontal. (7) Statement box 1016-I r 2-4 X 101Bc101B J and r
2 to 4 x 1020 cm-3". (8) On page 11, line 8 of the statement box, replace “5×1018cL11-3 or less” with “5
1020 cm-3 or less”. (9) In the 9th line of page 13 of the specification box, the phrase "High quality product name" is corrected to "M product name." (10) Page 22, line 2 of the specification “■-type semiconductor layer (33) J” is replaced with “I-type semiconductor layer (
31) Correct as J. (11) Specification box page 22, lines 8 to 9, "Intrinsic semiconductor layer" [Intrinsic semiconductor layer (31) J
and correct it. (12) In the 13th line of page 22 of the specification box, amend "conversion efficiency" to "conversion efficiency". (13) On page 22, line 14 of the specification, the phrase ``fill factor'' is amended to read ``fill factor''. (14) In the 15th line of page 22, the phrase ``short circuit current'' is corrected to read ``1 short circuit current, 1 rainbow''. (15) Specification page 22, line 18 14 x 10” cm-Yo J and r 4 x 1
018 Cm-3". Correct the sentence ``Stop this'' with ``1 This is due to gravity''. (17) Figure 5 of the drawings will be corrected as attached. Claim 1 includes a substrate or a first electrode on the substrate, and a PlO on the electrode.
, a semiconductor device including a non-single crystal semiconductor having at least one NI or PIN junction, and a second electrode on the semiconductor, wherein the intrinsic or substantially intrinsic semiconductor layer constituting the junction is 5 x 10” cm-
A semiconductor device characterized by containing an impurity concentration of 3 or less. 2. In claim 1, the intrinsic or substantially intrinsic semiconductor is made of silicon or germanium doped with hydrogen or a halogen element and having a semi-amorphous or amorphous structure with lattice strain. A semiconductor device characterized by: 3. The semiconductor device according to claim 1, wherein oxygen is added to the intrinsic or substantially intrinsic semiconductor layer in an amount of 5 x 10" cm or less. 404

Claims (1)

【特許請求の範囲】 する半導体装置。 2、特許請求の範囲第1項において、真性または実質的
に真性の半導体は、格子歪を有する半非晶質または非晶
質構造を有する水素またはハロゲン元素が添加された珪
素またはゲルマニュームよりなることを特徴とする半導
体装置。 3、特許請求の範囲第1項において、真性または実質的
に真性の半導体層には酸素が5X10 H1以下添加さ
れたことを特徴とする半導体装置。
[Claims] A semiconductor device. 2. In claim 1, the intrinsic or substantially intrinsic semiconductor is made of silicon or germanium doped with hydrogen or a halogen element and having a semi-amorphous or amorphous structure with lattice strain. A semiconductor device characterized by: 3. The semiconductor device according to claim 1, wherein oxygen is added to the intrinsic or substantially intrinsic semiconductor layer in an amount of 5×10 H1 or less.
JP57182546A 1982-08-24 1982-10-18 Semiconductor device Pending JPS5972182A (en)

Priority Applications (12)

Application Number Priority Date Filing Date Title
JP57182546A JPS5972182A (en) 1982-10-18 1982-10-18 Semiconductor device
US06/525,459 US4591892A (en) 1982-08-24 1983-08-22 Semiconductor photoelectric conversion device
GB08322583A GB2130008B (en) 1982-08-24 1983-08-23 Semiconductor photoelectric conversion device
AU18327/83A AU568504B2 (en) 1982-08-24 1983-08-23 Photoelectic conversion device
US06/800,694 US4690717A (en) 1982-08-24 1985-11-22 Method of making semiconductor device
US07/047,933 US4758527A (en) 1982-08-24 1987-05-05 Method of making semiconductor photo-electrically-sensitive device
US08/165,536 US5468653A (en) 1982-08-24 1993-12-13 Photoelectric conversion device and method of making the same
US08/350,115 US5521400A (en) 1982-08-24 1994-11-29 Semiconductor photoelectrically sensitive device with low sodium concentration
US08/910,465 US6028264A (en) 1982-08-24 1997-07-25 Semiconductor having low concentration of carbon
US08/999,682 USRE38727E1 (en) 1982-08-24 1997-10-08 Photoelectric conversion device and method of making the same
US08/947,732 USRE37441E1 (en) 1982-08-24 1997-10-08 Photoelectric conversion device
US09/771,624 US6664566B1 (en) 1982-08-24 2001-01-30 Photoelectric conversion device and method of making the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57182546A JPS5972182A (en) 1982-10-18 1982-10-18 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5972182A true JPS5972182A (en) 1984-04-24

Family

ID=16120173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57182546A Pending JPS5972182A (en) 1982-08-24 1982-10-18 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5972182A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5543636A (en) * 1984-05-18 1996-08-06 Semiconductor Energy Laboratory Co., Ltd. Insulated gate field effect transistor
US5849601A (en) * 1990-12-25 1998-12-15 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same
US5859445A (en) * 1990-11-20 1999-01-12 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device including thin film transistors having spoiling impurities added thereto
US6337731B1 (en) 1992-04-28 2002-01-08 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same
US6503771B1 (en) 1983-08-22 2003-01-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor photoelectrically sensitive device
US6693681B1 (en) 1992-04-28 2004-02-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same
US7038238B1 (en) 1985-05-07 2006-05-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a non-single crystalline semiconductor layer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS564287A (en) * 1979-06-18 1981-01-17 Rca Corp Amorphous silicon solar battery
JPS5643083A (en) * 1979-09-13 1981-04-21 Yamaha Motor Co Ltd Small ship with inboard engine

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS564287A (en) * 1979-06-18 1981-01-17 Rca Corp Amorphous silicon solar battery
JPS5643083A (en) * 1979-09-13 1981-04-21 Yamaha Motor Co Ltd Small ship with inboard engine

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6503771B1 (en) 1983-08-22 2003-01-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor photoelectrically sensitive device
US5543636A (en) * 1984-05-18 1996-08-06 Semiconductor Energy Laboratory Co., Ltd. Insulated gate field effect transistor
US6221701B1 (en) 1984-05-18 2001-04-24 Semiconductor Energy Laboratory Co., Ltd. Insulated gate field effect transistor and its manufacturing method
US7038238B1 (en) 1985-05-07 2006-05-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a non-single crystalline semiconductor layer
US5859445A (en) * 1990-11-20 1999-01-12 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device including thin film transistors having spoiling impurities added thereto
US6011277A (en) * 1990-11-20 2000-01-04 Semiconductor Energy Laboratory Co., Ltd. Gate insulated field effect transistors and method of manufacturing the same
US5849601A (en) * 1990-12-25 1998-12-15 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same
US6337731B1 (en) 1992-04-28 2002-01-08 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same
US6693681B1 (en) 1992-04-28 2004-02-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same
US7554616B1 (en) 1992-04-28 2009-06-30 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same

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