JPS5965449A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form element isolation region with good accuracy in such a height as almost equal to the semiconductor substrate surface by selectively remaining semiconductor film within the recessed part where becoms the element isolation region without depending on a pattern width of recessed part. CONSTITUTION:An SiO2 film 11, PSG film 12, and an Si3N4 film 13 are formed on a P type Si substrate 10. A recessed part 15 is formed by etching, an SiO2 film 17 is formed by thermal oxidation method, the Si3N4 film 13 is removed by etching, and a poly-Si film 18 is formed and finally heat treatment is also conducted. The poly-Si film 18a, PSG film 12 and the SiO2 film 11 are removed by etching, an SiO2 film 19 is formed by the oxidation to the entire part. Thereby, an element isolating region having the surface of poly-Si film 18 which is almost equal in height to the surface of substrate 10 can be formed. Thereby, difference of etching rate between the poly-Si film 18a where phosphorus is diffused and the poly-Si film 18 where phosphorus is not diffused becomes large and the poly-Si film 18 can selectively be left in the recessed part 15.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming an isolation region of a semiconductor device.

Conventional structure and its problems Conventionally, - As a method of forming an element isolation region in the manufacture of semiconductor devices, a recess is formed by etching the part to be the element isolation region, and then polycrystalline silicon is buried in the recess to form an element. There is a method of forming a separation region. An example of the prior art will be explained with reference to FIG.

A p-type semiconductor substrate (Si02 film) 2 and a silicon nitride film (813N4 film) 3 are formed.
A photoresist pattern 4 having a desired separation pattern width is formed on a substrate 1 by photolithography.

After etching the Si3N4 film 2 using the photoresist pattern 4 as an etching mask, the Si substrate 1 is etched to a target depth by anisotropic dry etching to form the recess 5. Then, boron ion implantation for a channel stopper is performed to form an ion implantation region 6 on the bottom surface of the recess 5 (FIG. 1a) () Next, the photoresist pattern 4 is removed and a 5102 film is formed on the surface of the recess 6 by thermal oxidation. O forming 7 then Po
A 1ySi film 8 is formed (No. 1; No. b).

Next, by removing the Po177Si film 8 on the Si3N4 film 3 by dry etching or wet etching, the inside of the recess 6 (/i: Po1ySi film 8a
(Figure 1C).

Next, the Po 1yS i film 8a'i is oxidized, and the S 102
A film 9 is formed. After that, Si3N4 film 3 and b 10
2 membranes 2fz! : By removing it, most of the recess 5 is filled with the PolySi film 8a, as shown in FIG. 1(d).
An element isolation region having a C-containing structure can be formed.

However, in the above method, when the PoLySi film 8t on the S l sN4 film 3 is removed by etching, the Po lySi film 8 formed on the region of the recess 5 is also etched at the same etching rate. Therefore, there is a problem that a step is formed in the Po1ySi film 8a remaining in the recess 5, which causes disconnection of the M wiring. Furthermore, in the case of semiconductor devices in which the pattern widths of the recesses 5 are different, it is difficult to use the above method. This is because, if the recess has a relatively fine pattern width and the turn width is constant, the difference in thickness between the PolySi film on the Si3N4 film 3 and the PolySi film on the recess 5 causes the Po1ySi film to form inside the recess 5. 8a can remain.

However, if the pattern width of the recess 6 is wide, the thickness of the PolySi film on the Si3N4 film and the recess will be approximately the same, so when the PolySi film on the Si3N4 film is etched, the PolySi film in the recess 5 will also be etched. Since it is etched in the same way, there is a problem that Po1ySi does not remain in the recess.

Furthermore, Japanese Patent Laid-Open No. 60-107877 proposes leaving photoresist in the recesses, etching the buried material using the photoresist as a mask, and leaving the buried material only in the grooves. In the above example as well, there is a problem that if the rIJ of the recess is wide, no photoresist remains, so it does not function as an etching mask, and the buried material cannot remain in the groove.

By the way, the inventors have found that the etching rate of the semiconductor film in the diffusion region is about 10 to 20 times faster than the etching rate of the semiconductor film in the non-diffused region. As a result, it was found that if selective etching is performed after selectively diffusing the semiconductor film in areas other than the desired area, only the semiconductor film in the desired area that has not been diffused remains.
and.

OBJECTS OF THE INVENTION In view of these conventional problems, an object of the present invention is to provide a method for manufacturing a semiconductor device that can selectively form a pattern of a semiconductor film without using an etching mask. Another object of the invention is to selectively leave the semiconductor film in the recesses forming the element isolation region without depending on the pattern 1 of the recesses, so that the entire element isolation region having approximately the same height as the surface of the semiconductor substrate can be formed. An object of the present invention is to provide a complete method for manufacturing a semiconductor device that can be formed with high precision.

Structure of the Invention The present invention involves forming a pattern of a deposited film containing impurities (for example, a PSG film, an As-doped 5IO2 film) or an oxidation prevention film on a semiconductor substrate, and then depositing a semiconductor film (for example, a Pol
ySi film, amorphous Si film) is formed, and impurities are selectively diffused into the semiconductor film from the deposited film pattern by heat treatment to form impurity diffusion regions. Then, based on the difference in etching rates, the semiconductor film in the impurity diffusion region where the etching rate is fast is selectively removed, while the semiconductor film in the region where the impurity is not diffused and where the etching rate is slow is left. This is a characteristic feature. That is, in forming the element isolation region, a deposited film containing impurities is formed on the surface of the semiconductor substrate outside the recessed region that will become the element isolation region. In this case, after the semiconductor film is formed, impurities can be selectively diffused into the semiconductor film other than the inside of the recess by heat treatment. After selective diffusion, if selective etching is carried out based on the difference in etching rate, only the semiconductor film in the recesses in which the impurities have not been diffused remains.

DESCRIPTION OF THE EMBODIMENTS FIG. 2 shows a first embodiment of the present invention in which a semiconductor film is buried to form an element isolation region.

A SiO2 film 11 is deposited on a p-type St substrate 10, a deposited film containing impurities, such as a PSG film 12, and a Si3N4 film 13.
'fc formation. 5in2 film 11 iJ, PSG film 12 This is a diffusion prevention film for preventing diffusion into the empty Si substrate 10, and the Si3N4 film 13 becomes an oxidation prevention film during selective oxidation. Thereafter, a photoresist pattern 14 is formed on the area other than the isolation area by photolithography (second
Diagram a).

Next, using the photoresist pattern 14 as a mask, Si3N
4 film 13, PSG film 12+5102 film 11, and Si substrate 1o are etched to a desired depth. For example, Si3N4 film 13, PSG film 12, Si○
The etching of the second film 11 is carried out using a reactive sputter etching method using C2F6. C3F8. C4F8
．． This is done using either CF4 (in the case of Si3N4 film etching). The Si substrate 1o is etched using a dry etching technique such as a reactive sputter etching method or a reactive ion beam etching method. CCu4,0120℃2. S is applied to the desired depth from the surface of the Si substrate 1o using either SF6 noise.
ii. etching to form the recess 15. Then, Si
Boron, for example, having the same conductivity type as the substrate 10 is ion-implanted to form an ion-implanted region 16 serving as a channel stopper at the bottom of the recess 15 (FIG. 2b).

Next, after removing the photoresist pattern 14, the Si3
Using the N4 film 13 as an oxidation prevention mask, an insulating thin film such as a Si○2 film 17 is formed on the surface of the recess 15 by a thermal oxidation method.
(Figure 2, C).

Next, the 813N4 film 13 is removed by etching using hot phosphoric acid or CF4 plasma. Thereafter, a semiconductor film such as a Po1ySi film is formed by any method such as CVD, vapor deposition, or sputtering. Then, heat treatment is performed for example 1
Apply for 30 minutes at oOo°C. At this time, on PSG film 1 film 2
The diphosphorus on the PSG film 1 is diffused into the upper a 1 yS i film 18a, but is not diffused into the PolyS i film 18 in the recess 16 (FIG. 2d).

Next, the Po1ySi film 18ai is etched. As the etching solution, for example, a mixed solution consisting of nitric acid, hydrofluoric acid, and acetic acid is used. In this case, the PolySi film 18a in which phosphorus is diffused by the PSG film 12
is the undiffused Po1ySi film 18 in the recess 15.
The etching rate is about 10 to 20 times faster than that of . Therefore, the olyS film on the PSG film 1 and the film 2 is etched almost without etching the PolySi film 18 in the recess 16.
I film 18a' (H etching can be performed, recess 15
A Po1ySi film 18 remains inside (FIG. 2e).

Next, the entire PSG film 12 and SiO2 film 11 are removed by oxidation, for example, 900 to 1050.
Performed in pressurized steam at 6-10°C
Once the film 19 is formed, as shown in FIG. 2(f) (Si substrate 10
It is possible to form an element isolation region having a surface of the Po1ySi film 18 that is substantially flat with the surface of .

As described above, according to the first embodiment, Si is formed on the PSG film 12.
Since the 3N4 film 13 is formed, S is formed on the surface of the recess 15.
When the i○2 film 17 is completely removed, the phosphorus concentration on the surface of the PSG film 12 does not decrease. Therefore, after etching the Si3N4 film 13, a Po1ySi film 18 is formed and a heat treatment is performed to form a PSCi film 12! ;l PolySi film 1
Phosphorus can be easily diffused into 8a. As a result, the difference in etching rate between the Po XySi film 18a in which phosphorus is diffused and the Po1ySi film 18 in which phosphorus is not diffused increases, and P is selectively and easily deposited in the recess 15.
The o1ySi film 18 can remain.

Next, a second embodiment of the present invention will be described using FIG. 3.

FIGS. 2(a) to 2(a) show the first embodiment of the present invention.
The structure of FIG. 3(a) having the same structure as FIG. 2(c) is obtained by a method similar to step C). Figure 3(a)
1Q is a Si substrate, 11 is an SiO2 film, 12 is a PSG film, 13 is a Si3N4 film, 16 is a recess, 16 is an ion implantation region, and 17 is an S102 film.

Next, the Si3N4 film 13 is removed by etching using hot phosphoric acid or CF4 plasma. After that, the semiconductor film example (i
d'PolySi film 18f is formed by any method such as CVD method, vapor deposition method, or sputtering method. and,
A protective film serving as an outward diffusion prevention film is formed on the PolyS i film 18, for example, a SiO2 film 20 using a 20D method, plasma CvD.
It is formed by a method such as a heat oxidation method or a thermal oxidation method (FIG. 3b).

Next, heat treatment is performed at, for example, 1000'C for 30 minutes (FIG. 3C). At this time, Po1ySi on the PSG film 12
In the film 18a, 2 phosphorus is diffused on the PSG film 1, and the recess 15
It is not diffused into the PolyS i film 18 inside. Moreover, the surface of the Po 1 yS i film 18a is b 102 film 2
0, 2Po1 on PSG film 1
Phosphorus diffused into the ySi film 18a is PolyS
The Po1yTi film 1 does not diffuse outward from the surface of the i film 18a.
The surface concentration of 8a does not decrease.

Next, after removing the 5102 film 2o, an element isolation device having a structure similar to that shown in FIG. 2(f) is separated by a method similar to the steps shown in FIGS. A region can be formed.

As described above, according to the second embodiment, since all 20 of the Sio2 films 20 are formed on the Po1ySi film 18, during the heat treatment, the Po1ySi film 18 is
Since phosphorus does not diffuse outward from the surface of the Po1ySi film 18a, the surface concentration of the Po1ySi film 18a does not decrease.

Therefore, when the Po1ySi film 18a is selectively etched, the etching rate does not decrease due to a decrease in the phosphorus concentration on the surface of the Po1ySi film 18a, and the etching rate does not decrease due to a decrease in the phosphorus concentration on the surface of the Po1ySi film 18a.
The difference in etching rate with the 1yS i film 18 becomes large, and Po1yS is selectively and easily deposited in the recess 15.
Note that in the first and second embodiments, the PSG film is used as the deposited film 12 containing impurities, but the A6
A doped 5lo2 film may also be used.

Further, although the first and second embodiments have been described using a PolySi film as the semiconductor film 18, it goes without saying that an amorphous Si film may also be used.

Furthermore, in the second embodiment, as the protective film 2o, Si○
Although the explanation has been made using two films, an 813N4 film or a plasma Si3N4 film may be used.

Effects of the Invention As described above, according to the present invention, impurities can be selectively diffused into the semiconductor film in the region to be removed from the impurity-containing deposited film formed under the semiconductor film, and moreover, the impurity can be diffused into the region where the impurity is diffused. Due to the difference in etching rate between the semiconductor film in the semiconductor film and the semiconductor film in the region where impurities are not diffused, the region where impurities are diffused can be selectively etched away.

As a result, it is possible to easily fill the concave portion which becomes the element isolation region.
Moreover, the semiconductor film can be left without depending on pattern II of the element isolation region vc. Therefore, in the present invention, since the pattern width of the region of the element thickness 1 is determined by the upper width, the inter-element isolation region does not expand beyond the concave portion 11], and the inter-element isolation region with few convex portions is formed. This technology greatly contributes to the production of high-density semiconductor devices.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are cross-sectional views of a conventional device isolation region manufacturing process, and FIGS. 2(a) to (f) are cross-sectional views of a manufacturing process of a device isolation region according to an embodiment of the present invention. Figure, Figure 3(a)
~(C) are cross-sectional views during the manufacturing process of an isolation region between elements according to another embodiment of the present invention; 010-, SL substrate, 11. 17, 19, 20. ,
,,...SiO2 film, 12...PSG lament, 13...
- Si3N4 film, 15... recess, 16... ion implantation region, 18... = Po 1ysi film. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure 3 s

Claims (1)

[Scope of Claims] (1) A step of forming a diffusion prevention film on the whole surface of a semiconductor substrate, a step of forming a deposited film containing impurities on the diffusion prevention film, and a step of forming an oxidation prevention film on the deposited film. etching predetermined regions of the oxidation prevention film, the deposited film, and the diffusion prevention film, and further etching the semiconductor substrate to a desired depth to form a recess;
A step of forming a thin film on the surface of the recess, a step of etching the anti-oxidation film, a step of forming a semiconductor film on the semiconductor substrate, and a step of diffusing impurities from the deposited film into the semiconductor film by heat treatment. a step of forming a diffusion region, selectively etching the semiconductor film, removing the semiconductor film in the impurity diffusion region with a fast etching rate, and removing the semiconductor film in the recess where impurities with a slow etching rate are not diffused; 1. A method of manufacturing a semiconductor device, comprising a step of leaving the semiconductor device remaining. ? ) The method for manufacturing a semiconductor device according to claim 1, wherein a PSG film is used as the deposited film. (3) The method for manufacturing a semiconductor device according to claim 1, wherein a Po 1 yS i film is used as the semiconductor film. (4) The method for manufacturing a semiconductor device according to claim 1, wherein a mixed solution of hydrofluoric acid, nitric acid, and acetic acid is used in the selective etching of the semiconductor film. (6) forming a diffusion prevention film on the entire surface of a semiconductor substrate; forming a deposited film containing impurities on the diffusion prevention film; and forming an oxidation prevention film on the deposited film; etching predetermined regions of the oxidation prevention film, the deposited film, and the diffusion prevention film, and further etching the semiconductor substrate to a desired depth to form a recess;
forming a thin film on the surface of the recess, etching the anti-oxidation film, forming a semiconductor film on the semiconductor substrate, forming a protective film on the semiconductor film, and removing the a step of diffusing an impurity from a deposited film into the semiconductor film to form an impurity diffusion region; a step of etching the protective film; and selectively etching the semiconductor film to form a semiconductor in the impurity diffusion region with a high etching rate. 1. A method of manufacturing a semiconductor device, comprising the step of removing the film and leaving the semiconductor film in the recess where impurities with a slow etching rate are not diffused. (6) The method for manufacturing a semiconductor device according to claim 6, wherein a PSG film is used as the deposited film. (7) The method for manufacturing a semiconductor device according to claim 5, wherein a Po1ySi film is used as the semiconductor film. (8) A method for manufacturing a semiconductor device according to claim 1, wherein a mixed solution of hydrofluoric acid, nitric acid, and acetic acid is used in the selective etching of the semiconductor film. (9) The method for manufacturing a semiconductor device according to claim 6, characterized in that an 8102 film is used as the protective film.