JPS596532B2 - phase synchronized oscillator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase synchronized oscillator used in communication devices, electronic equipment, and the like.

A conventional phase-locked oscillator basically includes a phase comparator 1, a loop filter circuit 2, and a voltage-controlled oscillator 3, as shown in FIG.

In such a phase synchronized oscillator, when the input signal is interrupted, the value of the output of the phase comparator 1 immediately before the input signal is interrupted is normally changed to maintain the phase of the output signal immediately before the input signal is interrupted. The voltage controlled oscillator 3 can be configured to oscillate at the center frequency, or a sample holding circuit can be inserted between the loop filter circuit 2 and the voltage controlled oscillator 3 to hold the control voltage just before the input signal is cut off, so that the same voltage can be maintained. The phase holding time was extended by making the voltage controlled oscillator oscillate at the same frequency using the control voltage.

However, if the output of the phase comparator is set to a value that allows the voltage-controlled oscillator to oscillate at the center frequency when the input signal is disconnected, the oscillation frequency of the voltage-controlled oscillator is essentially the same as when the input signal is present. It cannot be.

That is, there is a defect in that this state cannot be obtained unless the oscillation frequency before the input signal is cut off matches or is sufficiently close to the center frequency.

Furthermore, it has been difficult to integrate a sample holding circuit into an IC because the sample holding circuit itself is an analog circuit and the elements constituting the circuit must be highly accurate.

An object of the present invention is to eliminate the above-mentioned defects, configure the main part of the digital circuit with a digital circuit that can be easily integrated as an IC, and even after the input signal is cut off, the signal remains effectively equal to the immediately preceding phase difference signal. An object of the present invention is to provide a phase synchronized oscillator that can maintain the phase of an output signal for a long time using a phase difference signal.

According to the present invention, a voltage controlled oscillator; a first phase comparator that receives a digital input signal and an output signal of the voltage controlled oscillator and outputs a signal proportional to a phase difference between the two signals;
and a loop filter that receives an output signal of the first phase comparator, suppresses high frequency components of the signal, and provides a control signal to the voltage controlled oscillator, wherein the output signal of the voltage controlled oscillator is a second variable delay circuit that receives the output signal of the variable delay circuit and the output signal of the voltage controlled oscillator and outputs a signal proportional to the phase difference between the two signals; a phase comparator, a circuit that receives and compares the Okayama power signals of the first and second phase comparators, and controls the variable delay circuit so that the comparison outputs have a predetermined relationship; and the digital input signal. and a circuit for selecting one of the outputs of the first and second phase comparators is added between the first phase comparator and the loop filter. By this, when the digital input signal is cut off, the control output of the control circuit is cut off by the output of the signal cutoff detection circuit, and the second
There is obtained a phase synchronized oscillator characterized in that the selection circuit is driven to select the output of the phase comparator.

Next, a phase synchronized oscillator according to the present invention will be described with reference to an embodiment and a block diagram shown in FIG.

In the figure, the same components as in FIG. 1 are indicated by the same reference numerals, and the explanation of those parts will be omitted.

Symbol 11 is a variable delay circuit for making the output of the voltage controlled oscillator 3 effectively in phase with the input signal, and is configured by, for example, a tapped delay line 11-1 and a tap selection circuit 11-2. Ru.

12 is a phase comparator between the signal obtained from the variable delay circuit 11 and the output signal of the voltage controlled oscillator 3; 13 is a phase comparator that compares the output signals of the phase comparator 1 and the phase comparator 12; A control circuit 14 controls the delay amount of the variable delay circuit 11 so that the delay amount is equal to the delay amount of the variable delay circuit 11.
12 is an output signal selection circuit, 15 is an input signal disconnection detection circuit, and 16 is a gate circuit for blocking the control signal from the control circuit 13 to the variable delay circuit 11 when the input signal is disconnected. .

In the phase synchronized oscillator configured as described above, when there is a normal input signal, the control circuit 13 controls the phase difference signal output of the phase comparator 1 and the phase difference signal output of the phase comparator 12 to be effectively controlled. The delay amount of the variable delay circuit 11 is controlled so that it becomes equal to .

Also, at this time, the selection circuit 14 selects the output signal of the phase comparator 1, and therefore the loop as a phase synchronized oscillator consists of the phase comparator 1, the selection circuit 14, and the loop filter circuit 2.
, a voltage controlled oscillator 3.

Next, when the input signal is disconnected, the input signal disconnection detection circuit 15
operates, the selection circuit 14 is switched to select the output signal of the phase comparator 12, and the control signal from the control circuit 13 is blocked by the gate circuit 16, so that the phase difference signal output of the phase comparator 12 is is held effectively equal to the phase difference signal output of the phase comparator 1 immediately before the input signal was cut off.

A loop serving as a phase synchronized oscillator at this time is constituted by a one-phase comparator 12, a selection circuit 14, a loop filter circuit 2, and a voltage controlled oscillator 3.

As a result, even after the input signal is disconnected, the phase difference signal applied to the loop filter circuit 2 is maintained at a value effectively equal to the value immediately before the normal input signal was disconnected, and thus,
The voltage controlled oscillator 3 continues to oscillate at the same frequency even after the input signal is cut off.

According to this embodiment, most of the main parts of the phase-locked oscillator can be constructed only from digital circuits that are easy to integrate as an IC.

As is clear from the above description, the phase synchronized oscillator according to the present invention is not a scale in which most of the components can be integrated into ICs, and even after the input signal is disconnected, the second phase comparator is used to detect the input signal disconnection. Since the phase difference signal that is effectively equal to the phase difference signal before is applied to the loop filter circuit,
This has the effect of causing the voltage controlled oscillator 3 to oscillate at the same frequency as before the input signal was cut off, and to maintain that phase for a long time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of a conventional phase-locked oscillator, and FIG. 2 is a block diagram showing the configuration of an embodiment according to the present invention. In the figure, 1 and 12 are phase comparators, 2 is a loop filter circuit, 3 is a voltage controlled oscillator, 11 is a variable delay circuit, 11-1 is a tapped delay line, 11-2 is a tap selection circuit, and 13 is a tap selection circuit. control circuit, 14 is a selection circuit, 15
1 is an input signal disconnection detection circuit, 16 is a gate circuit, ■ is an input signal terminal, and 0 is an output signal terminal.

Claims (1)

[Claims] 1 a voltage controlled oscillator, a first phase comparator that receives a digital input signal and an output signal of the voltage controlled oscillator and outputs a signal proportional to the phase difference between the two signals; and an output of the first phase comparator. and a loop filter that receives a signal, suppresses a high frequency component of the signal, and provides a control signal to the voltage controlled oscillator, and a phase synchronized oscillator that receives an output signal of the voltage controlled oscillator and variably controls the output signal. a second phase comparator that receives the output signal of the variable delay circuit and the output signal of the voltage controlled oscillator and outputs a signal proportional to the phase difference between the two signals; and a circuit that receives and compares the Ryokawa power signal of the second phase comparator and controls the variable delay circuit so that the comparison output has a predetermined relationship, and a circuit that detects disconnection of the digital input signal. Further, by inserting a circuit for selecting one of the outputs of the first and second phase comparators between the first phase comparator circuit and the loop filter, the digital input signal is disconnected. The control output of the control circuit is cut off by the output of the signal disconnection detection circuit, and the selection circuit is driven to select the output of the second phase comparator. Characteristic phase-locked oscillator.