JPS5961566U - printed wiring board - Google Patents
printed wiring boardInfo
- Publication number
- JPS5961566U JPS5961566U JP15589982U JP15589982U JPS5961566U JP S5961566 U JPS5961566 U JP S5961566U JP 15589982 U JP15589982 U JP 15589982U JP 15589982 U JP15589982 U JP 15589982U JP S5961566 U JPS5961566 U JP S5961566U
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- conductive foil
- divided
- foil pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図7.イは従来の印刷配線基板における正面パター
ン図及び横断面図、第2図7.イは本考案による印刷配
線基板における正面パターン図及び横断面図である。
−
1・・・レジスト、2,3.4・・・導電箔パターン、
5・・・ハンダ、8・・・基板。Figure 17. A is a front pattern diagram and a cross-sectional view of a conventional printed wiring board, and FIG. A is a front pattern view and a cross-sectional view of a printed wiring board according to the present invention.
- 1...Resist, 2, 3.4... Conductive foil pattern,
5... Solder, 8... Board.
Claims (2)
ごとに分割し、ハンダ付着を行い、電流容量を大きくし
たことを特徴とする印刷配線基板。(1) A printed wiring board characterized in that adjacent conductive foil patterns are divided into small intervals using resist and solder is applied to increase current capacity.
間隔ごとに分割すると共に、該小間隔に分割された
導電箔パターンを、隣接する小間隔に分割された導電箔
パターンのレジスト部に対向スるよう配列したことを特
徴とする実用新案登録請求の範囲第1項記載の印刷配線
基板。(2) Make the adjacent conductive foil pattern smaller with resist.
A utility model registration claim characterized in that the conductive foil pattern is divided into intervals, and the conductive foil pattern divided into small intervals is arranged so as to face the resist portion of the adjacent conductive foil pattern divided into small intervals. A printed wiring board according to scope 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15589982U JPS5961566U (en) | 1982-10-14 | 1982-10-14 | printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15589982U JPS5961566U (en) | 1982-10-14 | 1982-10-14 | printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5961566U true JPS5961566U (en) | 1984-04-23 |
Family
ID=30344170
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15589982U Pending JPS5961566U (en) | 1982-10-14 | 1982-10-14 | printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5961566U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0472675U (en) * | 1990-10-31 | 1992-06-26 |
-
1982
- 1982-10-14 JP JP15589982U patent/JPS5961566U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0472675U (en) * | 1990-10-31 | 1992-06-26 |
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