JPS5961137A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5961137A JPS5961137A JP17124782A JP17124782A JPS5961137A JP S5961137 A JPS5961137 A JP S5961137A JP 17124782 A JP17124782 A JP 17124782A JP 17124782 A JP17124782 A JP 17124782A JP S5961137 A JPS5961137 A JP S5961137A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- electron beam
- temperature
- annealing
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000137 annealing Methods 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 11
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 238000010276 construction Methods 0.000 claims 1
- 238000010894 electron beam technology Methods 0.000 abstract description 23
- 239000000758 substrate Substances 0.000 abstract description 10
- 238000010438 heat treatment Methods 0.000 abstract description 4
- 238000009826 distribution Methods 0.000 abstract description 3
- 235000012431 wafers Nutrition 0.000 abstract 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 229920005591 polysilicon Polymers 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 235000007575 Calluna vulgaris Nutrition 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/2636—Bombardment with radiation with high-energy radiation for heating, e.g. electron beam heating
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
（１） 発明の技術分野
本発明は半導体装置の製造方法に係り特に半導体装置の
アニール方法に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for annealing a semiconductor device.
（２） 技術の背景
近時、半導体装置の製造工程において、シリコン等の基
板上に酸化膜を形成し、該酸化膜」二にコーティングし
たポリシリコン膜に電子ビームを当て、該ポリシリコン
膜を再結晶化させて結晶化をよくする方法や基板上に酸
化膜を形成し、該酸化股上にポリシリコン膜を形成する
と共に更にポリシリコン膜上にタングステン（Ｗ）、チ
タン（Ｔｉ）、モリブデン（Ｍｏ）等のメタルを蒸着し
、該！タル層上より電子ヒースを照射してシリザイｌＳ
を形成する方法等に利用されている。(2) Background of the technology Recently, in the manufacturing process of semiconductor devices, an oxide film is formed on a substrate such as silicon, and an electron beam is applied to the polysilicon film coated on the oxide film to remove the polysilicon film. A method of recrystallizing to improve crystallization, forming an oxide film on the substrate, forming a polysilicon film on the oxide layer, and further adding tungsten (W), titanium (Ti), molybdenum ( Metal such as Mo) is vapor-deposited, and the corresponding! Silisail S by irradiating electronic heather from above the metal layer.
It is used in methods such as forming
このような再結晶化または単結晶化方法について説明す
る。Such a recrystallization or single crystallization method will be explained.
（３） 従来技術の問題点
Ｔｈｌ １１Ｄは電子ビームアニールによってシリコン
基板ｌと同一結晶方向の単結晶化をポリシリコン膜３に
ついて行うもので、基板１は例えば結晶方向が１’００
のシリコンで、該基板上に酸化膜２を形成し、窓開き２
ａを該酸化膜に施して後にポリシリコン膜３を酸化膜２
と窓開き部２ａ上に施し。(3) Problems with the prior art Thl 11D is a method in which the polysilicon film 3 is single-crystallized in the same crystal direction as the silicon substrate 1 by electron beam annealing.
An oxide film 2 is formed on the substrate using silicon, and a window opening 2 is formed.
a to the oxide film, and then the polysilicon film 3 is replaced with the oxide film 2.
and on the window opening 2a.
シリコン基板１とポリシリコン膜３を対接させた状態で
電子ビーム４をポリシリコン膜３上から照射することで
ポリシリコン膜３は熔解され、基板と接する面から再凝
固する際にシリコンの結晶方向と同一の１００方向に単
結晶化を進めることができるのでこの部分に半導体素子
のヘ−スやコレクタ等の拡散領域を作ることができる。By irradiating the electron beam 4 from above the polysilicon film 3 with the silicon substrate 1 and the polysilicon film 3 facing each other, the polysilicon film 3 is melted, and when it re-solidifies from the surface in contact with the substrate, silicon crystals are formed. Since single crystallization can proceed in the same 100 directions, diffusion regions such as the semiconductor element's base and collector can be formed in this portion.
このような基板１上のポリシリコン膜３を単結晶化させ
るためには第２図に示すようにこれら基板よりなるウェ
ハ５をステージ６上に載置し、ウェハ５及びステージ６
を真空容器内に入れ、電子ヒーノ・４を照射し、ステー
ジ６は容器外部の駆動手段８でＸまたはＹ軸方向に移動
さ−ｌるようになされる。In order to single-crystallize the polysilicon film 3 on such a substrate 1, as shown in FIG. 2, a wafer 5 made of these substrates is placed on a stage 6, and
is placed in a vacuum container and irradiated with an electronic heater 4, and the stage 6 is moved in the X or Y axis direction by a driving means 8 outside the container.
このように電子ビームでウェハ５をアニールする場合に
は、真空中にウェハ５が置かれるために熱転率か悪いの
でステージ６を加熱してウェハ５を間接的に予め加熱し
ているが、真空中にウェハ５があるため均一に加熱させ
ることができずそのため、電子ビームを照射するとウェ
ハが急激に加熱されて破ｔｉする等の欠点があった。When annealing the wafer 5 with an electron beam in this way, the wafer 5 is placed in a vacuum and the heat transfer rate is poor, so the stage 6 is heated to indirectly heat the wafer 5 in advance. Since the wafer 5 is located in a vacuum, it cannot be heated uniformly, and therefore, when irradiated with an electron beam, the wafer is rapidly heated and ruptured.
（４） 発明の目的 本発明ば」二記欠点に鑑みなされたものであり。(4) Purpose of the invention The present invention has been made in view of the above two drawbacks.
ステージ等を加熱させることなく、電子ビームで半導体
装置をアニールする前に電子ビームでウェハを予備加熱
させることでウェハを均一に加熱させると共にアニール
温度を高めることを目的とするものである。The purpose is to uniformly heat the wafer and increase the annealing temperature by preheating the wafer with an electron beam before annealing the semiconductor device with the electron beam without heating the stage or the like.
（５） 発明の構成
本発明の特徴とするところは、半導体装置の製造工程に
おいて、電子ビームをウェハ上に照射し゛ζアニールを
行う前に電子ビームにより該ウェハを予備加熱してなる
ことを特徴とする半導体装置の製造方法によって達成さ
れる。(5) Structure of the Invention The present invention is characterized in that in the manufacturing process of semiconductor devices, the wafer is preheated by the electron beam before being irradiated with an electron beam onto the wafer and performing ζ annealing. This is achieved by a method of manufacturing a semiconductor device.
（６） 発明の実施例
以下２本発明の一実施例を第３図及び第４図について説
明する。(6) Embodiments of the Invention Two embodiments of the present invention will be described below with reference to FIGS. 3 and 4.
第３図は本発明の電子ビームを半導体装置に照射する場
合の照射方法を説明するための路線図。FIG. 3 is a route diagram for explaining an irradiation method for irradiating a semiconductor device with the electron beam of the present invention.
第４図ｔａ＋、 （ｂ）は予備照射時とアニール照射時
のウェハ面上の温度分布を示す線図である。第３図は。FIG. 4 ta+, (b) is a diagram showing the temperature distribution on the wafer surface during preliminary irradiation and annealing irradiation. Figure 3 is.
第１図に示した半導体素子に予備加熱を行う場合を示す
もので電子ビーム４の焦点をディツメ−カス状態、ずな
わら１ｍｍ〜１０μｍφ程度のスポット径で基板１の深
さ方向に焦点深度を１０．１１と移動さ−Ｕ、且つステ
ージ６の駆動手段８をＸ軸またはＹ軸方向に移動させて
半導体素子、ずなわぢ。This figure shows the case of preheating the semiconductor element shown in FIG. 10. Move the semiconductor element 11 and move the driving means 8 of the stage 6 in the X-axis or Y-axis direction.
つ′：１−ハ５の広い面「１に渡って且つ電子ヒ’−ム
（７） 、：ｃネルキーをｌ０ＫｅＶ乃至６０Ｋ ｅＶ
範囲に変化さ−ｌ予備加熱すると、 ｆｆ１ｉ（軸に温
度′１゛を、横軸にウェハのＸまたはＹ軸方向の距離を
とれば第４図（８１で示す四線１２にて表すことができ
る。across the wide surface of 1-5 and the electron beam (7);
When preheating changes in the range -1, ff1i (If the axis is the temperature '1' and the horizontal axis is the distance in the X or Y axis direction of the wafer, it can be expressed by the four lines 12 shown in Figure 4 (81). can.
ずなわち、・ウェハ５の広い範囲に渡って全体的に均一
に所定温度に保つことができる。このようにウェハを所
定？ｔＡ度に保持した状態でウェハ５のアニールずべき
位置に電子ヒーム４の焦点位置９を〕Ａ−カス状態とな
しスボ、１−径をＬＯｔｔｍψ位にし、且つ電子ヒーム
の照射エネルギーを一定値の例えば３０Ｋ ｅＶとして
アニールを行うと、第４図（ｂ＋に示ずようにアニール
ずべき位置の温度は予備加熱でウェハが一定に保たれた
温度に上乗−１された曲線１３で示される温度分布とな
り、ウェハの温度を１５００’ｃ以上に高めることが可
能となった。That is, it is possible to maintain a predetermined temperature uniformly over a wide range of the wafer 5 as a whole. Predetermined wafer like this? With the wafer 5 held at tA degree, the focal position 9 of the electron beam 4 is set at the position where the wafer 5 should be annealed. For example, when annealing is performed at 30K eV, the temperature at the position where the annealing is to be performed, as shown in Figure 4 (b+), is the temperature shown by curve 13, which is the temperature at which the wafer was kept constant during preheating, multiplied by -1. distribution, making it possible to raise the wafer temperature to 1500'c or more.
従来では１５００℃まで温度を上昇させると熱歪のため
にウェハが破壊し、アニールすることができなかったが
５本発明によればこのような弊害が除かれた。Conventionally, when the temperature was raised to 1500° C., the wafer was destroyed due to thermal distortion and annealing could not be performed.5 According to the present invention, such disadvantages have been eliminated.
（６） 発明の効果
ずなわら本発明によれば、上記したように構成したので
アニールと同一工程、同一装置で半導体装置のウェハを
予備加熱させることができ、しかも真空中でも電子ビー
ムによる加熱であるためにウェハの熱伝導率には関係な
く電子ビームの走査方法により均一に加熱できるので、
ウェハの全体を予備加熱温度に保持した状態で−に−ル
できるのでアニールすべき場所の温度を著しく高めても
ウェハを熱歪により破損さ−しない特徴を有する。(6) Effects of the Invention According to the present invention, since it is constructed as described above, a wafer of a semiconductor device can be preheated in the same process and with the same equipment as annealing, and moreover, it can be heated by an electron beam even in a vacuum. Because of this, the wafer can be heated uniformly by scanning the electron beam regardless of its thermal conductivity.
Since the wafer can be annealed while the entire wafer is maintained at the preheating temperature, the wafer is not damaged by thermal strain even if the temperature of the area to be annealed is significantly increased.
第１図は従来の半導体装置の電子ヒームによるアニール
で単結晶化を行う方法を説明するだめの半導体装置の側
断面図、第２図は電子ビーム装置内での半導体装置用ウ
ェハの予備加熱方法を示す要部の路線図、第３図は本発
明による半導体装置の予（１，ｌｉ加熱及びアニール方
法を説明するための概略図、第４図［ａｌ、 （ｂｌは
本発明の予備加熱並びにアニール時の温度とウェハ面」
二の距離との関係を示す線図である。
ｌ・・・基板、 ２・・・酸化膜、 ３・・・ポ
リシリコン膜、 ４・・・電子ヒーム、５・・・ウェ
ハ、 ６・・・ステージ、 ７・・・真空容器、
８・・・駆動手段、 ９゜１０．１１・・・電子ビ
ーム焦点位置。
第１図
第２図
第 ３
×□×
ｔ″″Ｉ
１
足ト甑領×え１コＹ
τε萬１Ｘ１１コＹFigure 1 is a side cross-sectional view of a semiconductor device illustrating a conventional method of single-crystallizing a semiconductor device by annealing with an electron beam, and Figure 2 is a method of preheating a wafer for semiconductor devices in an electron beam device. FIG. 3 is a schematic diagram for explaining the preheating and annealing method of the semiconductor device according to the present invention, and FIG. "Temperature and wafer surface during annealing"
FIG. 2 is a diagram showing the relationship between two distances; 1... Substrate, 2... Oxide film, 3... Polysilicon film, 4... Electron beam, 5... Wafer, 6... Stage, 7... Vacuum container,
8... Drive means, 9°10.11... Electron beam focal position. Figure 1 Figure 2 3
Claims (2)
ウェハ上に照射してアニールを行う前に電子ヒ−１１に
より該ウェハを予備加熱してなることを特徴とする４５
者体装置の製造方法。(1) In the manufacturing process of a semiconductor device, the wafer is preheated by electronic heat 11 before irradiating the wafer with electronic heat and annealing the wafer.
A method for manufacturing a human body device.
メ＝＝カスさせ、照射エネルギーを変化さ・Ｕてウェハ
の広い面積を加熱してなることを特徴とする特許請求の
範囲第１項記載の半導体装置の！ｌ１ＪＪ造方法。(2) The semiconductor according to claim 1, characterized in that, in the preheating, the focal point of the electronic heath is made to be diffusive, and the irradiation energy is changed to heat a wide area of the wafer. Of the device! l1JJ construction method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17124782A JPS5961137A (en) | 1982-09-30 | 1982-09-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17124782A JPS5961137A (en) | 1982-09-30 | 1982-09-30 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5961137A true JPS5961137A (en) | 1984-04-07 |
Family
ID=15919773
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17124782A Pending JPS5961137A (en) | 1982-09-30 | 1982-09-30 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5961137A (en) |
-
1982
- 1982-09-30 JP JP17124782A patent/JPS5961137A/en active Pending
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