JPS595635A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS595635A
JPS595635A JP11388882A JP11388882A JPS595635A JP S595635 A JPS595635 A JP S595635A JP 11388882 A JP11388882 A JP 11388882A JP 11388882 A JP11388882 A JP 11388882A JP S595635 A JPS595635 A JP S595635A
Authority
JP
Japan
Prior art keywords
glass
pellet
base
semiconductor device
glazed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11388882A
Other languages
Japanese (ja)
Inventor
Ichiro Anjo
安生　一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11388882A priority Critical patent/JPS595635A/en
Publication of JPS595635A publication Critical patent/JPS595635A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
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    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8389—Bonding techniques using an inorganic non metallic glass type adhesive, e.g. solder glass
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
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    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
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    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To prevent the generation of a pellet crack and the impossibility of wire bonding by forming structure in which a pellet is fixed under the state in which the quantity of glass corresponding to the central section of the back of the pellet is made more than that of glass corresponding to the peripheral section of said glass. CONSTITUTION:Glass is glazed only at the central section of a package base 10 in a trapezoid shape, and glass is not glazed around the central section. The semiconductor element pellet 11 is pushed on glass from the upper section of the base and glass is crushed and fixed during the time when glass 12 is under a melted state or while heating the base 10. Glass 12 is expanded to the peripheral section from the center of the back of the pellet with the push of the pellet, and fixation is completed under the state in which glass is in contact with the whole back and the state in which the quantity of glass in the central section is made more than that in the peripheral section.

Description

【発明の詳細な説明】 本発明はパッケージ内に搭載する半導体素子ペレットを
ガラス溶着してなる半導体装置およびその製造方法に関
するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device formed by glass-welding semiconductor element pellets mounted in a package, and a method for manufacturing the same.

半導体装置ｄのパッケージベースに半導体素子ベレット
を固着する場合、通常ではベース側に油層な形成した上
でＡｕ−８ｉ共晶によりベレ、ソトを固着することが行
なわれる。しかしながら、この方法では、近年のＡ　ｕ
材の価格の高騰に伴なって半導体装置の製造価格も著し
く上昇してしまう。このため、Ａｕ材を使用しない固着
構造が種々提案されており１例えばガラスを用いてペレ
ットな固着する構造が提案されている。第１図はこの種
の構造の一例であり、セラミック材からなるパッケージ
ベース１の中央四部に低融点ガラス２を付着（グレーズ
）シ、その上からペレット３を搭載することによりガラ
ス２によりペレット３をベース１に固着するものである
。この構造によれば、高価なＡｕ材を使用しないので半
導体装置を低価格に製造できるという利点を有する。When a semiconductor element pellet is fixed to the package base of the semiconductor device d, an oil layer is usually formed on the base side, and then the pellet and bottom are fixed with Au-8i eutectic. However, with this method, recent A u
As the price of materials increases, the manufacturing cost of semiconductor devices also increases significantly. For this reason, various fixing structures that do not use Au materials have been proposed. For example, a structure in which pellets are fixed using glass has been proposed. Figure 1 shows an example of this type of structure, in which a low melting point glass 2 is attached (glazed) to the four central parts of a package base 1 made of ceramic material, and pellets 3 are mounted on top of the glass. is fixed to the base 1. This structure has the advantage that the semiconductor device can be manufactured at low cost because expensive Au material is not used.

しかしながら、従来のこのペレット固着構造に際しては
、前述のようにベース１上にグレーズするガラス２はベ
ース中央凹部の略全面にわたうているため、ガラス２が
その周辺部で第２図に鎖線で示すような形状をとろうと
するように表面張力が働く、このため、ガラス２にテー
パ部が生じ易いものとなり、グレーズされたガラス２は
その表面の平坦度がでない。この結果、ペレット３なガ
ラス２上に押し付けてもペレットは第２図のようにその
周辺部においてのみガラス２に接触し、裏面中央部では
ガラスに接触しない状態で固着されてしまうつしたがっ
て、ペレットの固着強度が低いものになると共に、ワイ
ヤボンディングやその他の工程における微小な外力を受
けるだけでペレットクラックが生じたり、或いは周辺部
におけるガラスが同図のようにペレット３０表面に被さ
ってワイヤポンディ７グの障害になる等の種々の不具合
が生じている。However, in this conventional pellet fixing structure, since the glass 2 glazed on the base 1 covers almost the entire surface of the central recessed part of the base as described above, the glass 2 is glazed at the periphery as shown by the chain line in FIG. Surface tension acts to try to take the shape shown, so that the glass 2 tends to have a tapered portion, and the glazed glass 2 has an uneven surface. As a result, even if the pellet 3 is pressed onto the glass 2, the pellet contacts the glass 2 only at the periphery as shown in Figure 2, and the central part of the back side is stuck without contacting the glass. In addition, the adhesion strength of the pellet 30 becomes low, and pellet cracks occur even when subjected to a minute external force during wire bonding or other processes, or the glass in the periphery covers the surface of the pellet 30 as shown in the figure, causing the wire bonding 7g. Various problems have occurred, such as interference with the system.

したがって本発明の目的は、ペレットクラックやワイヤ
ポンディング不能が生じることがなく。Therefore, an object of the present invention is to prevent pellet cracking and wire pounding failure from occurring.

しかもペレット固着強度の高いペレット固着構造を備え
た半導体装置およびその製造方法を提供するととＫある
。Moreover, it is desired to provide a semiconductor device having a pellet fixing structure with high pellet fixing strength and a method for manufacturing the same.

このような目的を達成するために本発明は、ペレット裏
面の中央部に相対するガラスの量なその周辺部に相対す
るガラスの撒よりも多くした状態でペレットを固着した
構造とするものであり、また本発明方法はガラスのグレ
ーズに際してペレット周辺部よりもペレットの中央部の
ガラス量な多くするものであろう 以下１本発明を図示の実施例により説明する。In order to achieve such an object, the present invention has a structure in which the pellets are fixed in such a manner that the amount of glass facing the central part of the back side of the pellet is larger than the amount of glass facing the peripheral part. Furthermore, the method of the present invention will increase the amount of glass in the center of the pellet than in the periphery of the pellet when glazing the glass.The present invention will be explained below with reference to the illustrated embodiment.

第３図は本発明の半導体装置の一実施例な示しており１
図において１０はセラミック材からなるパッケージベー
ス、１１はこのパッケージベース１０の中央凹部に固着
した半導体素子ペレットである。この半導体素子ペレッ
ト１１は低融点ガラス１２にて前記パッケージベース１
０に固着しており、パッケージベース１０の周囲に設け
たリードフレーム１３にワイヤ１４を用いて電気的に接
続している。また、前記ペレット１１はベース１０の周
囲に封止ガラス１５にで＠Ｊ着したキャップＩ６にて封
止されている。FIG. 3 shows one embodiment of the semiconductor device of the present invention.
In the figure, reference numeral 10 indicates a package base made of a ceramic material, and reference numeral 11 indicates a semiconductor element pellet fixed in the central recess of the package base 10. This semiconductor element pellet 11 is attached to the package base 1 with a low melting point glass 12.
0, and is electrically connected to a lead frame 13 provided around the package base 10 using a wire 14. Further, the pellet 11 is sealed around the base 10 with a cap I6 attached to a sealing glass 15.

前記低融点ガラス１２は公知のガラス材にて構成してい
るが、前記ベース１０上に配設しているガラスの量はペ
レットの周辺部よりもその中央部においてその量が多く
なるように構成している。The low melting point glass 12 is made of a known glass material, and the amount of glass disposed on the base 10 is larger at the center of the pellet than at the periphery. are doing.

正確に言えばペレット１１とベース１００間に介在して
両者を固着させているガラスの厚さがペレット周辺のガ
ラスの厚さよりも大きくなるようにしている。そして、
ペレット１１はその裏面の全面においてガラス１２が溶
着した状態でベースに固着され、かつペレット１１０周
辺部においてはガラスはペレットの表面以上の高さには
ならないようになっている。To be precise, the thickness of the glass that is interposed between the pellet 11 and the base 100 and fixes them together is greater than the thickness of the glass around the pellet. and,
The pellet 11 is fixed to the base with the glass 12 welded to the entire back surface thereof, and the glass in the periphery of the pellet 110 is not higher than the surface of the pellet.

次に前述した半導体装置の製造方法、特に従来とは異な
るペレット固着方法を第４図により説明する。Next, a method for manufacturing the semiconductor device described above, particularly a pellet fixing method different from the conventional method, will be explained with reference to FIG.

先ず、同図（４）のようにベース１ｏの中央凹部上に低
融点ガラス１２をグレーズするが、この際ベース１０の
中央部のみに台状にガラスなグレーグし、その周辺部に
はガラスをグレーズしない。そして、同図ＣＢ）のよう
にガラス１２が溶融状態にある内に、或いはベース１０
を加熱しながらペレット１１をベース上方からガラス上
に押圧しガラスを押し潰して固着させるのである。なお
、前記ガラスグレーズの際には第５図のように、ペレ・
ソト１１の裏面中央に相対する位置のベース１０上に低
融点ガラス小片１２Ａを載置し、その後前図ＣＢ）のよ
うに加熱しながらペレット固着を行なうようにしてもよ
い。また、前記ペレット１１はその裏面にアルミニウム
のコーチ４フフ層を形成しておけばガラスとの濡れ性を
高めることができる。First, as shown in FIG. 4 (4), low melting point glass 12 is glazed on the central concave portion of the base 1o. At this time, a table-shaped glass glaze is applied only to the center of the base 10, and the glass is glazed around the periphery. No glaze. Then, as shown in FIG. CB), while the glass 12 is in a molten state, or the base 10 is
While heating the pellets 11 are pressed onto the glass from above the base to crush and fix the glass. In addition, when applying the glass glaze, as shown in Figure 5,
A small piece of low-melting glass 12A may be placed on the base 10 at a position opposite to the center of the back surface of the substrate 11, and then the pellets may be fixed while being heated as shown in the previous figure CB). Furthermore, if an aluminum coach 4 fu layer is formed on the back surface of the pellet 11, wettability with glass can be improved.

このようにしてペレット１１の固着を行なえば。If the pellets 11 are fixed in this way.

ガラス１２はペレットの押圧に伴なってペレット裏面中
央から周辺部に拡げられ、前述のようにペレットの裏面
全体にガラスが接触した状態でしかも周辺部よりも中央
部のガラス量が多い状態でペレットの固着を完成するこ
とができる。The glass 12 is spread from the center of the back surface of the pellet to the periphery as the pellet is pressed, and as described above, the glass 12 is in contact with the entire back surface of the pellet and the amount of glass in the center is larger than in the periphery. fixation can be completed.

したがって、以上述べた半導体装置、特にペレット固着
構造によれば、ペレット１１はその裏面全体がガラス１
２に接触してベース１０に固着されるので、固着強度に
高いものが得られると共にワイヤデフ１４フフ時等に外
力を受けても容易にはクラックが生じることはない。ま
た、ガラス量のコントロールを容易にして周辺部におけ
るガラスの量を少なくできるのでガラスがペレット表面
に被さることはなく、ワイヤポンディフグ等の障害にな
ることもないのである。この結果、大型ペレットにおい
ても良好な固着状態な得ることができ、大型ペレットの
パッケージに有効となる。Therefore, according to the semiconductor device described above, especially the pellet fixing structure, the entire back surface of the pellet 11 is covered with glass.
2 and is fixed to the base 10, high fixing strength can be obtained, and cracks will not easily occur even if external force is applied when the wire differential 14 is turned. Furthermore, since the amount of glass can be easily controlled and the amount of glass in the peripheral area can be reduced, the glass does not cover the pellet surface and does not become a problem for wire pond pufferfish or the like. As a result, a good adhering state can be obtained even for large pellets, which is effective for packaging large pellets.

ここで、ペレット周辺部におけるガラスの不足を未然に
防止するために、グレーズするガラスを第６図のように
２層構造にしてもよい。この構造はベース１０の中央凹
部の略全面に若干量のガラスをグレーズして第１層１２
Ｂを形成し、かつその上にペレットの中央に相対する位
置にのみ第２層１２Ｃを形成したものである。このよう
に構成すれば、ペレットの押圧固着時に第２層１２Ｃの
ガラスによるペレット中央部の固着と第１層１２Ｂのガ
ラスによるペレット周辺部の固着とを夫々確実に行なう
ことができ、前述した効果を更に高めなお、前記各実施
例はセラミック製のパンケージベースにペレットをガラ
ス固着しているが、ベースが他の材料の場合にも同様に
実施できることは言うまでもない。Here, in order to prevent a shortage of glass around the pellet, the glass to be glazed may have a two-layer structure as shown in FIG. 6. This structure is made by glazing a small amount of glass on almost the entire surface of the central concave portion of the base 10 to form the first layer 12.
A second layer 12C is formed thereon only at a position facing the center of the pellet. With this configuration, when pressing and fixing the pellet, the glass of the second layer 12C can reliably fix the central part of the pellet, and the glass of the first layer 12B can reliably fix the peripheral part of the pellet. Further, in each of the above embodiments, the pellets are fixed to a glass pancage base made of ceramic, but it goes without saying that the present invention can be implemented in the same manner when the base is made of other materials.

以上のように本発明の半導体装置はペレット表面の中央
部に相対するガラスの量を周辺部に相対するガラスの量
よりも多くした状態でペレットを固着しているので、ペ
レット裏面全体にガラスな接触させてペレットの固着強
度を高めると共にペレットクランクを生じ難クシ、かつ
ペレット表面へのガラスの付着を防止できる。As described above, in the semiconductor device of the present invention, the pellet is fixed with the amount of glass facing the central part of the pellet surface being larger than the amount of glass facing the peripheral part, so that the entire back surface of the pellet is covered with glass. By bringing the pellets into contact with each other, it is possible to increase the adhesion strength of the pellets, prevent pellet cranks from occurring, and prevent glass from adhering to the pellet surface.

また１本発明の製造方法によればガラスのグレーズ作業
を容易なものにすると共に簡単な工程作業で前述したｉ
好なペレット固着構造の半導体装置を得ることができる
という効果な奏する。In addition, according to the manufacturing method of the present invention, the glass glazing operation is facilitated, and the above-mentioned i.
This has the advantage that a semiconductor device with a favorable pellet fixation structure can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来構造の一部の断面図、 第２図はその一部の拡大図。 第３図は本発明の半導体装置の断面図。 第４図囚、の）は本発明方法の工程を示す断面図、第５
図は他の方法を説明するための断面図。 第６図は更に他の実施例方法を示す断面図である。 １０・・・パッケージベース、１１・・・ペレット、１
２．１２Ａ・・・ガラス、１２Ｂ・・・第１層、１２Ｃ
・・・第２層、１３・・・リードフレーム、１４・・・
ワイヤ。 １６・・・キャップ。 第　　１　　図 ど 第　　２　図 第　　３　　図Figure 1 is a cross-sectional view of a part of the conventional structure, and Figure 2 is an enlarged view of that part. FIG. 3 is a sectional view of the semiconductor device of the present invention. Figure 4 (a) is a sectional view showing the steps of the method of the present invention;
The figure is a sectional view for explaining another method. FIG. 6 is a sectional view showing still another embodiment method. 10...Package base, 11...Pellet, 1
2.12A...Glass, 12B...First layer, 12C
...Second layer, 13...Lead frame, 14...
wire. 16... Cap. Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】 １、　パッケージベースに低融点ガラスを用いて半導体
素子ベレットを固着してなる半導体装置において、前記
ガラスはペレット裏面の中央部に相対するガラスの量を
ペレット周辺部に相対するガラスの量よりも多くしたこ
とを特徴とする半導体装置。 ２、パッケージベース上に低融点ガラスをグレーズし、
このガラスの上に中導体素子ペレットを搭載してペレッ
トをガラスにて固着するようにした半導体装置の製造方
法において、前記ガラスはペレット周辺部に対してペレ
ット中央部に多量のガラスをグレーズすることを特徴と
する半導体装置の製造方法。 ３、ガラスなペレット中央部に相対する位置にのみグレ
ーズしてなる特許請求の範囲第２項記載の半導体装置の
製造方法。[Claims] 1. In a semiconductor device in which a semiconductor element pellet is fixed to a package base using low-melting glass, the amount of the glass is such that the amount of the glass is opposite to the center part of the back surface of the pellet and is opposite to the peripheral part of the pellet. A semiconductor device characterized in that the amount of glass is greater than that of glass. 2. Glaze low melting point glass on the package base,
In a method for manufacturing a semiconductor device in which a medium conductor element pellet is mounted on the glass and the pellet is fixed with glass, the glass is glazed with a larger amount of glass in the center of the pellet than in the periphery of the pellet. A method for manufacturing a semiconductor device, characterized by: 3. A method for manufacturing a semiconductor device according to claim 2, wherein the glass pellet is glazed only at a position opposite to the central portion thereof.
JP11388882A 1982-07-02 1982-07-02 Semiconductor device and manufacture thereof Pending JPS595635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11388882A JPS595635A (en) 1982-07-02 1982-07-02 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11388882A JPS595635A (en) 1982-07-02 1982-07-02 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS595635A true JPS595635A (en) 1984-01-12

Family

ID=14623639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11388882A Pending JPS595635A (en) 1982-07-02 1982-07-02 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS595635A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63147333A (en) * 1986-12-11 1988-06-20 Nec Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63147333A (en) * 1986-12-11 1988-06-20 Nec Corp Manufacture of semiconductor device

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