JPS5946439B2 - Manufacturing method of multilayer ceramic circuit board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a multilayer ceramic circuit board, and more particularly to a method for manufacturing a multilayer ceramic circuit board on which a fine circuit pattern is formed with high density.

Conventionally, wiring has been printed on the surface of a sintered ceramic plate by a screen printing method to form, for example, a component of a hybrid assembly or an integrated circuit.

Punii: 1■■÷2■■■ 〒＝【゛The board has been developed.

For such multilayer ceramic circuit boards, it is required to reliably form holes (hereinafter referred to as via holes) that provide conduction between each wiring layer, and to miniaturize and increase the density of via hole wiring patterns. .

However, with the conventional printed wiring method, it is difficult to form a fine pattern with a wiring width and via hole diameter of 100 Pm or less. As a solution to these problems, a method has been proposed in which a circuit pattern is formed using photolithography.

For example, in Japanese Patent Publication No. 51-20699, a circuit pattern is formed on the surface of a ceramic substrate, a photoresist layer having a via hole pattern is then formed, and the via hole portion is made of gold (Au) by electroplating or the like. After the photoresist layer is removed, an insulating paste of glass, glass ceramic, etc. is applied using a doctor blade or spraying method, and the process of firing is repeated to form a multilayer ceramic substrate. A manufacturing method has been proposed.

According to this method, polishing must be performed to remove the insulator on the conductive stud and flatten the surface of the insulating layer. However, it is extremely difficult to control the thickness of the insulating layer of a large ceramic substrate to be uniform by polishing, and the polishing process requires a lot of time. The present invention aims to provide a simple manufacturing method for high-density multilayer ceramic circuit boards having fine via holes and circuit patterns.A first conductive layer is formed by applying a conductive paste to the entire surface of a sintered ceramic substrate and firing it. a step of forming a circuit pattern on the first conductor layer; a step of forming a stud made of photoresist in a via hole forming portion on the circuit pattern; A step of applying and baking an insulating paste on the entire surface of the substrate to form an insulating layer and a via hole, and applying and baking a conductive paste on the surface of the insulating layer and the via hole, and simultaneously forming a second conductor layer and forming a first conductor layer. The method is characterized in that it includes a step of forming a via hole conductor portion that provides electrical continuity between the layer and the second conductor layer.

Next, the present invention will be explained in detail based on examples.

Step 1 Sintered ceramic substrate 1 (hereinafter referred to as base substrate).

) A first conductor layer 2 is formed on the ceramic substrate by applying a conductor paste to the entire surface by screen printing and firing. (Reference to Figure 1) Various ceramic substrates such as aluminum, mullite, forstellite, stearite, etc. can be used as the base substrate. In this example, a mullite board with a thickness of 0.6 m1 was used.Various metals can be used as the conductive metal paste, but when the wiring width of the circuit pattern is narrow, It is preferable to use a metal such as gold or copper having low electrical resistance.The conductor layer was baked at 900° C. for 10 minutes to form a conductor layer with a thickness of 15 μm.Step 2 Photoresist 3 was applied to the conductor layer, developed, and exposed. death,
A circuit pattern is formed using photolithography using the photoresist 3 as an etching mask.

The wiring width of the circuit pattern and the interval between wirings are 50 μm,
The diameter of the via hole is 75 μmφ. (See Figure 2) Step 3 After removing the photoresist 3, apply photoresist again to a thickness of about 40 μm, expose and develop so that the photoresist remains in the via hole forming area, and then apply photoresist to the via hole forming area. A stud 4 made of photoresist is formed.

(See FIG. 3) The diameter of the stud in the via hole forming portion is 75 μmφ. Step 4: On the surface of the base substrate 1 on which the photoresist studs 4 are formed, an insulating paste 5 is applied by screen printing or a doctor blade method to a thickness of 10 μm thicker than the thickness of the photoresist studs.

(See FIG. 4) The insulating paste 5 is desirably a material that can be fired within a temperature range in which the conductive metal such as gold or copper can be used as a conductor, and has a low dielectric constant and high thermal conductivity.

In this example, a boron silicate-alumina glass/ceramic paste was used.

Step 5 Next, after baking the insulating paste layer 5 at 900° C. for 10 minutes, the surface of the insulating layer 6 is etched with a hydrofluoric acid etching solution to form a hole that will become a via hole.

By the firing at 900° C., the stud 4 made of the photoresist is evaporated and decomposed to form a cavity.

Therefore, the insulator on the stud of the insulating layer coated and fired to a thickness greater than the height of the stud during the etching process is easily dissolved and removed, and the hole 7 serving as the via hole is secured. (
(See FIG. 5) Note that it is also possible to remove the insulating layer on the stud by polishing and form a via hole.

In this case, the insulating layer on the stud sinks into the cavity formed during firing, easily forming a hole that becomes a via hole. Step 6 After removing abrasive grains and the like present in the via holes 7 by ultrasonic cleaning, gold paste is coated on the entire surface of the insulating layer 6 by screen printing and fired.

In this way, the via hole is filled with a conductor and at the same time the second conductor layer 8 is formed.

(See FIG. 6) The above steps 2 to 6 are repeated to form a multilayer high-density circuit pattern.

According to the present invention, the wiring width and via hole diameter are 50 μm.
It is possible to easily and reliably form a conductor circuit pattern as fine as 100 m in diameter, and the process can be shortened because the conductor in the via hole portion and the next conductor layer can be formed at the same time.

That is, a highly reliable multilayer ceramic circuit board having a high-density circuit pattern without conduction through via holes, disconnection of wiring, short circuits, etc. can be manufactured by a simple process.

[Brief explanation of the drawing]

1 to 6 show partial process diagrams according to the present invention. DESCRIPTION OF SYMBOLS 1...Base substrate, 2...First conductor layer, 3...Photoresist, 4...Stud, 5...Insulation Paste, 6...
Insulating layer, 7... Via hole, 8...
-Second conductor layer.

Claims (1)

[Claims] 1 A step of applying a conductive paste to the entire surface of the sintered ceramic substrate and firing it to form a first conductor layer, a step of forming a circuit pattern on the first conductor layer, and a step of forming a via hole forming part on the circuit pattern. a step of forming a stud made of photoresist; a step of applying and baking an insulating paste on the entire surface of the ceramic substrate provided with the stud made of photoresist to form an insulating layer and a via hole;
and a step of applying a conductive paste to the surface of the insulating layer and the via hole portion and baking it to form a via hole conductor portion that connects the first conductor layer and the second conductor layer at the same time as the second conductor layer. A method of manufacturing a multilayer ceramic circuit board characterized by: