JPS5944051U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5944051U
JPS5944051U JP14018982U JP14018982U JPS5944051U JP S5944051 U JPS5944051 U JP S5944051U JP 14018982 U JP14018982 U JP 14018982U JP 14018982 U JP14018982 U JP 14018982U JP S5944051 U JPS5944051 U JP S5944051U
Authority
JP
Japan
Prior art keywords
holder
laminate
semiconductor equipment
wiring board
attached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14018982U
Other languages
Japanese (ja)
Inventor
菊地 秀寿
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP14018982U priority Critical patent/JPS5944051U/en
Publication of JPS5944051U publication Critical patent/JPS5944051U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図及び第3図はそれぞれ従来の半導体装置
の側面図、正面図及び分解斜視図、第4図、第5図及び
第6図は本考案による半導体装置の一実施例の側面図、
正面図及び分解斜視図である。 1は半導体素子、1aはそのピン、2は放熱器、3は配
線基板、4はホルダ、4bはホルダ4の突起、6はねじ
である。 第3図 第6図
1, 2, and 3 are a side view, a front view, and an exploded perspective view of a conventional semiconductor device, respectively, and FIGS. 4, 5, and 6 are an embodiment of a semiconductor device according to the present invention. Side view,
They are a front view and an exploded perspective view. 1 is a semiconductor element, 1a is a pin thereof, 2 is a heat sink, 3 is a wiring board, 4 is a holder, 4b is a protrusion of the holder 4, and 6 is a screw. Figure 3 Figure 6

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子及び放熱器から成る積層体と、該積層体が取
り付けられたホルダと、該ホルダに設けられた半田付は
可能な突起と、配線基板とを有し、上記積層体の取り付
けられた上記ホルダの上記突起及び上記半導体素子のピ
ンが上記配線基板の透孔を通じてその上の導電層に半田
付けされて成る半導体装置。
A laminate including a semiconductor element and a heat sink, a holder to which the laminate is attached, a solderable protrusion provided on the holder, and a wiring board, the holder to which the laminate is attached. A semiconductor device, wherein the protrusion of the holder and the pin of the semiconductor element are soldered to a conductive layer thereon through a through hole of the wiring board.
JP14018982U 1982-09-16 1982-09-16 semiconductor equipment Pending JPS5944051U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14018982U JPS5944051U (en) 1982-09-16 1982-09-16 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14018982U JPS5944051U (en) 1982-09-16 1982-09-16 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS5944051U true JPS5944051U (en) 1984-03-23

Family

ID=30313966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14018982U Pending JPS5944051U (en) 1982-09-16 1982-09-16 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5944051U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009218531A (en) * 2008-03-13 2009-09-24 Panasonic Corp Inductor and method of manufacturing the same, and circuit module using inductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009218531A (en) * 2008-03-13 2009-09-24 Panasonic Corp Inductor and method of manufacturing the same, and circuit module using inductor

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