JPS5943753Y2 - Electronic circuit board structure - Google Patents
Electronic circuit board structureInfo
- Publication number
- JPS5943753Y2 JPS5943753Y2 JP1979048352U JP4835279U JPS5943753Y2 JP S5943753 Y2 JPS5943753 Y2 JP S5943753Y2 JP 1979048352 U JP1979048352 U JP 1979048352U JP 4835279 U JP4835279 U JP 4835279U JP S5943753 Y2 JPS5943753 Y2 JP S5943753Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- solder
- electronic circuit
- outer periphery
- board structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
【考案の詳細な説明】
本考案は、パターン電極形状に関するもので、特にハン
ダバンプ或は、ハンダボールでＩＣチップと基板が固着
されるものに適用される。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a patterned electrode shape, and is particularly applicable to an IC chip and a substrate fixed to each other with solder bumps or solder balls.
ハンダバンプ或はハンダボールを用いた回路実装は、実
装面積が小さく出来、従って小型時計用回路に有効な実
装法として用いられる。Circuit mounting using solder bumps or solder balls can reduce the mounting area, and therefore is used as an effective mounting method for small watch circuits.
その代表的な例を第１図に示す。A typical example is shown in FIG.
１はＩＣチップで、・・ンダパンプ４ａ＝４ｂなどで回
路基板２上のパターン電極３ａ−３ｂなどに固着されて
いる。Reference numeral 1 denotes an IC chip, which is fixed to pattern electrodes 3a-3b on the circuit board 2 by means of bumps 4a and 4b.
第１図ツバターン電極形状を第２図に示す。Figure 1 shows the shape of the tube-turn electrode in Figure 2.
ＩＣと結合する前記パターン電極は３ａおよび３ｂに示
す様にＩＣＩのハンダパン７”４ａ＊４ｂと結合するボ
ンディング部３ａｌ、３ｂｌとそれに連なる引出し線部
３ａｍ＊ ３ｂｍとリード部３ａｍｅ３ｂｍとから或っ
ている。As shown in 3a and 3b, the pattern electrodes that are coupled to the IC are comprised of bonding parts 3al and 3bl that are coupled to the solder pans 7''4a*4b of the ICI, lead-out line parts 3am*3bm and lead parts 3ame3bm that are connected thereto. .
ＩＣチップ１は解り易くする為に損保線で示した図に於
て、ハンダは溶融する際、図の斜線で示した様にボンデ
ィング部３ ａ ｌ・３ｂｔからＩＣ１の外周に向かっ
ている引出し線部３ａｍ＊ ３ｂｍに、わずかに流出し
て濡れるので、ハンダが溶融して正常にボンディングが
なされたかどうかは、ボンディング作業後に外部からＩ
ＣＩの外形周辺を目視して、引出し線部３ａｍｓ ３ｂ
ｍの７・ンダの濡れの有無を確認すれば良く、容易に検
査が出来る。In the figure, the IC chip 1 is shown with non-life insurance lines for ease of understanding, and when the solder melts, the lead lines run from the bonding parts 3a, 3bt to the outer periphery of the IC1, as shown by diagonal lines in the figure. A small amount of solder leaks into parts 3am*3bm and gets wet, so you can check whether the solder has melted and the bonding has been performed normally by checking the external I/O after the bonding process.
Visually check the outer shape of the CI and draw the lead line 3ams 3b.
The inspection can be easily performed by simply checking whether there is any wetness in the 7/m.
しかし乍も図に示した３ｃ ＝ ３（１のパター／電極
では、その引出し線部３ｃｍ５３ａｍがＩＣ１の内部に
在って外周に同いていないので、そのハンダの濡れの有
無はＩＣ１の外周では確認出来ない。However, in the pattern/electrode of 3c = 3 (1) shown in the figure, the lead wire part 3cm53am is inside IC1 and is not flush with the outer periphery, so the presence or absence of wetting of the solder cannot be confirmed on the outer periphery of IC1. Can not.
従ってボンディングが確実になされたかどうかを確認す
る時、ＩＣ１の側聞からいちいちのぞき込まねはならず
、従って全バンプのボンティングの確認はＩＣＩの４方
向から観察する必要があり、検査がし難く時間がかかる
欠点があった。Therefore, when checking whether the bonding has been done properly, it is not necessary to look into the sides of IC1. Therefore, to check the bonding of all bumps, it is necessary to observe from all four directions of the ICI, which makes inspection difficult. The drawback was that it was time consuming.
本考案は、上記欠点の改良に関するものである。The present invention is directed to improving the above-mentioned drawbacks.
本考案の実施例を第３図に基づき説明する。An embodiment of the present invention will be explained based on FIG.
６ｏ。６ｄが本考案のパターン電極で、ＩＣチップ１の
外周に向けて、突出形状部６ｃｐｓ ６ａｐを有するの
が特徴である。6o. Reference numeral 6d designates the pattern electrode of the present invention, which is characterized by having protruding portions 6cps 6ap toward the outer periphery of the IC chip 1.
′ａｐ−ｙ電極６Ｃ・６ｄに於て、・・ンタ゛（ま溶融
する際、その引出し線部６ｃｍ５６ｄｍｌＣ加えて突出
形状部６ｃｐ＝ ６ｄｐにも流出して濡れる。When the ap-y electrodes 6C and 6d are melted, it flows out and wets the lead wire portions 6cm and 56dmlC as well as the protruding portions 6cp=6dp.
従ってボンディングの可否は、ボンディング作業後に外
部からＩＣ１の外形周辺にある突出形状部６ｃ、。Therefore, whether bonding is possible or not depends on the protruding portion 6c around the outer shape of the IC 1 from the outside after the bonding operation.
６ｄｐとその他のパターン電極の引出し線部のノツダの
濡れを目視で確認すれば良く、検査が簡単で容易である
。It is sufficient to visually check the wetness of the notches of the lead line portions of the 6dp and other pattern electrodes, and the inspection is simple and easy.
上記のごとく本考案によれば、パターン形状の簡単な変
更のみで、全てのハンダバンプの濡れ具合は、正内から
の目視によって瞬時に出来るのでＩＣ実装の検査を容易
にすることが可能となり、電子回路の信頼性を向上させ
る効果がある。As described above, according to the present invention, by simply changing the pattern shape, the wetness of all solder bumps can be checked instantly by visual inspection from the inside, making it possible to easily inspect IC mounting. This has the effect of improving circuit reliability.
第１図は、従来のハンダバンプを用いた回路実装を示す
断面図、第２図は、第１図の回路基板のパターン電極を
示す平面図、第３図は本考案の、パターン電極を示す平
面図。
１・・・・・・ＩＣチップ、２・・・・・・回路基板、
４ａ。
４ｂ・・・・・・ハンダバンプ、３ａ−３ｂ−６゜、６
ｄ・・・・・・パターン電極、６ｃｐ＝ ６ｄｐ”・・
・・・突出形状部。FIG. 1 is a cross-sectional view showing conventional circuit mounting using solder bumps, FIG. 2 is a plan view showing pattern electrodes of the circuit board shown in FIG. 1, and FIG. 3 is a plan view showing pattern electrodes of the present invention. figure. 1...IC chip, 2...circuit board,
4a. 4b...Solder bump, 3a-3b-6°, 6
d...Pattern electrode, 6cp=6dp"...
...Protruding shaped part.
Claims (1)
ハンダによりフェースダウンボンデングする電子回路に
於いて、ボンディング部より導出される引出し線部がＩ
Ｃの外周に直接向いていないパターン電極配設げ、該パ
ターン電極はハンダの濡れを観察するための、突出形状
部を、ＩＣの外周方向に向けて形成したことを特徴とす
る電子回路の基板構造。IC chips are placed on patterned electrodes formed on the circuit board.
In electronic circuits that are face-down bonded with solder, the lead wire portion led out from the bonding portion is
A substrate for an electronic circuit, characterized in that a patterned electrode is disposed not directly facing the outer periphery of the IC, and the patterned electrode has a protruding portion facing toward the outer periphery of the IC for observing solder wetting. structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1979048352U JPS5943753Y2 (en) | 1979-04-13 | 1979-04-13 | Electronic circuit board structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1979048352U JPS5943753Y2 (en) | 1979-04-13 | 1979-04-13 | Electronic circuit board structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55149976U JPS55149976U (en) | 1980-10-29 |
| JPS5943753Y2 true JPS5943753Y2 (en) | 1984-12-26 |
Family
ID=28931909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1979048352U Expired JPS5943753Y2 (en) | 1979-04-13 | 1979-04-13 | Electronic circuit board structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5943753Y2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5633165Y2 (en) * | 1973-02-27 | 1981-08-06 |
-
1979
- 1979-04-13 JP JP1979048352U patent/JPS5943753Y2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55149976U (en) | 1980-10-29 |
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