JPH0936275A - Manufacture of surface mount semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a TAB-BGA using a single- layer TAB tape which can easily cope with the increase of pins without increasing the number of processes and can reduce the manufacturing cost of the TAB-BGA. SOLUTION: A surface mount semiconductor device manufacturing method is composed, for example, of a process for simultaneously forming both device holes 13 and pad holes 17 by punching a base film 14 upon receiving the film 14, a process for forming a wiring pattern 16 on the upper surface of the film 14, a process for connecting one end of the pattern 16 to each electrode pad of a semiconductor chip 11, and a process for connecting the other end of the pattern 16 to each solder ball 18 fitted to the lower surface of the film 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a surface mount type semiconductor device mounted on a substrate by solder balls arranged in a grid on one surface of a package, and more particularly to TAB (Tape Automated Bonding). It is used for manufacturing a tape-connected BGA (Ball Grid Array).

[0002]

2. Description of the Related Art Conventionally, for example, a QFP (Quad Flat Package) is most popular as a flat type package. This QFP has a lead-to-lead pitch of 0.3 mm due to difficulty in forming fine-pitch leads.
The number of leads is said to be around 300.

Further, there is a TCP (Tape Carrier Package) using a TAB tape capable of forming leads at a fine pitch instead of the lead frame. This TCP
Is difficult to batch reflow with other parts, so we cannot expect a large expansion of the market.

Then, BGA appeared. BG
A is a structure in which solder balls are arranged in a grid on the back surface of the package, and a multi-pin package up to about 600 can be realized.

In many BGAs, a chip was initially mounted on a printed board, wire-bonded, and then molded. In addition, recently, in order to cope with the increase in the number of pins, a TAB-BGA using a TAB tape is used.
Has also been developed.

As described above, the mold type BGA (so-called P-BGA) is still a mainstream corner even now. However, the number of pins is 100 to 20 at most.
It has about 0 pins. This is because wire bonding is used to connect the chips, and there is a problem that the number of pins such as 300 to 600 pins cannot be accommodated due to the limitation of the bonding technique.

On the other hand, in the case of the TAB or flip chip technology, it is possible to sufficiently cope with the increase in the number of pins. FIG.
TAB-BGA using a double-layer TAB tape
FIG.

This TAB-BGA is a semiconductor chip 10
One end of the wiring pattern 103 on the TAB tape 102 is connected to the first electrode pad, and the other end is provided with a through hole 105 on the back surface side of the base film (polyimide (PI)) 104.
Have been pulled through. Then, the wiring pattern 103 and the solder ball 10
6 and 6 are individually connected.

The connecting surface between the electrode pad of the semiconductor chip 101 and the wiring pattern 103 has a potting resin 10.
7, and a stiffener 108 for reinforcement is adhered to the surface side of the TAB tape 102.

According to such a configuration, the wiring pattern 1
By adopting a fine pitch of 03, it is possible to sufficiently cope with a large number of pins such as 300 to 600 pins. However,
In the case of this TAB-BGA, the wiring pattern 103 on the surface of the base film 104 in the TAB tape 102.
And the solder ball 106 of the electrode portion on the back surface are connected by through hole plating. That is, in the BGA using the two-layer type TAB tape 102, the steps in the manufacturing process of the TAB tape 102 are remarkably complicated, resulting in a very high cost.

As a means for solving such a problem,
TAB-BGA using single-layer TAB tape
Has been proposed. FIG. 5 shows a schematic structure of a TAB-BGA using a single-layer TAB tape.

This TAB-BGA is a semiconductor chip 20.
One electrode pad is connected to one end of the wiring pattern 203 on the TAB tape 202, and the other end is connected to the base film 204.
On the back surface side, the solder balls 206 are individually connected.

The connecting surface between the electrode pad of the semiconductor chip 201 and the wiring pattern 203 has a potting resin 20.
7, and a stiffener 208 for reinforcement is adhered to the surface side of the TAB tape 202.

According to this structure, 300 to 600
It is possible to sufficiently cope with a large number of pins such as pins, and further, the cost can be reduced by using the inexpensive single-layer TAB tape 202.

However, in the case of this TAB-BGA, since the wiring pattern 203 on the TAB tape 202 is on one surface (back surface side) of the base film 204, in order to protect the wiring pattern 203 when mounting the ball,
Application or printing of the solder resist 209 is indispensable.

FIG. 6 shows the T in the TAB-BGA.
3 shows an example of a wiring pattern 203 on the AB tape 202. As shown in this figure, the solder resist 209 surely covers the wiring pattern 203, and
The ball pad 210 to which the solder ball 206 is connected must not be touched. In the figure, a region where the resist 209 is provided is indicated by a broken line 211.
Indicated by

Considering the printing accuracy of the solder resist 209, for example, the pitch of the ball pads 210 is 1.27 mm, the diameter of the pads 210 is 0.7 mm, and the five wiring patterns 203 are passed between the pads 210. In doing so, the accuracy is ± 60 μm.

This is not impossible by the current resist printing technique, but it requires an expensive process technique, which makes it expensive, and the original purpose of low cost cannot be achieved.

Even if such a high-level process technology is used, it is impossible to pass five or more wiring patterns 203 between the pads 210, and therefore, there is a limit to fine pitch and a large number of pins. There is.

[0020]

As described above, in the prior art, even if a single-layer TAB tape, which is cheaper than a double-layer TAB tape, is used, it is necessary to form a resist with high accuracy. It has been difficult to realize a multi-pin BGA at low cost.

Therefore, the present invention provides a method of manufacturing a surface mount type semiconductor device, which can easily cope with the increase in the number of pins without increasing the number of steps and can further reduce the cost. Is intended.

[0022]

To achieve the above object, according to the present invention, there is provided a method of manufacturing a surface mount type semiconductor device mounted on a substrate by solder balls arranged on one surface of a package. A step of punching out an insulating material coated with an adhesive on one surface to form an opening for mounting a semiconductor element, and at the same time forming a through hole at a mounting position of the solder ball; A step of pasting a metal foil on a material, a step of etching the metal foil to form a wiring pattern in which one end extends into the opening and the other end corresponds to the through hole,
A step of connecting one end of the wiring pattern extending into the opening to the electrode of the semiconductor element, attaching the solder ball to the other surface of the insulating material, and connecting the solder ball and the other end of the wiring pattern. And connecting through the through hole.

According to the present invention, a pad hole is formed at the solder ball mounting position at the same time as the formation of the device hole provided at the semiconductor chip mounting position of the base film by the above-mentioned means, and the pad hole is formed through this pad hole. The wiring pattern provided on one surface of the base film is electrically connected to the solder ball provided on the other surface. Therefore, conventional TAB
In the tape manufacturing process, only the pad holes are formed at the same time as the device hole forming step, and the tape hole can be easily realized without adding a special step. Moreover, the wiring pattern is provided on one surface of the base film and the solder balls are provided on the other surface. Therefore, it is not always necessary to protect the wiring pattern with the solder resist when mounting the solder balls.

[0024]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a schematic configuration of a TAB-BGA (BGA adopting a TAB tape connection method) using a single-layer TAB tape according to an embodiment of the present invention.

That is, the semiconductor chip (semiconductor element) 1
1 is a device hole (opening) of the TAB tape 12
It is mounted on the 3. The TAB tape 12 is a base film (insulating material) 14 made of polyimide (PI) or the like.
And a wiring pattern 16 formed by adhering a copper foil with an adhesive 15 on one surface thereof, for example, the upper surface.

The base film 14 is provided with the device holes 13 corresponding to the mounting positions of the semiconductor chips 11 and pad holes (through holes) 17 corresponding to the solder ball mounting positions. ing.

One end of the wiring pattern 16 extends into the device hole 13 and is connected to each electrode pad of the semiconductor chip 11. Wiring pattern 1
The other end of 6 is provided so as to close the pad hole 17, and is individually connected to the solder balls 18 attached to various surfaces of the base film 14, for example, the lower surface.

The connection surface between the electrode pad and the wiring pattern 16 on the semiconductor chip 11 is sealed with potting resin 19. Furthermore, TAB tape 1
A stiffener (reinforcing plate) 20 is adhered to the wiring pattern 16 on the surface of No. 2 by an adhesive layer 21.

According to the TAB-BGA having such a structure, since the wiring pattern 16 is located on the upper surface of the base film 14, it is not necessary to protect the wiring pattern 16 with the solder resist when mounting the solder balls 18. As a result, since there is no restriction for forming the solder resist, it is possible to achieve fineness at a low cost and to the limit of the TAB etching technique.

The stiffener 20 has a thickness of about 10 to 20 μm with respect to the wiring pattern 16.
1 are provided very close to each other. For this reason,
By connecting the stiffener 20 to GND, improvement in electrical characteristics can be expected.

In FIG. 1, for the sake of convenience, when the solder balls 18 are attached, the amount of solder that is melted from the solder balls 18 and melts into the pad holes 17 is larger than the size of the solder balls 18. ing. However, in reality, the amount of solder that melts into the pad hole 17, that is, the amount of solder required for connection is not so large,
The solder ball 18 can maintain its ball shape sufficiently.

FIG. 2 is an enlarged view showing the mounting positions of the solder balls 18 in the above-mentioned TAB-BGA. For example, when the diameter of the solder ball 18 is 700 μm, the thickness of the base film 14 and the adhesive 15 which are generally used is about 100 μm at most, and therefore the diameter of the pad hole 17 is set to about 500 μm. Before, the spherical surface of the solder ball 18 can be brought into contact with the wiring pattern 16 in advance. Therefore, if the solder ball 18 is melted in this state, the solder ball 18 can be reliably connected to the wiring pattern 16 while maintaining the ball shape without significantly impairing the amount of solder.

Next, a method of manufacturing a TAB-BGA using the above-mentioned single-layer TAB tape will be described. FIG. 3 schematically shows a manufacturing process of TAB-BGA. Here, it is roughly divided into a TAB tape manufacturing process and a BGA assembly process.

In the TAB tape manufacturing process, first,
Base film 14 to which adhesive 15 is applied in advance
Then, the device hole 13 and the pad hole 17 are simultaneously formed by punching (FIG. 11B).

Next, a copper foil 16 'is attached to the base film 14 via the adhesive 15 (FIG. 7C), and the wiring pattern 16 is formed by patterning it by etching. Figure (d)).

Then, a plating process is applied to at least a connection portion of the wiring pattern 16 with at least another component (for example, the semiconductor chip 11) to manufacture the above-mentioned single-layer TAB tape 12 (see FIG. )).

Thereafter, in the BGA assembly process, the semiconductor chip 11 is made to correspond to the device hole 13 of the TAB tape 12, and each electrode pad thereof is connected to one end of the wiring pattern 16 (FIG. 6 (f)). ).

The semiconductor chip 1 including the connecting portion
The upper surface of No. 1 is sealed with potting resin 19 ((g) in the same figure). Further, the stiffener 20 is adhered onto the wiring pattern 16 on the surface of the TAB tape 12 via the adhesive layer 21 ((h) in the figure).

Further, solder balls 18 are arranged on the pad holes 17 formed in the base film 14 of the TAB tape 12, and are heated and melted by a reflow process to pad the solder balls 18 and the wiring pattern 16 to each other. They are individually connected through the holes 17 ((i) in the figure).

After that, through the steps of testing, marking, packing, etc., the TA shown in FIG.
B-BGA is completed. According to such a method, in the process of forming the device hole 13, the pad hole 1
Since the formation of 7 is performed at the same time, it can be easily realized without adding a special step. Moreover, the process can be significantly simplified as compared with the case of forming by etching.

As described above, at the same time as the formation of the device hole provided at the mounting position of the semiconductor chip on the base film, the pad hole is formed at the mounting position of the solder ball, and the base film is formed through the pad hole. The wiring pattern provided on one surface and the solder balls provided on the other surface are electrically connected.

Therefore, in the conventional TAB tape manufacturing process, only the pad holes are formed at the same time as the device hole forming steps, and the steps can be easily realized without adding any special steps. It is possible.

Moreover, the wiring pattern is provided on the upper surface of the base film and the solder balls are provided on the lower surface of the single-layer TAB tape. Therefore, it is not always necessary to protect the wiring pattern with the solder resist when mounting the solder balls.

As a result, it is possible to use an inexpensive single-layer TAB tape, and since there is no restriction for forming the solder resist, the TAB tape can be manufactured at a lower cost.
It is possible to achieve fineness up to the limit of the etching technology of.

Since the stiffener is provided very close to the wiring pattern, it is
By connecting to ND, improvement in electrical characteristics can be expected. Of course, various modifications can be made without departing from the scope of the present invention.

[0046]

As described above in detail, according to the present invention, it is possible to easily cope with the increase in the number of pins without increasing the number of steps, and to reduce the cost. Provided is a method of manufacturing a semiconductor device.

[Brief description of drawings]

FIG. 1 is a sectional view showing a schematic configuration of a BGA (TAB-BGA) adopting a TAB tape connection system according to an embodiment of the present invention.

FIG. 2 is also an enlarged view showing the configuration of the main part of the TAB-BGA.

FIG. 3 is also a schematic cross-sectional view shown for explaining the manufacturing process of the TAB-BGA.

FIG. 4 is shown to explain the prior art and its problems;
The schematic block diagram of TAB-BGA using a two-layer type TAB tape.

FIG. 5 is a schematic configuration diagram of a TAB-BGA using a single-layer TAB tape.

FIG. 6 is an enlarged view of a main part showing an example of forming a solder resist region on a single-layer TAB tape.

[Explanation of symbols]

11 ... Semiconductor chip (semiconductor element), 12 ... TAB tape, 13 ... Device hole (opening), 14 ... Base film (insulating material), 15 ... Adhesive agent, 16 ... Wiring pattern, 17 ... Pad hole (through hole) , 18 ... Solder balls, 19 ... Potting resin, 20 ... Stiffener (reinforcing plate), 21 ... Adhesive layer.

Claims (4)

[Claims] 1. A method of manufacturing a surface mount semiconductor device mounted on a substrate by a solder ball arranged on one surface of a package, wherein an insulating material coated with an adhesive is punched out on one surface to mount a semiconductor element. Forming an opening for forming a through hole at the mounting position of the solder ball, attaching a metal foil on the insulating material with the adhesive, etching the metal foil, and Extending into the opening, the other end forming a wiring pattern corresponding to the through-hole, and a step of connecting one end of the wiring pattern extending into the opening to the electrode of the semiconductor element, Attaching the solder ball to the other surface of the insulating material, and connecting the solder ball and the other end of the wiring pattern through the through hole. Method of manufacturing a surface mounting semiconductor device that. 2. The method of manufacturing a surface mount semiconductor device according to claim 1, wherein a TAB tape is formed by the insulating material and the wiring pattern. 3. The method of manufacturing a surface mount semiconductor device according to claim 1, further comprising a step of adhering a reinforcing plate on the wiring pattern of the insulating material. 4. The method for manufacturing a surface mount semiconductor device according to claim 3, wherein the reinforcing plate is connected to GND.