JPS5942037U - Face down bonding equipment - Google Patents

Face down bonding equipment

Info

Publication number
JPS5942037U
JPS5942037U JP13783882U JP13783882U JPS5942037U JP S5942037 U JPS5942037 U JP S5942037U JP 13783882 U JP13783882 U JP 13783882U JP 13783882 U JP13783882 U JP 13783882U JP S5942037 U JPS5942037 U JP S5942037U
Authority
JP
Japan
Prior art keywords
chip
substrate
down bonding
face down
bonding equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13783882U
Other languages
Japanese (ja)
Inventor
渡辺　修治
雄一郎 伊藤
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP13783882U priority Critical patent/JPS5942037U/en
Publication of JPS5942037U publication Critical patent/JPS5942037U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のフェースダウンボンディング装置を説明
する側面図、第２図はボンディング時の回路基板と半導
体チップとの位置合せ方法を説明する斜視図、第３図及
び第４図は、本考案に係るフェースダウンボンディング
装置におけるチップ保持具の一実施例を示す断面図、お
よびその下面図である。 図において、１は載置台、４は赤外線撮像装置、５は受
動回路基板、７は半導体チップ、２１゜２２は位置合せ
マーク、３１はチップ保持具、３２はチップ吸着面、３
３は赤外線透過防止用の遮光膜を示す。Fig. 1 is a side view illustrating a conventional face-down bonding device, Fig. 2 is a perspective view illustrating a method of aligning a circuit board and a semiconductor chip during bonding, and Figs. 3 and 4 are views of the present invention. FIG. 2 is a cross-sectional view and a bottom view of an embodiment of a chip holder in a face-down bonding apparatus according to the present invention. In the figure, 1 is a mounting table, 4 is an infrared imaging device, 5 is a passive circuit board, 7 is a semiconductor chip, 21°22 is an alignment mark, 31 is a chip holder, 32 is a chip suction surface, 3
3 shows a light-shielding film for preventing infrared transmission.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 被ボンデイング基板が配置された載置台上に離間対向し
て、襞間によって得られたボンディングすべき半導体チ
ップを吸着保持し、かつ該チップを前記基板上へ圧着操
作するチップ保持具を配設し、さらに該チップ保持具上
よりチップと前記基板との位置関係を観察する観察手段
を具備してなるボンディング装置において、前記チップ
保持具のチップ吸着面上に、当該チップの周縁部を被覆
する形に遮光膜を覆設してなることを特徴とするフェー
スダウンボンディング装置。A chip holder is arranged spaced apart from and facing a mounting table on which a substrate to be bonded is placed, and which adsorbs and holds a semiconductor chip to be bonded obtained between the folds and press-bonds the chip onto the substrate. , a bonding apparatus further comprising an observation means for observing the positional relationship between the chip and the substrate from above the chip holder, wherein a peripheral edge of the chip is coated on a chip suction surface of the chip holder. A face-down bonding device characterized by having a light-shielding film covered.
JP13783882U 1982-09-10 1982-09-10 Face down bonding equipment Pending JPS5942037U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13783882U JPS5942037U (en) 1982-09-10 1982-09-10 Face down bonding equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13783882U JPS5942037U (en) 1982-09-10 1982-09-10 Face down bonding equipment

Publications (1)

Publication Number Publication Date
JPS5942037U true JPS5942037U (en) 1984-03-17

Family

ID=30309470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13783882U Pending JPS5942037U (en) 1982-09-10 1982-09-10 Face down bonding equipment

Country Status (1)

Country Link
JP (1) JPS5942037U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007067315A (en) * 2005-09-02 2007-03-15 Sony Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007067315A (en) * 2005-09-02 2007-03-15 Sony Corp Semiconductor device
JP4687340B2 (en) * 2005-09-02 2011-05-25 ソニー株式会社 Semiconductor device

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