JPS5940744A - コンピユ−タ間で直接メモリ対メモリの通信を行なう方法及び装置 - Google Patents

コンピユ−タ間で直接メモリ対メモリの通信を行なう方法及び装置

Info

Publication number
JPS5940744A
JPS5940744A JP58079195A JP7919583A JPS5940744A JP S5940744 A JPS5940744 A JP S5940744A JP 58079195 A JP58079195 A JP 58079195A JP 7919583 A JP7919583 A JP 7919583A JP S5940744 A JPS5940744 A JP S5940744A
Authority
JP
Japan
Prior art keywords
packet
node
boat
buffer
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58079195A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0320094B2 (enExample
Inventor
ウイリアム・デイ・ストレツカ−
ロバ−ト・イ−・スチユワ−ト
サミユエル・フラ−
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of JPS5940744A publication Critical patent/JPS5940744A/ja
Publication of JPH0320094B2 publication Critical patent/JPH0320094B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
JP58079195A 1982-05-07 1983-05-06 コンピユ−タ間で直接メモリ対メモリの通信を行なう方法及び装置 Granted JPS5940744A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US37598482A 1982-05-07 1982-05-07
US375984 1982-05-07

Publications (2)

Publication Number Publication Date
JPS5940744A true JPS5940744A (ja) 1984-03-06
JPH0320094B2 JPH0320094B2 (enExample) 1991-03-18

Family

ID=23483204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58079195A Granted JPS5940744A (ja) 1982-05-07 1983-05-06 コンピユ−タ間で直接メモリ対メモリの通信を行なう方法及び装置

Country Status (6)

Country Link
EP (1) EP0094177B1 (enExample)
JP (1) JPS5940744A (enExample)
AU (1) AU568490B2 (enExample)
CA (1) CA1189195A (enExample)
DE (1) DE3380191D1 (enExample)
FI (1) FI831513A7 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08287031A (ja) * 1995-04-14 1996-11-01 Nec Corp プロセッサ間データ転送方法およびその装置
JP2009301101A (ja) * 2008-06-10 2009-12-24 Nec Corp プロセッサ間通信システム、プロセッサ、プロセッサ間通信方法、および、通信方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH667543A5 (en) * 1985-04-19 1988-10-14 Bbc Brown Boveri & Cie Data communication for processing network - using stored table in communication unit for each node defining data segment storage location
IN168469B (enExample) * 1986-02-24 1991-04-06 Ibm
EP0296862B1 (en) * 1987-06-24 1995-05-10 Westinghouse Electric Corporation Multiprocessor information exchange
US5179665A (en) * 1987-06-24 1993-01-12 Westinghouse Electric Corp. Microprocessor information exchange with updating of messages by asynchronous processors using assigned and/or available buffers in dual port memory
DE68922521T2 (de) * 1988-03-28 1996-01-18 Ibm Sekundärprozessorinitialisierungssystem.
FR2662522B1 (fr) * 1990-05-28 1994-08-12 Copernique Dispositif informatique de transfert de donnees en mode rafale.
EP0459877A1 (fr) * 1990-05-28 1991-12-04 Copernique, Societe Anonyme Dispositif informatique de transfert de données en mode rafale
WO1992006430A1 (fr) * 1990-09-28 1992-04-16 Fujitsu Limited Systeme de commande de messages dans un systeme de communication de donnees
DE69834253T2 (de) 1998-10-21 2007-02-01 Alcatel System und Verfahren zur Ausführung eines bestimmten Befehls zwischen erstem und zweitem Endgerät

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5631253A (en) * 1979-08-23 1981-03-30 Hitachi Ltd Transmission control system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833972B2 (ja) * 1979-11-12 1983-07-23 富士通株式会社 計算機システム間通信方式
US4560985B1 (en) * 1982-05-07 1994-04-12 Digital Equipment Corp Dual-count, round-robin ditributed arbitration technique for serial buses

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5631253A (en) * 1979-08-23 1981-03-30 Hitachi Ltd Transmission control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08287031A (ja) * 1995-04-14 1996-11-01 Nec Corp プロセッサ間データ転送方法およびその装置
JP2009301101A (ja) * 2008-06-10 2009-12-24 Nec Corp プロセッサ間通信システム、プロセッサ、プロセッサ間通信方法、および、通信方法

Also Published As

Publication number Publication date
AU1350083A (en) 1984-11-08
EP0094177A2 (en) 1983-11-16
AU568490B2 (en) 1988-01-07
FI831513A0 (fi) 1983-05-03
EP0094177A3 (en) 1985-01-09
JPH0320094B2 (enExample) 1991-03-18
DE3380191D1 (en) 1989-08-17
FI831513L (fi) 1983-11-08
EP0094177B1 (en) 1989-07-12
FI831513A7 (fi) 1983-11-08
CA1189195A (en) 1985-06-18

Similar Documents

Publication Publication Date Title
JP7774092B2 (ja) 専用低レイテンシリンクを使用した複数のハードウェアアクセラレータのための統合されたアドレス空間
US4777595A (en) Apparatus for transferring blocks of information from one node to a second node in a computer network
US5020020A (en) Computer interconnect system with transmit-abort function
EP0391583B1 (en) Dual-path computer interconnect system with four-ported packet memory control
US5187780A (en) Dual-path computer interconnect system with zone manager for packet memory
US8645623B1 (en) Method for performing a raid operation in a data storage system
CN104714905B (zh) 用于执行失效转移操作的方法和系统
EP3032787B1 (en) Method, device, system and storage medium for implementing packet transmission in pcie switching network
EP0990990B1 (en) Flow control in a fifo memory
JP4961481B2 (ja) シリアルアドバンストテクノロジーアタッチメント（ｓａｔａ）およびシリアルアタッチトスモールコンピュータシステムインターフェース（ｓｃｓｉ）（ｓａｓ）のブリッジング
EP0459757B1 (en) Network adapter
US8904023B2 (en) Streaming method and system for fibre channel network devices
US7707367B1 (en) Data storage system having separate atomic operation/non-atomic operation paths
US6871237B2 (en) System for controlling data transfer protocol with a host bus interface
KR101785310B1 (ko) 링크 패브릭 패킷에 비동기적인 플릿 번들을 이용한 링크 전달, 비트 오류 검출 및 링크 재시도
US5577211A (en) System and method using chained structure queues for ordering of message delivery between connected nodes wherein unsuccessful message portion is skipped and retried
US20030051076A1 (en) Methods and system for pre-fetching descriptors
CN101091318A (zh) 数据传输错误校验
JPS604624B2 (ja) 正しくない情報フレ−ムを再送するシステム
US6691178B1 (en) Fencepost descriptor caching mechanism and method therefor
KR20160074659A (ko) 고성능 패브릭 내에서의 qos를 위한 방법, 장치 및 시스템
KR101913972B1 (ko) 암시적 확인응답을 활용한 효율적인 링크 계층 재시도 프로토콜
JPH04139566A (ja) 多重プロセッシング・システム
CN103645994A (zh) 一种数据处理方法及设备
JPS59132263A (ja) マルチプロセツサ・システムのネツトワ−ク