DE3380191D1 - Apparatus for direct memory-to-memory intercomputer communication - Google Patents
Apparatus for direct memory-to-memory intercomputer communicationInfo
- Publication number
- DE3380191D1 DE3380191D1 DE8383302411T DE3380191T DE3380191D1 DE 3380191 D1 DE3380191 D1 DE 3380191D1 DE 8383302411 T DE8383302411 T DE 8383302411T DE 3380191 T DE3380191 T DE 3380191T DE 3380191 D1 DE3380191 D1 DE 3380191D1
- Authority
- DE
- Germany
- Prior art keywords
- memory
- intercomputer communication
- direct
- direct memory
- intercomputer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/177—Initialisation or configuration control
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
- Multi Processors (AREA)
- Small-Scale Networks (AREA)
- Computer And Data Communications (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US37598482A | 1982-05-07 | 1982-05-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3380191D1 true DE3380191D1 (en) | 1989-08-17 |
Family
ID=23483204
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383302411T Expired DE3380191D1 (en) | 1982-05-07 | 1983-04-28 | Apparatus for direct memory-to-memory intercomputer communication |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0094177B1 (de) |
JP (1) | JPS5940744A (de) |
AU (1) | AU568490B2 (de) |
CA (1) | CA1189195A (de) |
DE (1) | DE3380191D1 (de) |
FI (1) | FI831513L (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH667543A5 (en) * | 1985-04-19 | 1988-10-14 | Bbc Brown Boveri & Cie | Data communication for processing network - using stored table in communication unit for each node defining data segment storage location |
IN168469B (de) * | 1986-02-24 | 1991-04-06 | Ibm | |
US5179665A (en) * | 1987-06-24 | 1993-01-12 | Westinghouse Electric Corp. | Microprocessor information exchange with updating of messages by asynchronous processors using assigned and/or available buffers in dual port memory |
EP0296862B1 (de) * | 1987-06-24 | 1995-05-10 | Westinghouse Electric Corporation | Nachrichtenaustausch zwischen Prozessoren |
EP0335812B1 (de) * | 1988-03-28 | 1995-05-10 | International Business Machines Corporation | Sekundärprozessorinitialisierungssystem |
EP0459877A1 (de) * | 1990-05-28 | 1991-12-04 | Copernique, Societe Anonyme | Rechensystem zur Datenübertragung im Stossbetrieb |
FR2662522B1 (fr) * | 1990-05-28 | 1994-08-12 | Copernique | Dispositif informatique de transfert de donnees en mode rafale. |
US5592624A (en) * | 1990-09-28 | 1997-01-07 | Fujitsu Limited | Data communication for controlling message transmission and reception among processing modules using information stored in descriptor to form a loosely coupled multiprocessing system |
JP3251147B2 (ja) * | 1995-04-14 | 2002-01-28 | 日本電気株式会社 | プロセッサ間データ転送方法およびその装置 |
EP0996265B1 (de) * | 1998-10-21 | 2006-04-19 | Alcatel | System und Verfahren zur Ausführung eines bestimmten Befehls zwischen erstem und zweitem Endgerät |
JP2009301101A (ja) * | 2008-06-10 | 2009-12-24 | Nec Corp | プロセッサ間通信システム、プロセッサ、プロセッサ間通信方法、および、通信方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5631253A (en) * | 1979-08-23 | 1981-03-30 | Hitachi Ltd | Transmission control system |
JPS5833972B2 (ja) * | 1979-11-12 | 1983-07-23 | 富士通株式会社 | 計算機システム間通信方式 |
US4560985B1 (en) * | 1982-05-07 | 1994-04-12 | Digital Equipment Corp | Dual-count, round-robin ditributed arbitration technique for serial buses |
-
1983
- 1983-04-13 AU AU13500/83A patent/AU568490B2/en not_active Ceased
- 1983-04-28 EP EP19830302411 patent/EP0094177B1/de not_active Expired
- 1983-04-28 DE DE8383302411T patent/DE3380191D1/de not_active Expired
- 1983-05-03 FI FI831513A patent/FI831513L/fi not_active Application Discontinuation
- 1983-05-06 CA CA000427593A patent/CA1189195A/en not_active Expired
- 1983-05-06 JP JP7919583A patent/JPS5940744A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
FI831513A0 (fi) | 1983-05-03 |
AU1350083A (en) | 1984-11-08 |
EP0094177A2 (de) | 1983-11-16 |
JPS5940744A (ja) | 1984-03-06 |
FI831513L (fi) | 1983-11-08 |
AU568490B2 (en) | 1988-01-07 |
EP0094177A3 (en) | 1985-01-09 |
EP0094177B1 (de) | 1989-07-12 |
CA1189195A (en) | 1985-06-18 |
JPH0320094B2 (de) | 1991-03-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |