JPS593975A - 不揮発性記憶素子の書込み用高耐圧トランジスタ構造 - Google Patents

不揮発性記憶素子の書込み用高耐圧トランジスタ構造

Info

Publication number
JPS593975A
JPS593975A JP57110831A JP11083182A JPS593975A JP S593975 A JPS593975 A JP S593975A JP 57110831 A JP57110831 A JP 57110831A JP 11083182 A JP11083182 A JP 11083182A JP S593975 A JPS593975 A JP S593975A
Authority
JP
Japan
Prior art keywords
voltage transistor
memory element
write
withstand voltage
nonvolatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57110831A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0316792B2 (enrdf_load_stackoverflow
Inventor
Kazunari Hayafuchi
早渕　一成
Toshiaki Tanaka
利明 田中
Shigeru Komine
小峯　茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP57110831A priority Critical patent/JPS593975A/ja
Publication of JPS593975A publication Critical patent/JPS593975A/ja
Publication of JPH0316792B2 publication Critical patent/JPH0316792B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
JP57110831A 1982-06-29 1982-06-29 不揮発性記憶素子の書込み用高耐圧トランジスタ構造 Granted JPS593975A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57110831A JPS593975A (ja) 1982-06-29 1982-06-29 不揮発性記憶素子の書込み用高耐圧トランジスタ構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57110831A JPS593975A (ja) 1982-06-29 1982-06-29 不揮発性記憶素子の書込み用高耐圧トランジスタ構造

Publications (2)

Publication Number Publication Date
JPS593975A true JPS593975A (ja) 1984-01-10
JPH0316792B2 JPH0316792B2 (enrdf_load_stackoverflow) 1991-03-06

Family

ID=14545763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57110831A Granted JPS593975A (ja) 1982-06-29 1982-06-29 不揮発性記憶素子の書込み用高耐圧トランジスタ構造

Country Status (1)

Country Link
JP (1) JPS593975A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10522072B2 (en) 2011-10-28 2019-12-31 Apple Inc. Display with vias for concealed printed circuit and component attachment
US10620490B2 (en) 2011-10-05 2020-04-14 Apple Inc. Displays with minimized border regions having an apertured TFT or other layer for signal conductors

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10620490B2 (en) 2011-10-05 2020-04-14 Apple Inc. Displays with minimized border regions having an apertured TFT or other layer for signal conductors
US10877332B2 (en) 2011-10-05 2020-12-29 Apple Inc. Displays with minimized border regions having an apertured TFT layer for signal conductors
US10522072B2 (en) 2011-10-28 2019-12-31 Apple Inc. Display with vias for concealed printed circuit and component attachment

Also Published As

Publication number Publication date
JPH0316792B2 (enrdf_load_stackoverflow) 1991-03-06

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