JPS5937748U - Lead frame for semiconductor devices - Google Patents
Lead frame for semiconductor devicesInfo
- Publication number
- JPS5937748U JPS5937748U JP13437882U JP13437882U JPS5937748U JP S5937748 U JPS5937748 U JP S5937748U JP 13437882 U JP13437882 U JP 13437882U JP 13437882 U JP13437882 U JP 13437882U JP S5937748 U JPS5937748 U JP S5937748U
- Authority
- JP
- Japan
- Prior art keywords
- lead
- lead frame
- semiconductor devices
- semiconductor element
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図ａ、 ｂは従来の半導体装置用リードフレーム
の一例を示す平面図とＡ、−Ａ線による側断面図、第２
図ａ、 ｂはこの考案の一実施例を示す平面図とＢ−
Ｂ線による側断面図である。
図中、１． ２． ３は外部導出リード、４は半導体素
子、５は金線、６は突起である。なお、図中の同一符号
は同一または相当部分を示す。1A and 1B are a plan view showing an example of a conventional lead frame for a semiconductor device, a side sectional view taken along line A and -A, and FIG.
Figures a and b are plan views showing one embodiment of this invention, and figures B-
It is a side sectional view taken along B line. In the figure, 1. 2. 3 is an external lead, 4 is a semiconductor element, 5 is a gold wire, and 6 is a protrusion. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
リードに並設され前記半導体素子の各電極に金属細線を
接続する外部導出リードとを有する半導体装置用リード
フレームにおいて、前記半導体素子が固着されない外部
導出リードに前記金属細線を支える突起を設けたことを
特徴とする半導体装置用リードフレーム。In a lead frame for a semiconductor device having an external lead-out lead to which a semiconductor element is fixed, and an external lead-out lead which is arranged in parallel with the external lead-out lead and connects thin metal wires to each electrode of the semiconductor element, an external lead frame to which the semiconductor element is not fixed is provided. A lead frame for a semiconductor device, characterized in that a lead-out lead is provided with a protrusion that supports the thin metal wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13437882U JPS5937748U (en) | 1982-09-02 | 1982-09-02 | Lead frame for semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13437882U JPS5937748U (en) | 1982-09-02 | 1982-09-02 | Lead frame for semiconductor devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5937748U true JPS5937748U (en) | 1984-03-09 |
Family
ID=30302807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13437882U Pending JPS5937748U (en) | 1982-09-02 | 1982-09-02 | Lead frame for semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5937748U (en) |
-
1982
- 1982-09-02 JP JP13437882U patent/JPS5937748U/en active Pending
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