JPS5935480A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a GaAs FET having a protective film of a small surface leakage current on the surface by a method wherein a recessed part is provided in a semiconductor active layer, a pair of ohmic electrodes are formed interposing the recessed part between them, and a gate electrode to make Schottky contact with the active layer is provided in said recessed part. CONSTITUTION:A buffer layer 2 and the active layer 3 are made to grow vapor phase epitaxially on a semiinsulating substrate 1 consisting of GaAs, and the source electrode 4 and the drain electrode 5 consisting of AuGe/Au are formed on the layer 3. Then a heat treatment is performed in N2 gas to make alloy layers 6 to be generated under the electrodes thereof, and a heat treatment is performed again in mixed gas of N2 and O2 to form the oxide film 7 between the layers 6. After then, an oxide layer 8 is adhered on the whole surface, and is covered with a resist film 9 having an opening 10 positioning between the electrodes 4, 5, etching is performed using the resist film thereof as the mask to form the recessed part 11 in the active layer 3, and a region 14 formed by thinning thickness of the layer 3 is generated. Then a metal to make Schottky contact is adhered to the whole surface, the gate electrode 15 is left on the region 14, and the unnecessary metal is removed together with the films 9, 8.

Description

DETAILED DESCRIPTION OF THE INVENTION (al) Technical Field of the Invention The present invention relates to a semiconductor device, and particularly relates to a semiconductor device having a recessed structure.
This invention relates to the structure of a field effect transistor (FE'r).

(bl) Conventional technology and problems Conventional GaAs FETs are made by depositing silicon dioxide (5i
02) film or an insulating film such as a silicon nitride (Si3N4) film was formed and used as a surface protection film.

However, since the substrate material is GaAs, the above protective film forming step must be performed at a relatively low temperature of approximately 450 ('C) or less. Therefore, the quality of the formed insulating film is not perfect, and a large number of traps exist at the interface between the insulating film and the GaAs layer. Therefore, conventional GaAs
In FET, interfacial leakage current and GaAs
1! There is a problem in that surface depletion occurs, and it cannot be said that the electrical characteristics and reliability are necessarily satisfactory.

tel OBJECT OF THE INVENTION An object of the present invention is to solve the above problems and provide a GaAs FET provided with an improved surface protection film.

+dl Structure of the Invention The features of the present invention include: a semiconductor active layer in which a recess is selectively formed; a pair of ohmic electrodes disposed on the main surface of the active layer to face each other across the recess; The recess has a gate electrode in Schottky contact with the active layer, and the remaining region of the main surface of the active layer excluding the pair of ohmic electrode forming portions is covered with an oxide layer of the active layer. It's about becoming.

(e) Embodiment of the Invention Below, an embodiment of the present invention, together with its manufacturing process, is shown in Figs.
This will be explained using FIG.

In FIG. 1, 1 is a semi-insulating substrate made of GaAs;
2 is a buffer layer made of non-doped GaAs, 3 is n
This is an active layer made of 1GaAs.

Both the buffer layer 2 and the active M3 are continuously grown on the semi-insulating substrate 1 by liquid phase epitaxial growth. The thickness of the buffer M2 is approximately 5 μm, for example.
], the impurity concentration of the active layer 3 is approximately IXIO(c
m'), the thickness may be approximately 0.5 [μm], for example.

After epitaxial growth is completed as described above, gold/germanium/gold (^uGe/Au) is grown as shown in the figure.
It is selectively deposited on the surface of the active layer 3 to form a source electrode 4 and a drain electrode 5.

Next, as shown in FIG. 2, a non-oxidizing atmosphere such as nitrogen (N
2) Heat treatment is carried out at a temperature of approximately 450 ('C) in the interior to form an alloy layer 6 of the source electrode 4 and drain electrode 5 and the active layer 3, and further in an oxidizing atmosphere such as oxygen (02). In a mixed atmosphere with nitrogen (N2),
By performing heat treatment at a temperature of approximately 400°C, the exposed surface of the remaining active layer excluding the portions covered by the source electrode 4 and drain electrode 5 is oxidized, for example, at a temperature of approximately 0.1 to Form N7 oxide with a thickness of 0.2 [μm].

Next, as shown in FIG. 3, a silicon dioxide (SiO2) film 8 is formed on the entire surface of the substrate 1 including the oxide layer 8 and the source and drain electrodes by, for example, the CVD method, and the pair of ohmic electrodes are formed on the silicon dioxide (SiO2) film 8. A resist film 9 having a predetermined opening 10 therebetween is formed.

Next, as shown in FIG. 4, using the resist film 9 as a mask, the 5i02 film 8 is first selectively removed using a hydrofluoric acid-based chemical. At this time, by side etching, 5i
The opening size of the 02 film 8 is formed to be slightly larger than the opening 10 of the resist film as shown. Thereafter, the surface of the active layer 3 at the openings 3 is selectively removed by treatment using an anisotropic ethotinda solution, and the recesses 1 are formed on the surface of the active layer 3.
form 1. The dimensions of the top portions of the four portions 11 formed here are approximately equal to the opening dimensions of the 5i02 film 8.

In this step, prior to selective removal of the active layer 3, a fourth
As shown in the figure, sword-shaped conductors 12 and 12 are brought into contact with the surfaces of a pair of ohmic electrodes 4 and 5 that have already been formed, and a current 6113 is connected between them, and when a predetermined voltage is applied, this current If the above-described etching of the active layer 3 is performed while monitoring the current flowing through the total 13, the recess 11
The thickness of the active N14 remaining at the bottom can be precisely controlled.

That is, since the above-mentioned current decreases as etching progresses, the above-mentioned control can be performed by examining in advance the correlation between the thickness of the active layer 14 to be left and the current value.

Such a control method is possible because the source electrode 4 and drain electrode 5 are already present when performing the etching process.

Next, as shown in FIG. 5, aluminum (Al) is deposited by vapor deposition to form a gate electrode 15.

After this, as shown in FIG. 6, 5i02l! was used as a mask in the process of forming the recess 11. l! 8. Resist film 9 and AllN deposited on this resist film 9
By removing 13, a completed semiconductor device of this example is obtained. This step is carried out using a lift-off method, that is, by removing 5i02INS with a hydrofluoric acid-based chemical, the resist film 9 and Aj! [15 can also be removed at the same time.

The semiconductor device of this example obtained as described above has an active layer 3
The remaining portion of the main surface of the active layer 3 except for the portion where the source electrode 4 and the drain electrode 5 are formed is made of GaA, which constitutes the active layer 3.
It is covered with an oxide layer 6 of s. This oxide layer 6 is a high resistance layer and has good film quality, compared to the conventional 3102 film or S
Unlike the case where an i3N4 film is used, the interfacial leakage current is significantly reduced.

Therefore, the electrical characteristics and reliability of the semiconductor device are improved.

(f) DETAILED DESCRIPTION OF THE INVENTION As described above, the present invention provides a GaAsFET having a high-quality protective film on its surface with little interfacial leakage current.

[Brief explanation of drawings]

FIGS. 1 to 6 are sectional views of essential parts showing an embodiment of the present invention along with manufacturing steps. In the figure, 1 is a semi-insulating substrate made of GaAs, 2 is a haphazard layer made of undoped GaAs, and 3 is an n-type G
An active layer made of aAs, 4 and 5 are source and drain electrodes, respectively, 6 is an alloy layer, 7 is an oxide layer of Ga'As, 11 is a recess formed on the surface of the active layer, and 14 is at the bottom of the recess 11. The remaining active layer, 15 is active M1
4 shows the gate electrode forming a Schottky contact with the surface. Law school

Claims (1)

[Claims] a semiconductor active layer in which a recess is selectively formed; a pair of ohmic electrodes disposed on the main surface of the active layer to face each other across the four parts; and a Schottky contact with the active layer within the recess. a gate electrode, and the remaining region of the main surface of the active layer other than the pair of ohmic electrode forming portions is covered with an oxide layer of the active layer.