JPS5933832A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To perform over-all etching of an insulating film, and to prevent a semiconductor device from generation of disconnection of a wiring and reduction of the insulating property of the insulating film without reducing the degree of integration by a method wherein the reactive ion etching method using mixed gas containing C, F, H as reactive gas is used to the film having a step part formed on a semiconductor substrate. CONSTITUTION:A silicon oxide film 2 is selectively etched using a resist 3 as the mask according to a reactive ion etching method using mixed gas of CF4 and H2, and after then, the resist 3 is removed. In this condition, the step part of the opening part of the silicon oxide film 2 is steep. Then over-all etching is performed to the silicon oxide film 2 according to the reactive ion etching method using mixed gas of C3F8 and H2, for example. The sectional shape of the circumferential edge of the opening part of the silicon oxide film 2 after etching becomes to have the slant of about 45 degrees, the flat part is not etched, and a CF polymer 5 is deposited thereon. The aluminum wiring layer 6 formed thereon can be adhered to thickness nearly the same with the flat part even at the slant part of the side of the opening part of the silicon oxide film 2, disconnection of the wiring becomes to hard to generate, and reliability of the element is enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field to which the Invention Pertains] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for smoothing the edge of a step in a film having a step.

[Prior art and its problems] Conventionally, when manufacturing semiconductor integrated circuits, various films formed on a substrate are selectively etched using a mask to form a predetermined pattern. The cross section has a steeply rising 9 side wall surface.

For this reason, when wiring is performed by vapor deposition of aluminum, for example, in an electrode mounting opening (contact hole) provided in an insulating film, a thin wiring layer is formed on the side wall surface of this opening, so-called. This causes a shadow lighting effect, which leads to wire breakage and reduced reliability of semiconductor devices.As a way to solve this problem, the so-called bevel cut method, in which the slope of the rising edge of the opening in the insulating film is made gentler, is used. Yes, but
In this method, since the slope is made gentler, processing accuracy inevitably decreases, and the area occupied by the slope increases, resulting in a reduction in the degree of integration of the elements.

Furthermore, when an insulating film is applied to a wiring layer processed into a predetermined pattern, the steep sidewall surface of the wiring layer causes the insulating film to become thinner on this sidewall surface, resulting in a decrease in insulation properties. Decreases the reliability of semiconductor devices.

[Objective of the Invention] The object of the present invention is to
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can prevent disconnection of wiring and deterioration of the insulation properties of an insulating film, and can improve device reliability.

[Summary of the Invention] As a result of extensive research aimed at softening the steep steps of a film, the present inventor has developed a reactive ion etching method using a mixed gas containing C, F, and H as a reactive gas. It was discovered that the entire surface could be etched using . Additionally, this etching is performed under conditions that result in CF polymer deposition only on flat membranes. In other words, when ions p-accelerated by the cathode drop voltage in the reactive ion etching process collide perpendicularly with the substrate, the CF particles tend to deposit on the periphery of the step due to the incident angle dependence of the sputtering effect. The coalescence is sputtered, resulting in an exposed film around the edges of the steps and a deposit of CF polymer on other flat areas.

In other words, etching starts from the periphery of the steep step portion and is not etched on the flat portion, so that the steep step portion becomes gentle.

The present invention focuses on these points and etches a film having a step formed on a semiconductor substrate using a reactive ion etching method using a mixed gas containing C, F, and H as a reactive gas. This method involves etching the entire surface.

[Effects of the Invention] According to the present invention, since the processed cross section of the membrane can be made gentle,
It is possible to prevent disconnection of the wiring in the insulating film opening, and also to prevent the deterioration of the insulation properties of the insulating film, thereby improving device reliability. Furthermore, since the processing accuracy is high, the degree of integration of the elements is not reduced, making it extremely effective in manufacturing devices for high-density integrated circuits.

[Embodiment of the Invention] FIGS. 1 to 4 are process sectional views showing an embodiment of the present invention, respectively. First, as shown in FIG.
A silicon oxide film 2 with a thickness of, for example, 1 μm is deposited thereon, and a resist 3 with a thickness of, for example, 1 μm is applied as a mask on the silicon oxide film 2, and then an etching window 4 is formed by buttering. . Next, by reactive ion etching using, for example, a mixed gas of CF4 and H2, the 7 silicon oxide film 2 is selectively etched using the resist 3 as a mask, as shown in FIG. 2, and then the resist 3 is removed. In this state, the step at the opening of the silicon oxide Y film 2 is steep.

Next, the entire surface of the silicon oxide film 2 is etched by a reactive ion etching method using a mixed gas of 03F8 and H2, for example. At this time, the sample was placed on the high frequency application side of the parallel plate electrodes, and a C3F8 flow rate of 24
°c/rrInt H2 flow rate 9°'/mtn, RF
Power 50~200W Pressure 0.005~0.05 Tor
The test was carried out under conditions in the range of r. The cross-sectional shape after etching is such that the periphery of the opening of the silicon oxide film 2 has an inclination of approximately 45° as shown in FIG. 3, and the C, F polymer 5 is deposited on the flat portion without being etched. This CF polymer can be easily removed by oxygen plasma or the like.

Only the periphery of the upper button opening is etched.
It is based on a new phenomenon discovered in etching by reactive ion etching using a C-F-H mixed gas.

After removing the CF polymer 5, for example, an aluminum film 6 was formed as a wiring layer as shown in FIG. As can be seen from FIG. 4, the aluminum interconnection layer thus formed is deposited on the sloped portions of the side surfaces of the opening of the silicon oxide film 2 to approximately the same thickness as on the flat portions. It has been found that this reduces the possibility of wire breakage and improves device reliability.

[Other embodiments of the invention] The present invention is not limited to the embodiments described above. For example, in the step shown in FIG. 3, the silicon oxide film 2 is etched so that the opening of the silicon oxide film 2 is on the lower side (
This was done so that it had a slope up to the boundary surface with
The reactive ion etching using a mixed gas of 3F8 and H2 may be stopped midway, and only the upper side of the periphery of the opening may be sloped, and the effects of the present invention can also be sufficiently obtained in this case. Furthermore, as the amount of H2 increases, the CF polymer becomes less likely to be deposited, and at the same time, the inclination angle of the periphery of the opening becomes larger.

Furthermore, in the above embodiments, an oxide/licon film was used as the film to be etched by the reactive ion etching method using a mixed gas of C, F', and H, but other silicon nitride films or silicon nitride films may be used. An insulating film such as a silicate glass film containing impurities may be used, and the present invention is also effective for polycrystalline silicon or metal films, and the processing cross section can be made gentle, increasing the reliability of the insulating film deposited thereon. Improves sex.

That is, the present invention is effective for all processing steps that occur during the manufacturing process of integrated circuits.

[Brief explanation of drawings]

1 to 4 are process cross-sectional views showing one embodiment of the present invention. ■...Silicon substrate, 2...Silicon oxide film, 3.
・Resist layer (mask), 4... Etching window, 5.
...CF polymer layer, 6...aluminum, RAM wiring layer. Agent Patent attorney Noriyuki Chikanori (and 1 other person) Figure 1 Figure 2 Figure 4

Claims (2)

[Claims] (1) A method for manufacturing a semiconductor device in which a mixed gas containing C, F, and H is used as a reactive gas for a film having steps formed on a semiconductor substrate. (2) The method for manufacturing a semiconductor device according to claim 1, wherein an insulating film or a polycrystalline silicon film is used as the film having the step.