JPS5932125A - Mask for ion implantation - Google Patents
Mask for ion implantationInfo
- Publication number
- JPS5932125A JPS5932125A JP14112682A JP14112682A JPS5932125A JP S5932125 A JPS5932125 A JP S5932125A JP 14112682 A JP14112682 A JP 14112682A JP 14112682 A JP14112682 A JP 14112682A JP S5932125 A JPS5932125 A JP S5932125A
- Authority
- JP
- Japan
- Prior art keywords
- mask
- implanting
- ion implantation
- ion
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005468 ion implantation Methods 0.000 title claims abstract description 12
- 239000007787 solid Substances 0.000 claims abstract description 11
- 150000002500 ions Chemical class 0.000 claims description 8
- 238000002513 implantation Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 abstract description 8
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 238000010884 ion-beam technique Methods 0.000 abstract description 3
- 239000000696 magnetic material Substances 0.000 abstract description 2
- 230000005465 channeling Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000053 physical method Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Landscapes
- Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Engineering & Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、半導体など固体表面の特定の領域にだけイオ
ン打込みをするだめの非打込領域を覆うマスクの改良に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a mask that covers a non-implanted region for implanting ions only into a specific region of the surface of a solid such as a semiconductor.
トランジスタなどの半導体素子をつくるときの不純物ド
ーピングや磁気バブル素子をつくるときの磁気特性の制
御の目的で固体表面の特定部分にだけイオン打込みをす
るという方法がとられている。この場合、第1図に示す
ように固体10表面のイオン打込みをしたくない部分に
酸化物、レジスト又は金属などのマスク2を付けてから
イオン3を打込み、このあと、マスク2を化学的、ある
いは物理的方法で除去するという方法がとられる。A method of implanting ions only into specific parts of a solid surface is used for the purpose of doping impurities when making semiconductor devices such as transistors and controlling magnetic properties when making magnetic bubble elements. In this case, as shown in FIG. 1, a mask 2 of oxide, resist, or metal is attached to the portion of the surface of the solid 10 where ion implantation is not desired, and then the ions 3 are implanted. Alternatively, a physical method may be used to remove it.
しかしながら、一般のイオン打込みではイオン3がチャ
ネリング効果により深くまで入シ込まないように、第2
図に示すようにイオンビーム3を固体1の表面に立てた
垂線から7°前後傾けで打込むことが多い。この場合、
マスク2の影4が固体1の表面に出来るためマスク2の
通りの打込領域ができないという問題が生じる。この問
題は素子の微細化が進む程、重大になってくる。However, in general ion implantation, in order to prevent ions 3 from entering deeply due to channeling effects, the second
As shown in the figure, the ion beam 3 is often implanted at an angle of 7 degrees from the perpendicular to the surface of the solid 1. in this case,
Since the shadow 4 of the mask 2 is formed on the surface of the solid 1, a problem arises in that the implantation area according to the mask 2 cannot be formed. This problem becomes more serious as the device becomes finer.
イオン打込用マスク2の必要な厚味は打込みエネルギー
とイオンの質量とにより決まるから、打込領域の微細化
と共に厚味を減らすことはできない。Since the necessary thickness of the ion implantation mask 2 is determined by the implantation energy and the mass of the ions, the thickness cannot be reduced with miniaturization of the implantation region.
この発明の目的はこのような問題点を解消したイオン打
込用マスクを提供することにある。An object of the present invention is to provide an ion implantation mask that solves these problems.
上記目的を達成するために本発明においてはマスクの端
面が固体表面上に立てた垂線から傾斜するようにイオン
打込用マスクを構成したことを特徴としている。In order to achieve the above object, the present invention is characterized in that the ion implantation mask is constructed such that the end face of the mask is inclined from a perpendicular line erected on the solid surface.
以下、本発明の一実施例を第2図により説明する。第2
図において、1は半導体基板あるいは磁性材基板のよう
な基板である。この基板l上に本発明の最も特徴とする
イオン打込用マスク2′が載置されている。このマスク
2′の端面は基板1に立てた垂線から角度αだけ傾斜し
ている。この傾斜角度aはイオン3の傾斜角度βとほぼ
同じか、またはそれよりも若干大きくなっている。この
ようにすることによって、第2図の影4を全く無くする
ことができる。An embodiment of the present invention will be described below with reference to FIG. Second
In the figure, 1 is a substrate such as a semiconductor substrate or a magnetic material substrate. An ion implantation mask 2', which is the most characteristic feature of the present invention, is placed on this substrate l. The end face of this mask 2' is inclined at an angle α from a perpendicular to the substrate 1. This inclination angle a is approximately the same as the inclination angle β of the ions 3, or is slightly larger than that. By doing this, the shadow 4 in FIG. 2 can be completely eliminated.
実際、このようなマスク2′はプラズマエツチングのよ
うな方法でそのパラメータを制御することによってつく
ることができる。In fact, such a mask 2' can be produced by controlling its parameters with methods such as plasma etching.
このように本発明によれば、打込領域を微細化してもマ
スクの影の影響を無く゛することができるという顕著な
効果が得られる。As described above, according to the present invention, it is possible to obtain the remarkable effect that even if the implantation area is miniaturized, the influence of the shadow of the mask can be eliminated.
第1図及び第2図は従来のイオン打込による不純物ドー
ピングを示す図で、第1図は垂直入射の例で、第2図は
チャネリングを避けるために科目にイオンを入射する場
合の例、第3図は本発明によるマスクの一実施例を示す
図でちる。
1・・・イオン打込をする固体試料、2・・・マスク、
2′・・・本発明によるマスク、3・・・イオンビーム
、12−Figures 1 and 2 are diagrams showing impurity doping by conventional ion implantation, where Figure 1 is an example of vertical injection, Figure 2 is an example of ion injection into the subject to avoid channeling, FIG. 3 is a diagram showing an embodiment of the mask according to the present invention. 1... Solid sample for ion implantation, 2... Mask,
2'... Mask according to the present invention, 3... Ion beam, 12-
Claims (1)
るためのマスクにおいて、上記マスクがその端面を上記
固体面上に立てた垂線から傾斜してなることを特徴とす
るイオン打込用マスク。1. An ion implantation mask for limiting an implantation area when implanting ions into a solid surface, characterized in that the end face of the mask is inclined from a perpendicular to the solid surface. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14112682A JPS5932125A (en) | 1982-08-16 | 1982-08-16 | Mask for ion implantation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14112682A JPS5932125A (en) | 1982-08-16 | 1982-08-16 | Mask for ion implantation |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5932125A true JPS5932125A (en) | 1984-02-21 |
Family
ID=15284763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14112682A Pending JPS5932125A (en) | 1982-08-16 | 1982-08-16 | Mask for ion implantation |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5932125A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0880174A1 (en) * | 1997-05-21 | 1998-11-25 | Nec Corporation | Method of fabricating semiconductor device capable of providing mosfet which is improved in a threshold voltage thereof |
EP2761648A4 (en) * | 2011-09-30 | 2015-06-24 | Intel Corp | Non-planar transitor fin fabrication |
-
1982
- 1982-08-16 JP JP14112682A patent/JPS5932125A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0880174A1 (en) * | 1997-05-21 | 1998-11-25 | Nec Corporation | Method of fabricating semiconductor device capable of providing mosfet which is improved in a threshold voltage thereof |
US6281094B1 (en) | 1997-05-21 | 2001-08-28 | Nec Corporation | Method of fabricating semiconductor device capable of providing MOSFET which is improved in a threshold voltage thereof |
EP2761648A4 (en) * | 2011-09-30 | 2015-06-24 | Intel Corp | Non-planar transitor fin fabrication |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4394182A (en) | Microelectronic shadow masking process for reducing punchthrough | |
US5770502A (en) | Method of forming a junction in a flash EEPROM cell by tilt angle implanting | |
JPS6032364A (en) | Manufacture of semiconductor device | |
JPS61220424A (en) | Manufacture of semiconductor device | |
JPS5932125A (en) | Mask for ion implantation | |
JPS6421919A (en) | Manufacture of semiconductor device | |
JPS60733A (en) | Semiconductor device and manufactur thereof | |
JPS56107552A (en) | Manufacture of semiconductor device | |
JPS55134929A (en) | Ion implantation | |
JPS59119870A (en) | Manufacture of semiconductor device | |
JPS59208784A (en) | Manufacture of semiconductor device | |
JP2709086B2 (en) | Method for forming electrode of semiconductor device | |
JPS62159469A (en) | Manufacture of insulated gate type field effect transistor | |
JPS62274621A (en) | Ion implantation | |
JPS59228718A (en) | Semiconductor device | |
JPH04249316A (en) | Manufacture of semiconductor device | |
JPS57170571A (en) | Manufacture of mos type semiconductor device | |
GB1294515A (en) | Improvements in or relating to the fabrication of semiconductor devices | |
JPS6243341B2 (en) | ||
JPS59175722A (en) | Photomask for manufacture of semiconductor device | |
KR100404220B1 (en) | Method for manufacturing semiconductor device using tilt etching process | |
JPS60240131A (en) | Manufacture of semiconductor device | |
JPS6350014A (en) | Manufacture of semiconductor device | |
JPS5923522A (en) | Dry etching method | |
EP0107851A1 (en) | Manufacture of semiconductor devices by the planar method |