JPS5925271A - Transistor - Google Patents

Transistor

Info

Publication number
JPS5925271A
JPS5925271A JP13534082A JP13534082A JPS5925271A JP S5925271 A JPS5925271 A JP S5925271A JP 13534082 A JP13534082 A JP 13534082A JP 13534082 A JP13534082 A JP 13534082A JP S5925271 A JPS5925271 A JP S5925271A
Authority
JP
Japan
Prior art keywords
region
regions
base
emitter
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13534082A
Other languages
Japanese (ja)
Other versions
JPH0247855B2 (en
Inventor
Tadahiko Tanaka
田中 忠彦
Kazuo Tagashira
田頭 一夫
Hisashi Shimizu
清水 永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP13534082A priority Critical patent/JPS5925271A/en
Publication of JPS5925271A publication Critical patent/JPS5925271A/en
Publication of JPH0247855B2 publication Critical patent/JPH0247855B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a transistor of an emitter mesh structure of large secondary breakdown withstand voltage by a method wherein ring-shaped current block regions are provided in base contact regions. CONSTITUTION:The transistor is composed of a collector region 1 consisting of an N type semiconductor substrate, a P type base region 2, and an N type mesh emitter region 3. Many circular base contact regions 4 are dotted in the region 3, and the N type ring-shaped current block regions 5 are formed in the regions 4. A base electrode ohmic-contacts the regions 4 in the regions 5, or are brought into ohmic contact with both of regions 5 and the regions 4 therein. The base current from the electrode 6 is restricted by the regions 5 and does not flow into the surface of the region 3, accordingly flows into the bottom surface of the region 3. As a result, the side surface of the region 3 becomes inactive, and then the secondary breakdown withstand voltage can be largely improved.

Description

【発明の詳細な説明】 1イ) 発明の技南分野 本発明はトランジスタ%特にメツシュエミッタ構造を有
するトランジスタの改良に関する。
DETAILED DESCRIPTION OF THE INVENTION 1) Field of the Invention The present invention relates to improvements in transistors, particularly transistors having a mesh emitter structure.

同 従来技ト1:r トランジスタの78流容隈の増大を図る構造としてメッ
ンユエミヅタ摺造が考えられた。メツシュエミッタ構造
とは第1図に示すVIJ< 、 N型の半導体裁板より
成るコレクタ領域ill、Plyのベース領域(2j、
メツシュ状のエミッタ領域(3)があり、エミッタ領域
(3)内には丸形のベースコンタクト頭JJJ、+41
が多数点在し′Cいる。r−ミッタ電極はメツシュ状の
エミッタ領域(3)にオーミック接触し、ベース電極は
各ベースコンタモl城(4)にオーミック接触している
Same prior art 1:r Menyuemizuta sliding structure was considered as a structure to increase the current capacity of the transistor. The mesh emitter structure is shown in FIG. 1 with base regions (2j, 2j,
There is a mesh-like emitter region (3), and inside the emitter region (3) there is a round base contact head JJJ, +41
There are many scattered places. The r-mitter electrode is in ohmic contact with the mesh-like emitter region (3), and the base electrode is in ohmic contact with each base contour (4).

斯上の補遺ではメツシュ状cミッタ領域13)によりエ
ミッタ面積の増大のみを図ることができるので、同一エ
ミッタ面積を得るチップ面積の縮小に役立・り。
In the above supplement, the mesh-like C-mitter region 13) can only increase the emitter area, which is useful for reducing the chip area for obtaining the same emitter area.

しかしながら斯るエミッタメツシュ構造のトランジスタ
ではベース電極の接触しているベースコンタクト領域(
41を活性なエミッタ領域13)で囲んでいるので、表
面で二次降伏する欠点があった。
However, in a transistor with such an emitter mesh structure, the base contact region (
41 is surrounded by an active emitter region 13), there is a drawback that secondary breakdown occurs at the surface.

し1 発明の開示 本発明は斯上した欠点に鑑み−Cなされ、緋′1状重流
咀止領繊(5)をベースコンタクト領我(4)に設ける
ことにより、二次降伏両歌の大きいエミッタメツシュ構
造のトランジスタを実現することを目的とする。
1 DISCLOSURE OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and by providing a scarlet 1-shaped heavy flow masticating region (5) in the base contact region (4), it is possible to improve the secondary yield strength. The aim is to realize a transistor with a large emitter mesh structure.

に)) 発明の実施例 本発明に依るトランジスタは第21図(二示す如くN型
の半導体基板より成るコレクタfir=IJdt[I、
 P型のベース領域[21,N型の少ツンユ状のエミッ
タ領域(31で41′ft成され、エミッタ領域(31
内には丸形のベースコンタクト領域(4)が多数点在さ
れ、更に本発明の特1徴とするトJ型の環状電流1!J
l tlz領域(5)を各ベースコンタクト領域(4)
内に形成する。
Embodiments of the Invention A transistor according to the present invention has a collector fir=IJdt[I,
P-type base region [21, N-type slightly spiky emitter region (31, 41'ft), emitter region (31
A large number of round base contact regions (4) are scattered within the interior, and a J-shaped circular current 1! J
l tlz region (5) to each base contact region (4)
form within.

環状゛電流阻止領域(5)は例えば直径200.4’の
ベースコンタク) 56 W 141内に30.#はど
離間させて20.1111]に形成する。この結果環状
電流阻止領域(5)内には直径1[1(J、#Iのベー
スコンタクトi域(4)が確保できる。な′お環状電流
■正領域(5)はエミッタ領域(3)と同時(二拡散形
成すれば良い。
The annular current blocking region (5) is, for example, a base contact with a diameter of 200.4') 56 W 30. #20.1111] are spaced apart. As a result, a base contact region (4) with a diameter of 1 [1 (J, #I) can be secured within the annular current blocking region (5).The annular current ■positive region (5) is the emitter region (3). At the same time (two-diffusion formation is sufficient).

ベース電極(61は第3図に示す如く、環状電流阻者に
オーミック接触させる。
The base electrode (61 is in ohmic contact with the annular current blocker as shown in FIG. 3).

斯上した本発明のメツシュエミッタ構造のトランジスタ
l−依しば、ベース′覗極(6)からのベース電流は環
状電流阻止領域(5)により規1制されて盲二ミッタ領
Jffl131の表面部分には流れず、エミッダ色゛1
城(3)底面に流れる。この結果cミッタ働域に31の
側面は不活性となり、二次降伏両爪を人[1]に向1:
、できる。
According to the transistor of the mesh emitter structure of the present invention described above, the base current from the base' viewing pole (6) is regulated by the annular current blocking region (5) and the surface of the blind emitter region Jffl131 is regulated by the annular current blocking region (5). It does not flow into the parts, and the Emida color is 1
Castle (3) Flows to the bottom. As a result, the sides of 31 in the c-mitter working area become inactive, and the secondary yielding claws face 1:
,can.

第4図は二次降伏耐11を示す特性図であり、X軸にC
B間逆バイアス嘔位(VOB)、Y軸にPN接合の温度
(−よる立ち」二かり電圧の変fllI(△VBF)を
採っている。、第4図に於いて実線で示す本発明の特性
は点線で示″!I−従来のものに比較しC約2倍にその
二次FF伏耐獣を拡大している、田り 産業上の利用可
能性 A・発明に依ればciブタメツシュ41′6造のトラン
ジスタに於いてメツシュ1ニミツタの働きにより人この
結果人゛覗流で高耐圧のパワートランジスタを実現でき
る。
Figure 4 is a characteristic diagram showing the secondary yield resistance 11, and the X axis shows C
The temperature of the PN junction (VOB) is plotted on the Y-axis, and the change in voltage (△VBF) is plotted on the Y-axis. The characteristics are shown by the dotted line.I-Compared to the conventional one, the secondary FF's fall resistance has been expanded to approximately twice that of the conventional one.Industrial Applicability A: According to the invention In a transistor of 41'6 structure, a power transistor with a high breakdown voltage can be realized by the operation of the mesh 1 limiter.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を説明する断面斜視図、第2図は本発明
を説明すて)断面斜視図、第3図は電極を119成した
本発明のトランジスタを説明する断面図第4図は従来お
よびA)発明の二次降伏両級を説明する特性図である。 tllljコ” り9 fi自J1.!l+ 、 +2
1&;t ヘ−フイ】n城、+:11 &−! 、r−
ミツタロ自」論v、(4)はベースコンタクトf伯鯵、
t51cオ環状改流1111止6自懺、 (filはベ
ース電極である。 5f 第3図 を 第4図 cB
FIG. 1 is a cross-sectional perspective view for explaining a conventional example, FIG. 2 is a cross-sectional perspective view for explaining the present invention, and FIG. 3 is a cross-sectional view for explaining a transistor of the present invention having 119 electrodes. FIG. 2 is a characteristic diagram illustrating both the conventional and A) invention secondary yielding classes. tllljko” ri9 fi J1.!l+, +2
1&;t He-hui] n castle, +:11 &-! , r-
Mitsutaro's theory v, (4) is base contact f Hakusai,
t51c o Annular reformer 1111 stop 6 self-extrusion, (fil is the base electrode. 5f Figure 3 to Figure 4 cB

Claims (1)

【特許請求の範囲】[Claims] 1、 コレクタ領域、ベース領域および、エミッタ領域
を備え、υ+、cミッタ領域を2iJ記ベース領域のほ
ぼ全面に設け、n1Ji!12ベース仔j域のコンタク
ト領域を1))j記Lミッタ領域内に多数島状に配置し
たトランジスタ(二於い゛C1前記ベース領域のコンタ
クト領域にi’jiJ紀Cミッタ領域と同桿¥ji型の
環4大電流β目止領域を設け、該環状電流阻止領域にυ
口まれだn1j記コンタクト領域にベース電極をオーミ
ックコンタクトすることを特徴とするトランジスタ。
1. A collector region, a base region, and an emitter region are provided, and a υ+, c emitter region is provided on almost the entire surface of the 2iJ base region, and n1Ji! 12 The contact region of the base region J is 1)) The transistor arranged in a number of islands in the J L-mitter region (2) The contact region of the base region is the same as the J-J C-mitter region. A ji-type ring 4 large current β blocking region is provided, and υ is provided in the ring-shaped current blocking region.
A transistor characterized in that a base electrode is in ohmic contact with a contact region.
JP13534082A 1982-08-02 1982-08-02 Transistor Granted JPS5925271A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13534082A JPS5925271A (en) 1982-08-02 1982-08-02 Transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13534082A JPS5925271A (en) 1982-08-02 1982-08-02 Transistor

Publications (2)

Publication Number Publication Date
JPS5925271A true JPS5925271A (en) 1984-02-09
JPH0247855B2 JPH0247855B2 (en) 1990-10-23

Family

ID=15149478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13534082A Granted JPS5925271A (en) 1982-08-02 1982-08-02 Transistor

Country Status (1)

Country Link
JP (1) JPS5925271A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62168661U (en) * 1986-04-17 1987-10-26

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4835774A (en) * 1971-08-30 1973-05-26
JPS5691468A (en) * 1979-12-25 1981-07-24 Nec Corp Semiconductor
JPS577158A (en) * 1980-06-17 1982-01-14 Nec Corp Semiconductor device
JPS5712765U (en) * 1980-06-24 1982-01-22

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52105423A (en) * 1976-03-01 1977-09-03 Shin Meiwa Ind Co Ltd Refuse treating apparatus for refuse collecting vehicle

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4835774A (en) * 1971-08-30 1973-05-26
JPS5691468A (en) * 1979-12-25 1981-07-24 Nec Corp Semiconductor
JPS577158A (en) * 1980-06-17 1982-01-14 Nec Corp Semiconductor device
JPS5712765U (en) * 1980-06-24 1982-01-22

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62168661U (en) * 1986-04-17 1987-10-26
JPH0442918Y2 (en) * 1986-04-17 1992-10-12

Also Published As

Publication number Publication date
JPH0247855B2 (en) 1990-10-23

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