JPS5924559B2 - Base material for printed wiring boards - Google Patents

Base material for printed wiring boards

Info

Publication number
JPS5924559B2
JPS5924559B2 JP3854881A JP3854881A JPS5924559B2 JP S5924559 B2 JPS5924559 B2 JP S5924559B2 JP 3854881 A JP3854881 A JP 3854881A JP 3854881 A JP3854881 A JP 3854881A JP S5924559 B2 JPS5924559 B2 JP S5924559B2
Authority
JP
Japan
Prior art keywords
printed wiring
copper
adhesive layer
copper foil
circuit pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3854881A
Other languages
Japanese (ja)
Other versions
JPS57153496A (en
Inventor
「巌」 本橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP3854881A priority Critical patent/JPS5924559B2/en
Publication of JPS57153496A publication Critical patent/JPS57153496A/en
Publication of JPS5924559B2 publication Critical patent/JPS5924559B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】 本発明は両面スルホール印刷配線板の製造に用いられる
基材の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in substrates used in the manufacture of double-sided through-hole printed wiring boards.

従来、両面スルホール印刷配線板の製造方法としては、
両面銅張積層板を出発基材としてエッチングにより造る
方法と、絶縁板両面に無電解めつき用接着剤層を被覆し
たものを出発基材として無電解めつき等により造る方法
が知られている。
Conventionally, the manufacturing method for double-sided through-hole printed wiring boards is as follows:
Two methods are known: one method is to manufacture by etching using a double-sided copper-clad laminate as a starting substrate, and the other is to manufacture by electroless plating, etc., using an insulating board coated with an adhesive layer for electroless plating on both sides as a starting substrate. .

しかしながら、これら両面銅張積層板、両面に接着剤層
を有する基材から造られた両面スルホール印刷配線板は
一長一短を有する欠点があつた。本発明は上記事情に鑑
みなされたもので、一方の面に銅箔が有することにより
高密度の回路パターン形成が可能で、他方の面に無電解
めつき用接着剤層を有することにより銅のエッチング廃
液の減少を可能として負荷コストの低減を達成し得る印
刷配線板用基材を提供しようとするものである。すなわ
ち、本発明は片面銅張絶縁板の非銅箔面にゴム粒子が均
一に分散jした熱硬化性樹脂を構成成分とする無電解め
つき用接着剤層を被着したことを特徴とするものである
。本発明における片面に銅箔が被着させた絶縁板として
は、例えば紙層フェノール樹脂積層板、紙層エポキシ樹
脂積層板、ガラス繊維入りフェノール樹脂積層板、ガラ
ス繊維入りエポキシ樹脂積層板、フェノール樹脂積層板
、エポキシ樹脂積層板ポリエステル樹脂積層板などの樹
脂積層板、或いはアルミナ板などのセラミック板等を挙
げることができる。
However, these double-sided copper-clad laminates and double-sided through-hole printed wiring boards made from base materials having adhesive layers on both sides have their own merits and demerits. The present invention was developed in view of the above circumstances, and it is possible to form a high-density circuit pattern by having copper foil on one side, and by having an adhesive layer for electroless plating on the other side. The object of the present invention is to provide a base material for a printed wiring board that can reduce the amount of etching waste liquid and reduce the load cost. That is, the present invention is characterized in that an adhesive layer for electroless plating comprising a thermosetting resin in which rubber particles are uniformly dispersed is adhered to the non-copper foil surface of a single-sided copper-clad insulating board. It is something. In the present invention, examples of the insulating board having copper foil adhered to one side include a paper-layer phenolic resin laminate, a paper-layer epoxy resin laminate, a glass fiber-containing phenol resin laminate, a glass fiber-containing epoxy resin laminate, and a phenol resin laminate. Examples include laminates, resin laminates such as epoxy resin laminates and polyester resin laminates, and ceramic plates such as alumina plates.

本発明における無電解めつき用接着剤層は無電解銅めつ
き層を絶縁板に対して強固に付着させる下地としての役
目をする。
The adhesive layer for electroless plating in the present invention serves as a base for firmly adhering the electroless copper plating layer to the insulating plate.

かかる接着剤の一構成成分であるゴム粒子としては、例
えば天然ゴム或いはアクリロニトリルゴム、プタジエン
ゴム、アクリロニトリル−プタジエンゴムなどの合成ゴ
ムから選ばれる1種又は2種以上の混合物からなるもの
等を挙げることができる。但し、このゴム粒子はクロム
酸−硫酸混液等の処理時において接着斉渚の粗面化に寄
与する観点から、接着剤層中に偏在せず、均一に分散し
ていることか必要である。また、接着剤の他の構成成分
である熱硬化性樹脂としては、例えばノボラック型フェ
ノール樹脂、レゾール型フェノール樹脂、キシレン樹脂
などのフェノール系樹脂、或いはエピクロルヒドリンと
ビスフェノールとの重縮合体、脂環エポキシ樹脂エポキ
シ化ポリプタジエン樹脂などのエポキシ系樹脂から選ば
れる1種又は2種以上の混合物を挙げることができ、特
にフェノール系樹脂とエポキシ系樹脂との混合物を用い
ることが望ましい。前記接着剤中の各成分の配合割合は
ゴム粒子25〜60重量%、熱硬化性樹脂75重量%以
下の範囲にすることが望ましい。なお、接着剤は上記二
成分の他、必要に応じてコーティング性、密着性を向上
するためのコロイド状シリカなどの無機質微粉末、或い
はゴム粒子の加硫剤である硫黄、促進剤であるメルカプ
タン系化合物などの添加剤を併用してもよい。しかして
、本発明の印刷配線板用基材は片面銅張絶縁板の非銅箔
面に無電解めつき用接着剤層を被着した構造であるため
、一方の銅箔を選択エツチングすることにより高密度の
回路パターンを形成できる。
Examples of rubber particles that are a component of such an adhesive include those made of one type or a mixture of two or more types selected from natural rubber or synthetic rubber such as acrylonitrile rubber, putadiene rubber, and acrylonitrile-ptadiene rubber. . However, from the viewpoint of contributing to roughening of the adhesive layer during treatment with a chromic acid-sulfuric acid mixture, etc., it is necessary that the rubber particles are not unevenly distributed in the adhesive layer but are uniformly dispersed. In addition, thermosetting resins that are other constituents of the adhesive include, for example, phenolic resins such as novolak type phenolic resin, resol type phenolic resin, and xylene resin, polycondensates of epichlorohydrin and bisphenol, and alicyclic epoxy resins. Resin Examples include one or a mixture of two or more epoxy resins such as epoxidized polyptadiene resins, and it is particularly desirable to use a mixture of a phenol resin and an epoxy resin. The blending ratio of each component in the adhesive is preferably in the range of 25 to 60% by weight of rubber particles and 75% by weight or less of thermosetting resin. In addition to the above two components, the adhesive may optionally contain inorganic fine powder such as colloidal silica to improve coating properties and adhesion, sulfur as a vulcanizing agent for rubber particles, and mercaptan as an accelerator. Additives such as system compounds may be used in combination. However, since the base material for printed wiring boards of the present invention has a structure in which an adhesive layer for electroless plating is adhered to the non-copper foil surface of a single-sided copper-clad insulating board, it is difficult to selectively etch one of the copper foils. This enables formation of high-density circuit patterns.

また、他方の接着剤層に無電解銅めつき等を施す、いわ
ゆるアデイテイブ法で処理することにより、多量の銅の
エツチング廃液を生じることなく回路パターンを形成で
きる。更に、銅箔の選択エツチングにより形成された回
路パターン側を半田付面となるように設計すれば、反対
側の回路パターンは接着剤層を介して形成されているた
め、半田付時の熱衝撃を該接着剤層で吸収でき半田付面
と反対側の回路パターンにクラツク等が発生するのを防
止できる。したがつて、本発明の基材を用いることによ
り銅箔の選択エツチングによる特長と接着剤層への無電
解めつきによる特長を備えた高信頼性、高密度の両面ス
ルホール印刷配線板を得ることができる。次に、本発明
の基材を両面スルホール印刷配線 Z板の製造に適用し
た例を図面を参照して説明する。
Further, by processing the other adhesive layer by electroless copper plating or the like using a so-called additive method, a circuit pattern can be formed without producing a large amount of copper etching waste liquid. Furthermore, if the circuit pattern side formed by selective etching of the copper foil is designed to be the soldering side, the circuit pattern on the opposite side is formed via an adhesive layer, so thermal shock during soldering can be avoided. can be absorbed by the adhesive layer, thereby preventing cracks from occurring in the circuit pattern on the side opposite to the soldering surface. Therefore, by using the base material of the present invention, it is possible to obtain a highly reliable, high-density double-sided through-hole printed wiring board that has the features of selective etching of the copper foil and the features of electroless plating on the adhesive layer. I can do it. Next, an example in which the base material of the present invention is applied to manufacturing a double-sided through-hole printed wiring Z board will be described with reference to the drawings.

実施例(i)まず、第1図に示すように紙−エポキシ樹
脂積層板1の片面に厚さ35μmの銅箔2を被着した、
いわゆる片面銅張積層板の非銅箔面に、アクリロニトリ
ルゴム40重量部、レゾール型フエノール樹脂20重量
部、ビスフエノール型エポキシ樹脂20重量部、シリカ
ゲル10重量部をメチルエチルケトン・ブチルセロソル
ブ混合溶剤で溶解した無電解めつき用接着剤を塗布し、
170℃、40分間乾燥して約30μmの接着剤層3を
形成し、印刷配線板用基材を作製した。
Example (i) First, as shown in FIG. 1, a copper foil 2 with a thickness of 35 μm was adhered to one side of a paper-epoxy resin laminate 1.
On the non-copper foil side of a so-called single-sided copper-clad laminate, 40 parts by weight of acrylonitrile rubber, 20 parts by weight of resol-type phenolic resin, 20 parts by weight of bisphenol-type epoxy resin, and 10 parts by weight of silica gel were dissolved in a mixed solvent of methyl ethyl ketone and butyl cellosolve. Apply electrolytic plating adhesive,
The adhesive layer 3 was dried at 170° C. for 40 minutes to form an adhesive layer 3 having a thickness of about 30 μm, thereby producing a substrate for a printed wiring board.

(11)次いで、上記基材の銅箔2の表面にスクリーン
印刷法にて回路パターン形成用のインクマスクを設けた
後、同マスクから露出した銅箔部分をエツチング除去し
、更にインクマスクを溶解除去して銅箔回路パターン4
を形成した(第2図図示)。
(11) Next, after providing an ink mask for forming a circuit pattern on the surface of the copper foil 2 of the base material by screen printing, the copper foil portion exposed from the mask is removed by etching, and the ink mask is further dissolved. Remove copper foil circuit pattern 4
was formed (as shown in Figure 2).

こうして形成された銅箔回路パターン4は銅箔2のみの
選択エツチングであるため極めて高密度のものであつた
。つづいて、銅箔回路パターン4のランド部4′を除く
部分にスクリーン印刷法にてソルダーレジスト膜5(太
陽インク(株)製商品名:S−20)を塗布した(第3
図図示)。ひきつづき、銅箔回路パターン4側の全面に
ローラーコータ法にてアルカリ可溶性被膜6(太陽イン
ク(株)製商品名:X一JモV)を塗布した(第4図図示
)。[1)次いで、第5図に示すようにランド部4′の
中央部分から接着剤層3に貫通する孔7をプレスパンチ
ングであけた。
The copper foil circuit pattern 4 thus formed had an extremely high density because only the copper foil 2 was selectively etched. Subsequently, a solder resist film 5 (product name: S-20 manufactured by Taiyo Ink Co., Ltd.) was applied to the portion of the copper foil circuit pattern 4 excluding the land portion 4' by screen printing (third
(Illustrated) Subsequently, an alkali-soluble coating 6 (trade name: X-JMoV, manufactured by Taiyo Ink Co., Ltd.) was applied to the entire surface of the copper foil circuit pattern 4 side using a roller coater method (as shown in Figure 4). [1] Next, as shown in FIG. 5, a hole 7 penetrating the adhesive layer 3 was punched from the center of the land portion 4' by press punching.

つづいて、クロム酸5009/1,硫酸2509/lの
混液中(液温4『C)で7分間処理して接着剤層3表面
を粗面化した後、米国シツプレ一社の無電解めつきに代
表されるプロセスに従つて表面にパラジウム触媒層8を
付着した(第6図図示)。
Subsequently, the surface of the adhesive layer 3 was roughened by treatment for 7 minutes in a mixed solution of 5009/1 chromic acid and 2509/l sulfuric acid (liquid temperature 4'C), and then electroless plating made by Shitsupre Co., Ltd. in the United States was applied. A palladium catalyst layer 8 was deposited on the surface according to the process typified by (FIG. 6).

この時、触媒層8は接着剤層3表面のみならず、孔7の
壁面及びアルカリ可溶性秘膜6表面にも付着した。ひき
つづき、出発基材をコンベアで移動させながら、アルカ
リ可溶性被膜6に苛性カリウム水溶液を2分間スプレー
して被膜6を溶解除去すると同時に、その表面のパラジ
ウム触媒層8を除去した後、米国マグダーミツト社の無
電解銅浴(商品名:9027)で処理した。この時、第
7図に示すようにパラジウム触媒層(以降は省略)が付
着された接着剤層3表面及ひ孔7壁面に厚さ1〜3μm
の無電解銅めつき膜9が選択的に析出し、これ以外のソ
ルダーレジスト膜5等には全く析出しなかつた。また、
前記被膜6の溶解除去は苛性カリ水溶液で行なうため、
露出した銅箔回路パターン4のランド部4′の腐蝕は起
きない。)次いで、第8図に示すように接着剤層3上の
無電解銅めつき膜9の回路パターン形成予定部以外にス
クリーン印刷法でインクマスク10を形成した後、硫酸
銅めつき浴中で電気銅めつき処理を施してランド部4′
、接着剤層3側の露出した無電解銅めつき膜9部分及び
孔7の無電解銅めつき膜9に厚さ30ttmの銅めつき
膜11を析出させ、更に硫酸錫めつき浴中で電気錫めつ
きを施して銅めつき膜11上に厚さ8μmの錫めつき膜
12を析出させた。
At this time, the catalyst layer 8 adhered not only to the surface of the adhesive layer 3 but also to the walls of the holes 7 and the surface of the alkali-soluble secret film 6. Subsequently, while moving the starting substrate on a conveyor, a caustic potassium aqueous solution was sprayed on the alkali-soluble coating 6 for 2 minutes to dissolve and remove the coating 6, and at the same time remove the palladium catalyst layer 8 on the surface. It was treated with an electroless copper bath (trade name: 9027). At this time, as shown in FIG. 7, a thickness of 1 to 3 μm is applied to the surface of the adhesive layer 3 and the wall surface of the hole 7 to which the palladium catalyst layer (hereinafter omitted) is attached.
The electroless copper plating film 9 was selectively deposited, and no deposit was made on other solder resist films 5 and the like. Also,
Since the coating 6 is dissolved and removed using a caustic potassium aqueous solution,
Corrosion of the exposed land portion 4' of the copper foil circuit pattern 4 does not occur. ) Next, as shown in FIG. 8, an ink mask 10 is formed on the adhesive layer 3 other than the area where the circuit pattern is to be formed on the electroless copper plating film 9 by a screen printing method, and then the ink mask 10 is formed in a copper sulfate plating bath. Land portion 4' is treated with electrolytic copper plating.
, a copper plating film 11 with a thickness of 30 ttm is deposited on the exposed portion of the electroless copper plating film 9 on the adhesive layer 3 side and on the electroless copper plating film 9 in the hole 7, and further in a tin sulfuric acid plating bath. A tin-plated film 12 having a thickness of 8 μm was deposited on the copper-plated film 11 by electro-tinning.

つづいて、接着剤層3側が上面となるようにコンベアで
移動させながら5%の苛性カリウム水溶液を2分間スプ
レーしてインクマスク10を溶解除去(第10図図示)
した後、更にアンモニウムアルカリ性銅エツチング液(
米国SCC社製商品名:Aプロセス液)を1分間スプレ
ーして露出する無電解銅めつき膜9をエツチング除去し
、接着剤層3側に錫めつき膜12で保護された回路パ汐
一ン13を形成して両面スルホール印刷配線板を製造し
た(第11図図示)。得られた両面スルホール印刷配線
板は片面に高密度の銅箔回路パターン4を有し、かつ反
対側の回路パターン13はいわゆるアデイテイブ法で形
成されるためエツチング廃液の負荷コストは両面銅張積
層板を用いた場合に比べて著しく軽減できた。
Next, the ink mask 10 is dissolved and removed by spraying a 5% caustic potassium aqueous solution for 2 minutes while moving it on a conveyor so that the adhesive layer 3 side is the top surface (as shown in Figure 10).
After that, add ammonium alkaline copper etching solution (
The exposed electroless copper plating film 9 is etched away by spraying the exposed electroless copper plating film 9 by spraying for 1 minute with A process liquid manufactured by SCC Corporation in the United States, and the circuit board protected by the tin plating film 12 on the adhesive layer 3 side is removed. A double-sided through-hole printed wiring board was manufactured by forming holes 13 (as shown in FIG. 11). The obtained double-sided through-hole printed wiring board has a high-density copper foil circuit pattern 4 on one side, and the circuit pattern 13 on the other side is formed by a so-called additive method, so the burden cost of etching waste liquid is lower than that of a double-sided copper-clad laminate. This was significantly reduced compared to when using .

また、両面スルホール印刷配線板の銅箔回路パターン4
側にフローソルダー処理したところ、半田ブリツジの発
生は同仕様の銅スルホーゾ印刷配線板と同様に全くなく
、かつ反対側の回路パターン13のクラツク発生も起き
なかつた。
In addition, copper foil circuit pattern 4 of double-sided through-hole printed wiring board
When the side was subjected to flow solder treatment, no solder bridging occurred at all, similar to the copper sulfo printed wiring board of the same specifications, and no cracks occurred in the circuit pattern 13 on the opposite side.

しかも、半田付面のソルダーレジスタ膜5の剥れや膨れ
も全くなかつた。更に、長期間保管後の半田付特性につ
いても従来の半田スルホール印刷配線板と同等の特性を
示した。以上詳述した如く、本発明によれば;方の面の
銅箔の選択エツチングによる細密な回路パターンを形成
できる特長と、無電解めつき用接着剤層への無電解めつ
きなどによる廃液負荷コストを低減して回路パターンを
形成し得る特長を備え、高信頼性、高密度の両面スルホ
ール印刷配線板の製造に有益な印刷配線板用基材を提供
できるものである。
Furthermore, there was no peeling or swelling of the solder resistor film 5 on the soldering surface. Furthermore, the soldering properties after long-term storage were comparable to those of conventional solder through-hole printed wiring boards. As detailed above, the present invention has the following features: It is possible to form a detailed circuit pattern by selectively etching the copper foil on one side, and the waste liquid load caused by electroless plating on the adhesive layer for electroless plating. It is possible to provide a base material for a printed wiring board, which has the feature that a circuit pattern can be formed at reduced cost and is useful for manufacturing a highly reliable, high-density double-sided through-hole printed wiring board.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第11図は本発明の印刷配線板用基材から両面
スルホール印刷配線板を製造する工程を示す断面図であ
る。 1・・・・・・紙−フエノール樹脂板、2・・・・・・
銅箔、3・・・・・・無電解めつき用接着斉暗、4,4
t・・・・・銅箔回路パターン、5・・・・・・ソルダ
ーレジスト膜、9・・・・・・無電解銅めつき膜、11
・・・・・・銅めつき膜、12・・・錫めつき膜、13
・−・・・・回路パターン。
1 to 11 are cross-sectional views showing the steps of manufacturing a double-sided through-hole printed wiring board from the substrate for printed wiring boards of the present invention. 1...Paper-phenol resin board, 2...
Copper foil, 3...Adhesive darkening for electroless plating, 4,4
t... Copper foil circuit pattern, 5... Solder resist film, 9... Electroless copper plating film, 11
......Copper plating film, 12...Tin plating film, 13
・−・・・Circuit pattern.

Claims (1)

【特許請求の範囲】[Claims] 1 片面銅張絶縁板の非銅箔面にゴム粒子が均一分散し
た熱硬化性樹脂を主成分とする無電解めつき用接着剤層
を被着したことを特徴とする印刷配線板用基材。
1. A base material for a printed wiring board, characterized in that an adhesive layer for electroless plating, the main component of which is a thermosetting resin in which rubber particles are uniformly dispersed, is adhered to the non-copper foil surface of a single-sided copper-clad insulating board. .
JP3854881A 1981-03-17 1981-03-17 Base material for printed wiring boards Expired JPS5924559B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3854881A JPS5924559B2 (en) 1981-03-17 1981-03-17 Base material for printed wiring boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3854881A JPS5924559B2 (en) 1981-03-17 1981-03-17 Base material for printed wiring boards

Publications (2)

Publication Number Publication Date
JPS57153496A JPS57153496A (en) 1982-09-22
JPS5924559B2 true JPS5924559B2 (en) 1984-06-09

Family

ID=12528338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3854881A Expired JPS5924559B2 (en) 1981-03-17 1981-03-17 Base material for printed wiring boards

Country Status (1)

Country Link
JP (1) JPS5924559B2 (en)

Also Published As

Publication number Publication date
JPS57153496A (en) 1982-09-22

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