JPS5923555A - フイルム・キヤリヤｌｓｉの実装方法 - Google Patents

フイルム・キヤリヤｌｓｉの実装方法

Info

Publication number
JPS5923555A
JPS5923555A JP13392882A JP13392882A JPS5923555A JP S5923555 A JPS5923555 A JP S5923555A JP 13392882 A JP13392882 A JP 13392882A JP 13392882 A JP13392882 A JP 13392882A JP S5923555 A JPS5923555 A JP S5923555A
Authority
JP
Japan
Prior art keywords
film carrier
lsi
film
positioning
mounting method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13392882A
Other languages
English (en)
Japanese (ja)
Other versions
JPH021371B2 (en:Method
Inventor
Masayuki Higuchi
樋口　正行
Masahiro Higami
日上　雅弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP13392882A priority Critical patent/JPS5923555A/ja
Publication of JPS5923555A publication Critical patent/JPS5923555A/ja
Publication of JPH021371B2 publication Critical patent/JPH021371B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
JP13392882A 1982-07-30 1982-07-30 フイルム・キヤリヤｌｓｉの実装方法 Granted JPS5923555A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13392882A JPS5923555A (ja) 1982-07-30 1982-07-30 フイルム・キヤリヤｌｓｉの実装方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13392882A JPS5923555A (ja) 1982-07-30 1982-07-30 フイルム・キヤリヤｌｓｉの実装方法

Publications (2)

Publication Number Publication Date
JPS5923555A true JPS5923555A (ja) 1984-02-07
JPH021371B2 JPH021371B2 (en:Method) 1990-01-11

Family

ID=15116351

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13392882A Granted JPS5923555A (ja) 1982-07-30 1982-07-30 フイルム・キヤリヤｌｓｉの実装方法

Country Status (1)

Country Link
JP (1) JPS5923555A (en:Method)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63152134A (ja) * 1986-12-17 1988-06-24 Hitachi Ltd 液晶表示装置
JPH07168199A (ja) * 1994-07-22 1995-07-04 Sharp Corp 表示装置
US5517036A (en) * 1992-10-30 1996-05-14 Mitsubishi Denki Kabushiki Kaisha Tape carrier, and test apparatus for the same
WO2002023617A1 (en) * 2000-09-12 2002-03-21 Mitsui Mining & Smelting Company, Ltd. Two-metal tab tape, double-sided csp tape, bga tape, and method for manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4983382A (en:Method) * 1972-11-18 1974-08-10
JPS544375A (en) * 1977-06-13 1979-01-13 Suwa Seikosha Kk Circuit substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4983382A (en:Method) * 1972-11-18 1974-08-10
JPS544375A (en) * 1977-06-13 1979-01-13 Suwa Seikosha Kk Circuit substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63152134A (ja) * 1986-12-17 1988-06-24 Hitachi Ltd 液晶表示装置
US5517036A (en) * 1992-10-30 1996-05-14 Mitsubishi Denki Kabushiki Kaisha Tape carrier, and test apparatus for the same
US5578919A (en) * 1992-10-30 1996-11-26 Mitsubishi Denki Kabushiki Kaisha Method of testing semiconductor device and test apparatus for the same
JPH07168199A (ja) * 1994-07-22 1995-07-04 Sharp Corp 表示装置
WO2002023617A1 (en) * 2000-09-12 2002-03-21 Mitsui Mining & Smelting Company, Ltd. Two-metal tab tape, double-sided csp tape, bga tape, and method for manufacturing the same
US6798048B2 (en) 2000-09-12 2004-09-28 Mitsui Mining & Smelting Company, Ltd. 2-Metal layer TAB tape and both-sided CSP•BGA tape

Also Published As

Publication number Publication date
JPH021371B2 (en:Method) 1990-01-11

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