JPS5922284A - Method for controlling power supply of magnetic bubble memory device - Google Patents

Method for controlling power supply of magnetic bubble memory device

Info

Publication number
JPS5922284A
JPS5922284A JP57129925A JP12992582A JPS5922284A JP S5922284 A JPS5922284 A JP S5922284A JP 57129925 A JP57129925 A JP 57129925A JP 12992582 A JP12992582 A JP 12992582A JP S5922284 A JPS5922284 A JP S5922284A
Authority
JP
Japan
Prior art keywords
circuit
power supply
power
magnetic bubble
bubble memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57129925A
Other languages
Japanese (ja)
Other versions
JPS6113317B2 (en
Inventor
Shigeru Takagi
茂 高木
Toshihiro Hoshi
星 敏弘
Shigeru Takai
高井 盛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57129925A priority Critical patent/JPS5922284A/en
Publication of JPS5922284A publication Critical patent/JPS5922284A/en
Publication of JPS6113317B2 publication Critical patent/JPS6113317B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements

Abstract

PURPOSE:To prevent large delay of access even if the greater part of power consumption is cut off to save the power, by constituting two power supply systems and providing a control circuit with a means to control the on/off the power supply sequentially or simultaneously in each power supply system in accordance with the access from the external. CONSTITUTION:The 1st system of power supply is a group consisting of a HR driving circuit 21 supplying electric power through a cut-off circuit 25 controlled by a control circuit 20a, a function driving circuit 22, a detecting circuit 23 and a timing circuit 20b and the 2nd system is a group consisting of a control circuit 20a to which electric power is directly supplied from a power supply switch 24 and an on/off circuit 25. Power supplying method to a memory device is the same as the ordinary method. In the waiting state, the control circuit 20a actuates the circuit 25 to cut off power supply. Every access from the external, the control circuit 20a supplies power to each circuit in suspending by the circuit 25 and supplies power to all circuits in the same manner as the ordinary method.

Description

【発明の詳細な説明】 (a)  発明の技術分野 本発明tよf+M気バブルメモリ装+1t(D東課制御
方式(b)  技術の背景 バブルメモリ素子は磁性薄膜の膜面に垂直パイ、アス磁
界をかけて得られる磁気バブルの有無を2進情報の1.
0に対応させ、この磁気バブルによる信号列にバイアス
磁界の局部的な勾配を与えてシフトさせ、所定のバブル
伝送路を転送する構成を有し、情報の保持に電源を不要
とする不揮発性の大容量シリアル磁性メモリ素子である
Detailed Description of the Invention (a) Technical Field of the Invention The present invention t + f + M bubble memory device + 1t (D East Section Control System (b) Background of the Technology Bubble memory elements have vertical pi and as Binary information 1. The presence or absence of magnetic bubbles obtained by applying a magnetic field.
0, the signal train generated by this magnetic bubble is shifted by applying a local gradient of a bias magnetic field, and is transmitted through a predetermined bubble transmission path. It is a large-capacity serial magnetic memory element.

(c)  従来技術と問題点 磁気バブルメモリ装置で通常用いられる構成としてメジ
ャマイナループ方式があげられる。磁気バブルメモリ装
置は磁気バブルメモリ素子とこれを駆動支援するための
諸回路部分よりなる。磁気バブルメモリ素子においてそ
の磁気バブル伝播面と並行面上に回転する磁界を複相の
コイルを駆動して1回転毎に一定方向に歩進することに
よりデータ伝播ループ(以下マイナループ)上あるいは
データ書込み/読取りループ(以下メジャループ)を伝
播させていく。第1図の従来および本発明の一実施例に
おける磁気バブル素子の構成図を示す。
(c) Prior Art and Problems The major minor loop method is a commonly used configuration in magnetic bubble memory devices. A magnetic bubble memory device consists of a magnetic bubble memory element and various circuits for driving and supporting the magnetic bubble memory element. In a magnetic bubble memory element, a magnetic field that rotates on a plane parallel to the magnetic bubble propagation plane drives a multi-phase coil and advances in a fixed direction every rotation, thereby creating a data propagation loop (hereinafter referred to as a "minor loop") or data writing. / Propagate the read loop (hereinafter referred to as the major loop). FIG. 2 shows a configuration diagram of the conventional magnetic bubble element in FIG. 1 and an embodiment of the present invention.

第1図において1,1aは磁気バブル発生器、2,2a
は書込みメジャループ、3は書込器、4,4aはマイナ
ループ、5.5aは読取りメジャループ、6は磁気バブ
ル複製器、7.7aは検出器、11は書込回路接続端子
、12は複製回路接続端子、13は検出読取回路接続端
子および14は消去回路接続端子である。発生器1で発
生源れた磁気バブルは書込みメジャルーブ2,2a上を
伝播していき、書込器(T)3の各位置に揃ったとき端
子11に電流が流され書込器(T)3が一斉に開かれて
書込メジャループ2.2a上の磁気バブルは各マイナル
ーブ4.4a上の旧情報と揃って置換され各マイカルー
プ4,4aK書込まれる。その後マイナループ4゜4a
上の磁気バブルは回転磁界に従って循環する。
In Fig. 1, 1 and 1a are magnetic bubble generators, and 2 and 2a are magnetic bubble generators.
is the write major loop, 3 is the writer, 4, 4a are the minor loops, 5.5a is the read major loop, 6 is the magnetic bubble replicator, 7.7a is the detector, 11 is the write circuit connection terminal, 12 is the replication circuit connection Terminals 13 and 14 are a detection and reading circuit connection terminal and an erase circuit connection terminal, respectively. The magnetic bubbles generated by the generator 1 propagate on the write measuring lube 2, 2a, and when they align at each position of the writer (T) 3, a current is applied to the terminal 11 and the writer (T) 3 are opened all at once, the magnetic bubbles on the write major loops 2.2a are replaced with the old information on each minor loop 4.4a, and each mica loop 4,4aK is written. After that, minor loop 4゜4a
The upper magnetic bubble circulates according to the rotating magnetic field.

またライナループ4,4a上の磁気バブルは複製器(B
)6の各位置に揃りた時端子12に電流を流してライナ
ループ4,4a上の磁気バブルは一斉に読取りメジャル
ープ5,5aに複製される。読取りメジャループ5,5
a上に複製された磁気バブルは検出器(D)7,7aに
達して拡大されると共に例えば磁気抵抗素子によって構
成される検出読取素子によりバブルの有無が”M気信号
の1.0に変換され読取端子13より送出される。寸だ
不要の磁気バブルは消去信号ym子14よりループに与
える通電の垂直反磁界によって消去することが出来る。
In addition, the magnetic bubbles on the liner loops 4 and 4a are connected to the replicator (B
) 6, a current is applied to the terminal 12, and the magnetic bubbles on the liner loops 4, 4a are read all at once and replicated in the measure loops 5, 5a. Read measure loop 5,5
The magnetic bubble replicated on the surface a reaches the detectors (D) 7, 7a and is enlarged, and the presence or absence of the bubble is converted into a 1.0 M signal by a detection reading element constituted by, for example, a magnetoresistive element. The magnetic bubbles are sent out from the read terminal 13. Any unnecessary magnetic bubbles can be erased by the perpendicular demagnetizing field applied to the loop by the erase signal ym element 14.

磁気バブルメモリ装置は更に第2図の従来における磁気
バブルメモリ装造によるブロック図に示す通り拍数また
け複数の磁気バブルメモリ素子10を駆動するため種々
の回路を備えている。図において10は磁気バブルメモ
リ素子、20は1fIIJ伺1部。
The magnetic bubble memory device further includes various circuits for driving a plurality of magnetic bubble memory elements 10 at different times, as shown in the block diagram of a conventional magnetic bubble memory device in FIG. In the figure, 10 is a magnetic bubble memory element, and 20 is a part of 1fIIJ.

20aは制御回路、 20bはタイミング回路、21は
回転磁界(HR)駆動回路、22はファクション、駆動
回路、23は検出回路および24は電源スィッチである
。制御回路20aは外部からの各制御信号を受信して解
読し、後述する各回路へのタイミング回路20aを介し
ての波形制御、マイナループ4.4a上の磁気バブルの
位置の管理同期制御、磁気バブルメモリ菓子に書込まれ
ている欠陥マイナループの位置情報を保持し、読取り、
書込みに除して欠陥位置に関する無効処理作業を行う。
20a is a control circuit, 20b is a timing circuit, 21 is a rotating magnetic field (HR) drive circuit, 22 is a function and drive circuit, 23 is a detection circuit, and 24 is a power switch. The control circuit 20a receives and decodes each control signal from the outside, and controls the waveform via the timing circuit 20a to each circuit described later, manages and synchronizes the position of the magnetic bubble on the minor loop 4.4a, and controls the magnetic bubble. Retains and reads position information of defective minor loops written in memory confectionery,
In addition to writing, invalidation processing regarding defect positions is performed.

タイミング回路20bは制御回路20aの制御データに
従い予め設定されたシーケンスに従うタイミング制御を
行う。HR駆動回路は磁気バブルメモリ素子における磁
気バブルを歩進させる面内回転磁界を発生するための例
えば2相コイルを駆動する回路である。ファンクション
駆動回路22はタイミング回路20bのタイミング信号
に従って書込、消去、複製信号−を磁気バブルメモリ素
子10に送出し各機能を行わせる。検出回路23は磁気
バブルメモリ素子10よりの検出信号を論理レベルに増
幅整形して制御回Wr 20 aに送出する。電源スィ
ッチ24は以上の回路動作に必要な単数または複数の電
源ソースを開閉する。こ\で従来のイ1餞気バブルメモ
リ装置においては電源スィッチ24をメンにするとすべ
ての各回路に電源が供給され動作状態になる。この時磁
気バブルメモリ装置はシリアルメモリであるため書込み
読取り動作を行う前初期化操作としてデータをマイナル
ープ4゜4aの順環するどの位置に書込むかあるいはめ
るかを検出するだめ電源投入と共に予め用意して記憶さ
せであるデータの位1凌通常頭出しの例えば0番地の位
11ftを示すマーカ用マイナルーブの磁気バブルを検
出1〜てili制御回路20aに備えた磁気バブルの位
置の管理制御機能と位置合せを行う。また同時に磁気バ
ブルメモリ素子の欠陥マイナループの位1自111f報
な読出して制御回路20a内に記憶保持する。
The timing circuit 20b performs timing control according to a preset sequence according to control data from the control circuit 20a. The HR drive circuit is a circuit that drives, for example, a two-phase coil to generate an in-plane rotating magnetic field that advances the magnetic bubble in the magnetic bubble memory element. The function drive circuit 22 sends write, erase, and copy signals to the magnetic bubble memory element 10 in accordance with the timing signal from the timing circuit 20b to cause the magnetic bubble memory element 10 to perform each function. The detection circuit 23 amplifies and shapes the detection signal from the magnetic bubble memory element 10 to a logic level and sends it to the control circuit Wr 20 a. The power switch 24 opens and closes one or more power sources necessary for the above circuit operation. In the conventional air bubble memory device, when the power switch 24 is turned on, power is supplied to all the circuits and the device becomes operational. At this time, since the magnetic bubble memory device is a serial memory, as an initialization operation before performing a write/read operation, it is necessary to detect in which position in the order of the minor loop 4゜4a the data is to be written or placed. A magnetic bubble position management control function provided in the control circuit 20a detects a magnetic bubble of a minor lube for a marker indicating the 11ft position of the 0 address, for example, for normal cueing of data prepared and stored. Perform alignment. At the same time, information on the defective minor loop of the magnetic bubble memory element is read out and stored in the control circuit 20a.

以上の電源投入時における初期化動作を行って磁気バブ
ルメモリ装置はレディとなり外部よりの書込みT売出し
に伴うアクセスの制御信号が来る迄待機状態となる。制
御回路20aは外部より制御信号を受けるとHR駆動回
路21.ファンクシ四ン駆動回)l′822および検出
回路23ヘタイミング回:t820 b経由制御信号を
送出し、制御回路20aは情報位置の管理、磁気バブル
の書込み、検出。
After performing the above-mentioned initialization operation when the power is turned on, the magnetic bubble memory device becomes ready and remains in a standby state until an access control signal is received from the outside in response to a write T sale. When the control circuit 20a receives a control signal from the outside, the HR drive circuit 21. The timing circuit 20a sends out a control signal via timing circuit t820b to the function drive circuit 1'822 and the detection circuit 23, and the control circuit 20a manages the information position, writes and detects magnetic bubbles.

消去およびマイナループ欠陥の割例等を行って動作を終
了させ再び待機状態となる。
After erasing and dividing the minor loop defects, the operation is terminated and the process returns to a standby state.

こ\で待機状態においては(磁気バブルメモリ素子はi
電源を必要としない不揮発性メモリであり、他のICメ
モリ等と異なりデータの保持に電力を必要としないが磁
気バブルメモリ装置としては周辺の各回路に′電源が供
給されていて電力を消費している。この待機状態におい
ては−Lj @、源を切断することが出来るが、外部か
らアクセスを受けたときに制御信号に従って智込み読取
り動作する迄には前述の初期化動作を必要とし、アクセ
スが大きく遅れる欠点があった。
In this case, in the standby state (the magnetic bubble memory element is
It is a nonvolatile memory that does not require a power supply, and unlike other IC memories, it does not require power to retain data, but as a magnetic bubble memory device, power is supplied to each peripheral circuit, so it consumes no power. ing. In this standby state, the -Lj@ source can be disconnected, but when access is received from the outside, the above-mentioned initialization operation is required before the intelligent read operation can be performed according to the control signal, resulting in a significant access delay. There were drawbacks.

(d)発明の目的 本発明の目的は上記の欠点を除去するため待機状態にお
ける電力消費の大部分を切断しで省阿、力化を行っても
アクセスを大きく遅らせることのない手段を提供しよう
とするものである。
(d) Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks by cutting off most of the power consumption in the standby state, thereby providing a means that does not significantly delay access even when energy is saved and power is saved. That is.

(e)  発明の構成 この目的は単数または接舷の磁気バブルメモリ素子およ
び該素子を駆動する周辺部各回路ならびに制御部回路を
備えた磁気バブルメモリ装置において、磁気バブルメモ
リ素子の回転磁界、1駆動回路。
(e) Structure of the Invention The object of the present invention is to provide a magnetic bubble memory device comprising a single or parallel magnetic bubble memory element, peripheral circuits for driving the element, and a control circuit. drive circuit.

ファンクション駆動回路、磁気バブル検出回路および制
御部のタイミング回路と該各回路に要する単数゛または
複数の第1の電源供給手段、残りの制御部の制御回路と
該制御回路に要する単数または複数の第2の電源供給手
段の2電源系列を構成し、制御回路は外部よりのアクセ
スに匠い電源系列別に11日序または同時に電源の印加
・切断制御する手段を備えたことを特徴とする磁気バブ
ルメモリ装置のr+j源制御方式を提供することによっ
て達成することが出来る。
A function drive circuit, a magnetic bubble detection circuit, a timing circuit for the control section, one or more first power supply means required for each circuit, a control circuit for the remaining control section, and one or more first power supply means required for the control circuit. 2. A magnetic bubble memory comprising two power supply series of the second power supply means, and the control circuit is equipped with a means for controlling application and disconnection of the power supply in 11 days or simultaneously for each power supply series in a manner that is easy to access from the outside. This can be achieved by providing an r+j source control scheme for the device.

(f)  発明の実施クリ 以下本発明の一実施例について図面を参照しつ\説明す
る。第3図は本発明の一実施例における磁気バブルメモ
リ装置の電源制御方式によるブロック図を示す。図にお
いて10は磁気バブルメモリ素子、20は制御部、20
aは制御回路、20bはタイミング回路、21はHR駆
動回路、22はファンクション駆動回路、23は検出回
路、24は電源スィッチおよび25は印加・切断回路で
ある。
(f) Implementation of the Invention An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 shows a block diagram of a power supply control system for a magnetic bubble memory device according to an embodiment of the present invention. In the figure, 10 is a magnetic bubble memory element, 20 is a control unit, 20
a is a control circuit, 20b is a timing circuit, 21 is an HR drive circuit, 22 is a function drive circuit, 23 is a detection circuit, 24 is a power switch, and 25 is an application/cutoff circuit.

図の各符号において第2図と共通符号の構成部材は前出
と共通の機能を有する。第1図に示すように本発明にお
いて電源の供給は2系列に分割されて構成され、その第
1系列は制御回路20aの制御に従って動作する印加・
切断回路を経由して′電源を供給されるI(R駆動回路
21.ファンクション駆動回路22.検出回路23およ
びタイミング回路20bのグループであり、第2系列は
電源スィッチ24の開閉によって直接電源を供給される
制御回路20aおよび切断・印加回路25のグループで
ある。こ\で磁気バブルメモリ装置の電源投入は従来と
同様に当り全回路に電源を供給して制御回路20aは初
期動作を行わせる。以後待機状態では制御回路20aは
印加・切断回路25を作動させて電源供給を切断する。
In each reference numeral in the figure, constituent members having the same reference numerals as those in FIG. 2 have the same functions as those described above. As shown in FIG. 1, in the present invention, the power supply is divided into two systems, the first system being an application power supply that operates under the control of the control circuit 20a.
This is a group of I (R drive circuit 21, function drive circuit 22, detection circuit 23, and timing circuit 20b) that is supplied with power via a disconnection circuit, and the second series is directly supplied with power by opening and closing the power switch 24. This group includes the control circuit 20a and the cutting/applying circuit 25.The magnetic bubble memory device is turned on in the same way as in the conventional case, and power is supplied to all the circuits, and the control circuit 20a performs the initial operation. Thereafter, in the standby state, the control circuit 20a operates the application/cutoff circuit 25 to cut off the power supply.

そして外部よりアクセスの都度制御回路20aは印加Φ
切断回路25により休止中の各回路に電源供給を行って
従来と同様に全回路に電源を供給し書込み、読取り動作
を行わせる。このようにすれば待機状態においては第1
系列における各回路の電力消費をOとして節減し、制御
回路20aの制御による全回路電源投入時には従来と同
様制御回路20aにおいて磁気バブルの位置情報やマイ
ナループの欠陥情報が保持されており全機能が作動する
ので電源供給により立上り後従来と同様書込み、読取り
動作を行うことが出来る。
Then, each time an access is made from the outside, the control circuit 20a applies the voltage Φ
The disconnection circuit 25 supplies power to each circuit that is inactive, and supplies power to all circuits to perform write and read operations as in the conventional case. In this way, the first
The power consumption of each circuit in the series is reduced to O, and when all circuits are powered on under the control of the control circuit 20a, the control circuit 20a retains the position information of the magnetic bubble and the defect information of the minor loop, and all functions are activated. Therefore, writing and reading operations can be performed in the same way as in the conventional case after power is supplied.

(g)  発明の詳細 な説明したように本発明によれば磁気バブルメモリ装置
の未使用時におけるデータの保持用電力が不必璧という
特徴に加えて、装置の動作中においても従来と同様に外
部からのアクセスに対して書込み、読取り動作を損うこ
となく待機中は回路の電力消費を節減出来る電源制御方
式が得られるので有用である。
(g) As described in detail, according to the present invention, in addition to the feature that the magnetic bubble memory device requires unnecessary power for data retention when it is not in use, it also requires no external power while the device is in operation. This is useful because it provides a power control scheme that can reduce the power consumption of the circuit during standby without impairing write and read operations for accesses from.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来および本発明の一実施例における磁気バブ
ルメモリ素子の構成図、第2図は従来における磁気バブ
ルメモリ装置によるブロック図および第3図は本発明の
一実施例における磁気ノ(プルメモリ装置の電源制御方
式によるブロック図を示す。図において10は磁気バブ
ルメモリ素子。 20aは制御回路、20bはタイミング回路、21は回
転磁界駆動回路、22はファンクシ、ン駆動回路、23
は検出回路、、−24は電源スィッチおよび25は印加
切断回路である。 2′1  図
FIG. 1 is a block diagram of a conventional magnetic bubble memory device and an embodiment of the present invention, FIG. 2 is a block diagram of a conventional magnetic bubble memory device, and FIG. 3 is a block diagram of a magnetic bubble memory device according to an embodiment of the present invention. A block diagram of the power supply control system of the device is shown. In the figure, 10 is a magnetic bubble memory element. 20a is a control circuit, 20b is a timing circuit, 21 is a rotating magnetic field drive circuit, 22 is a funxion drive circuit, 23
, -24 is a power switch, and 25 is an application/cutoff circuit. 2'1 Figure

Claims (1)

【特許請求の範囲】[Claims] 部数または複数の磁気バブルメモリ素子および該素子を
駆動する周辺部各回路ならびに制御卸部回路を備えた磁
気バブルメモリ装置において、磁気バブルメモリ素子の
回転磁界駆動回路9.フプンクシ璽ン駆−動回路、磁気
パズル検出回路および制御部のタイミング回路と該各回
路に要する嚇数または複数の第1の電源供給手段、残り
の制御部の制御回路と該匍」鐸回路に要する嚇数またけ
収斂の第2の電源供給手段の2電源系列を構成し、制御
回路は外部よシのアクセスに従い屯源系列別に順序また
は同時に電源の印加・切断制御する手段を備えたことを
特徴とする磁気バブルメモリ装置の畦源制御方式。
In a magnetic bubble memory device comprising a number or plurality of magnetic bubble memory elements, peripheral circuits for driving the elements, and a control circuit, a rotating magnetic field drive circuit for the magnetic bubble memory element 9. The power supply circuit for the Fupunkushi pin drive circuit, the magnetic puzzle detection circuit, the timing circuit for the control section, the number or plurality of first power supply means required for each circuit, the control circuit for the remaining control section, and the timing circuit for the control section. The second power supply means converges over the required number of threats, and the control circuit comprises means for sequentially or simultaneously controlling the application and disconnection of power for each power supply series according to external access. Features a ridge control method for magnetic bubble memory devices.
JP57129925A 1982-07-26 1982-07-26 Method for controlling power supply of magnetic bubble memory device Granted JPS5922284A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57129925A JPS5922284A (en) 1982-07-26 1982-07-26 Method for controlling power supply of magnetic bubble memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57129925A JPS5922284A (en) 1982-07-26 1982-07-26 Method for controlling power supply of magnetic bubble memory device

Publications (2)

Publication Number Publication Date
JPS5922284A true JPS5922284A (en) 1984-02-04
JPS6113317B2 JPS6113317B2 (en) 1986-04-12

Family

ID=15021799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57129925A Granted JPS5922284A (en) 1982-07-26 1982-07-26 Method for controlling power supply of magnetic bubble memory device

Country Status (1)

Country Link
JP (1) JPS5922284A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59152579A (en) * 1983-02-18 1984-08-31 Fujitsu Ltd Magnetic bubble storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59152579A (en) * 1983-02-18 1984-08-31 Fujitsu Ltd Magnetic bubble storage device

Also Published As

Publication number Publication date
JPS6113317B2 (en) 1986-04-12

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