JPS59218738A - Semiconductor element - Google Patents

Semiconductor element

Info

Publication number
JPS59218738A
JPS59218738A JP9235883A JP9235883A JPS59218738A JP S59218738 A JPS59218738 A JP S59218738A JP 9235883 A JP9235883 A JP 9235883A JP 9235883 A JP9235883 A JP 9235883A JP S59218738 A JPS59218738 A JP S59218738A
Authority
JP
Japan
Prior art keywords
resin
represented
semiconductor device
formula
triazine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9235883A
Other languages
Japanese (ja)
Inventor
Teru Okunoyama
奥野山　輝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Chemical Products Co Ltd
Kyocera Chemical Corp
Original Assignee
Toshiba Chemical Products Co Ltd
Toshiba Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Chemical Products Co Ltd, Toshiba Chemical Corp filed Critical Toshiba Chemical Products Co Ltd
Priority to JP9235883A priority Critical patent/JPS59218738A/en
Publication of JPS59218738A publication Critical patent/JPS59218738A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To improve the reliability of a moisture resistance, hydrolysis resistance and bondability of a semiconductor element and to reduce variation in VF characteristics due to the manufacturing process by employing a specific conductive adhesive in the bonding of a semiconductor chip to a leadframe. CONSTITUTION:A semiconductor chip and a leadframe are bonded by a conductive adhesive which as a resin A including as main ingredients bismaleimide and triazine resin monomer, a liquid epoxy resin B at ambient temperature, and conductive powder C. The mixing ratio of the resin A with the resin B is preferably 10:90-90:10 (by weight). The resin A contains bismaleimide represented by a formula I , and a triazine resin (wherein, Ar1, and Ar2 represent bivalent aromatic group) having a constitutional formula, for example, represented by the formula III having three molecules and more of dicyanate represented by NidenticalC-O- Ar2-O-CidenticalN cyclically polymerized a triazine ring (formula II) in the molecule and a cyanate group (NidenticalC-O-) at the end of the molecule.

Description

【発明の詳細な説明】 １発明の技術分野］ 本発明は、耐湿（Ｍ頼性、耐加水分解性、接着性及びＶ
Ｆ　　（順方向電［＞特性の優れた半導体素子に関りる
。Detailed Description of the Invention 1 Technical Field of the Invention The present invention provides moisture resistance (M reliability, hydrolysis resistance, adhesion and V
F (Related to semiconductor devices with excellent forward electric properties.

［発明の技術的背景とイの問題点］ ４２７０イや樹脂基板上にへ〇メッキがなされｌ〔各種
のリードル−ム上の所定部分にＩＣ１Ｌ　Ｓ　Ｉ　Ｗの
半導体チップを接続する工程は、素子の長期信頼性に影
Ｙ１！を与える重要な工程の一つである。　従来より、
この方法としては、チップ裏面の８１をリードル−ム上
のＡｕメッキ面に加熱圧着し、ＡＵ−８ｉの共晶法が主
流であった。[Technical Background of the Invention and Problems of A] The process of connecting the IC1L SI W semiconductor chip to a predetermined portion on various lead rooms is performed on a 4270I or resin substrate. Y1 has a negative impact on the long-term reliability of Y1! It is one of the important processes that gives Traditionally,
The mainstream method for this was the eutectic method of AU-8i, in which the back surface of the chip 81 was hot-pressed to the Au-plated surface on the lead room.

しかし、近年のＬＬｉ金属、特にＡｕの高騰を契機どし
て、樹脂モールド半導体素子では、へ〇−８ｉ共晶法か
ら、ハンダを使用する方法、導電性接着剤を使用づ−る
方法等に急速に移行しつつある。However, due to the recent rise in the price of LLi metals, especially Au, resin-molded semiconductor devices have changed from the 0-8i eutectic method to methods using solder, conductive adhesives, etc. It is rapidly transitioning.

ハンダを使用りる方法は、一部実用化されているがハン
ダやハンダボールが飛散して電極等に付着し、腐食断線
の原因となる可能性が指摘されている。　一方、導電性
接着剤を使用する方法では、通常Ａ＜Ｊ粉末を配合した
エポキシ樹脂が用いられて、約１０汀程前から一部実用
化されてきたが、信頼性の面で△ｕ−３ｉの共晶を生成
させる共晶法に比較して満足Ｊべきものがなかった１、
　導電ｔ４Ｉ接肴剤を使用づる場合は、ハンダ法に比べ
（耐熱性に優れる等の長所を有しているがその陵面、樹
脂やその硬化剤が半導体素子接着用として作られたもの
でないために、ＡＩ電極の腐食を促進しＩＩＪｉ線不良
の１車内となる場合が多く、素子の信頼性はΔｕ−３ｉ
共品法に比べて劣っていた。　さらに従来の導電性接着
剤を使用した半導体素子の場合は、素子の製造］−程の
違いによりＶＦ特性が悪くなることがあり問題であった
。Some methods using solder have been put into practical use, but it has been pointed out that the solder and solder balls may scatter and adhere to electrodes, etc., causing corrosion and disconnection. On the other hand, in the method of using conductive adhesive, an epoxy resin containing A<J powder is usually used, and it has been partially put into practical use for about 10 years, but in terms of reliability, △u- Compared to the eutectic method that produces 3i eutectic, there was no satisfactory result1.
When using conductive T4I adhesive, it has advantages over soldering (such as superior heat resistance), but it is difficult to use because the resin and its curing agent are not made for bonding semiconductor devices. In many cases, the corrosion of the AI electrode is promoted and the IIJi wire is defective in one car, and the reliability of the element is reduced to Δu-3i.
It was inferior to the Kyodo Law. Furthermore, in the case of semiconductor devices using conventional conductive adhesives, there is a problem in that the VF characteristics may deteriorate due to differences in the manufacturing process of the device.

［発明の目的］ 本発明は、従来の欠点を除去した新規な導電性接着剤を
使用した半導体素子で耐湿信頼ｆ１を大幅に向上できる
とともに、耐加水分解性、接着性に優れ、製造工程によ
るＶＦ特性の変動を低減（゛きる半春体素子を提供り”
ることを目的としでいる。[Objective of the Invention] The present invention is a semiconductor device using a new conductive adhesive that eliminates the drawbacks of conventional adhesives, which can significantly improve moisture resistance reliability f1, has excellent hydrolysis resistance and adhesive properties, and has Reduces fluctuations in VF characteristics (providing a semi-spring element that can
The purpose is to

［発明の概要］ 上記の目的を達成すべく鋭意研究を＋４１ねた結果、後
述り゛る半導体素子が従来のものに比べて耐湿信頼性、
耐加水分解・凶、接着性及びＶＦ特性に優れていること
を見い出したものである。[Summary of the Invention] As a result of 41+ years of intensive research to achieve the above object, the semiconductor device described below has improved moisture resistance and reliability compared to conventional devices.
It was discovered that it has excellent hydrolysis resistance, adhesiveness, and VF properties.

即ち、本発明（Ｊｌ、（ａ）ヒスマレイミドとトリアジ
ン樹脂上ノン−とを主成分とする樹脂と、（ｂ）常温で
液状のエポキシ樹脂と、＜Ｇ　）導電性粉末とを含有り
る導電性接着剤で半導体チップとリードフレームとを接
着することを特徴とする半導体素子（・ある、。That is, the present invention (Jl) contains (a) a resin mainly composed of hismaleimide and triazine resin, (b) an epoxy resin that is liquid at room temperature, and <G) a conductive powder. A semiconductor device characterized by bonding a semiconductor chip and a lead frame with a adhesive.

本発明に使用りる（ａ）ビスマレイミドと１〜リアジン
樹脂七ノン−とを主成分とり−る樹脂は、一般式 で表されるビス７レイミドと、 一般式Ｎ＝Ｃ−○−Ａｒ　、−０−Ｃ＝Ｎ　　　で表さ
れるジシアネ−１〜が３分子以上環化重合した、分子中
に１〜リアジン環 を有し、分子末端にシアネート基（Ｎ　＝　（’；−０
−）を有する、例えば次のような構造式をイー］りる１
〜リアジン樹脂 （但し、△ｒｌ、Ａｒ２は同−又は異なる２価の芳香族
阜を示す）とから成るものを挙げることができる。　こ
のような樹脂とし−Ｃは、例λぽ一：菱瓦斯化学社製Ｂ
ルジン（商品名）がある。The resin used in the present invention (a) whose main components are bismaleimide and 1-riazine resin heptano- is bis-7reimide represented by the general formula, N=C-○-Ar, -0-C=N Three or more molecules of dicyanene-1~ are cyclopolymerized, each molecule has 1~lyazine ring, and a cyanate group (N=(';-0
-), for example, the following structural formula is
- riazine resin (where Δrl and Ar2 represent the same or different divalent aromatic resins). Such a resin Toshi-C is an example of λPoichi: B manufactured by Ryogas Chemical Co., Ltd.
Lugin (product name) is available.

Ｂ］−レジンとしではＢ　Ｔ　２１００　、　ＢＴ　２
３　Ｑ　Ｏ。B]-Resin BT 2100, BT 2
3 Q O.

ＢＴ２４００．１３ｒ２１７０．ＢＴ２／１７０゜８丁
３１３０等が挙げられる。BT2400.13r2170. Examples include BT2/170°8-3130.

本発明に使用−りる（ｂ）常温Ｃ′液液状エポキシ樹脂
どしくは、上葉生産されているものとしく、例えばシェ
ル化学ネ１製上ビー］　−１”　（Ｆ　ｐｉｋｏｔｅ）
８２８、土ビロー１−８２７等のビス７１ノールΔ型土
ボキシ仔４脂、タ゛イレル化学工業礼製の（？１」キザ
イド２０２′１（商品名）、ユニメンカーバイド社製の
［１で１４２２１．［ヨＲＬ−−４２９９，［ＥＲｌ　
　４２３４　、　ｌ−Ｒｌ　　４２０６　（商品名）等
のシクＬ１系１−ボ４シ樹脂及びぞの他ビスフェノール
ＦＥ型］−ポギシ樹脂等が挙げられる。　以上のエポキ
シ樹脂はそれそｊｌ　ｉｌｉ独又は２種以−に混合して
使用される。The liquid epoxy resin used in the present invention (b) room temperature C' liquid should be produced in the form of a top layer, for example, a top layer made of Shell Chemical Net 1] -1" (F pikote)
828, Bis71nol Δ type soil boxy 4 fat such as soil billow 1-827, (?1) Kizide 202'1 (trade name) manufactured by Tyrel Chemical Industry Co., Ltd., and [14221. [YoRL--4299, [ERl
4234, l-Rl 4206 (trade name), and other bisphenol FE-type resins. The above epoxy resins may be used individually or in combination of two or more.

（ａ　）ビスマレイミドとトリアジン樹脂上ツマ−とを
主成分どりる樹脂と、（ｂ）常温ぐ液状の１ボキシ樹脂
どの配合割合は、１０　：　９０〜９０：１０（重量比
）の範囲か望ましく、好ましくは３０ニア０〜７０：３
（１（重量比）の範囲にあることがよい。(a) A resin whose main components are bismaleimide and a triazine resin, and (b) a liquid 1-boxy resin that can be heated at room temperature. The blending ratio is preferably in the range of 10:90 to 90:10 (weight ratio). , preferably 30 nia 0 to 70:3
(The weight ratio is preferably in the range of 1 (weight ratio).

（ａ）ビスマレイミドとトリアジン樹脂上ツマ−とを主
成分どづる樹脂の配合割合が１０＠量部未満では得られ
る導電＝１４１１０００耐熱性が劣り、熱時の強度が低
下し、反対に（ｂ）常湿Ｃ′液液状エポキシ樹脂の配合
割合が１０重量部末ｉ：ｔ：＋て１４１＊Ｉ脂の粘度が
高く作業性が悪くなる。　従・）−（上記範囲内にある
ことが好ましい。(a) If the blending ratio of the resin mainly consisting of bismaleimide and triazine resin is less than 10 parts, the obtained conductivity = 1411000, the heat resistance will be poor, the strength when hot will be reduced, and on the contrary (b ) Normal humidity C' liquid When the blending ratio of the liquid epoxy resin is 10 parts by weight i:t:+, the viscosity of the 141*I fat is high and the workability is poor. - (preferably within the above range).

本弁明に使用Ｊる（Ｃ）導電＋＜ｉ粉末どじＣは、フし
ノーク状、球状あるいは樹脂二＋−ｌ−されたｉ１７均
粒径１０μ以下の銀、銅等の金属粉末を使用ＣＪること
が好ましい。(C) Conductive +<i powder used in this defense C is metal powder such as silver or copper with an average particle size of 10μ or less that is shaped like a metal foil, spherical, or made of resin.CJ It is preferable that

＜Ｃ＞Ｖ＋電ｆｌ粉末と（ａ　）ビスンレイミ１〜と１
〜リアジン樹脂七ツマ−を主成分とする１ｂ・１脂及び
（１１）常温で液状の−［ボキシ樹脂どを含イｊづる樹
脂成分どの配合割合は、　６０：４０−９０　：　１０
　＜　ｒ＋ｉら１比）がよい。　導電性粉末が６０重ψ
部未１ｉ）ｉ　’Ｃあるど満足／、に導電性がＩＩられ
ず、また９０市屯部を越えると作業性や半導体チップど
のなし１ノが悪くなり好ましくない。<C> V + electric fl powder and (a) Bisunreimi 1 to 1
The blending ratio of resin components including 1b and 1 fats whose main components are riazine resin and (11) boxy resin, etc., which is liquid at room temperature, is 60:40-90:10
<r+i et al. 1 ratio) is better. Conductive powder weighs 60 ψ
The conductivity is unsatisfactory, and if it exceeds 90%, the workability and the loss of semiconductor chips deteriorate, which is not desirable.

本発明にＪ３いＣは以上の成分の他に、粘１衰を調１１
ζづる目的でモノエポキシ化合物や有機溶剤を導電性接
着剤１００巾量部に対しで１（）％以内の範囲で所望に
応じて使用することもできる。In addition to the above-mentioned components, J3C in the present invention has viscosity
If desired, a monoepoxy compound or an organic solvent may be used for the purpose of bonding, within a range of 1% or less based on 100 parts by weight of the conductive adhesive.

本発明の半導体素子は、常、法に従い上述した樹脂及び
導電性粉末を十分に混合した後、更に例えば三本ロール
にＪ、る混練処理を施し、得られた導電性接着剤をル゛
−ム上にディスペンサー、スクリーン印刷（幾又はビン
転写機等を用いて必要量塗布した後、半導体チップをマ
ウントしＣフレームとチップを接着して作製づる。　そ
の後更に金線やアルミ線でワイヤーボンディングを行い
、次いで半導体素子を封止り−ればよい。The semiconductor device of the present invention is usually produced by sufficiently mixing the above-mentioned resin and conductive powder according to a method, and then subjecting the resulting conductive adhesive to a kneading process, for example, using a three-roll roll. After applying the required amount onto the C frame using a dispenser, screen printing (or a bottle transfer machine, etc.), the semiconductor chip is mounted and the chip is bonded to the C frame. After that, wire bonding is performed using gold wire or aluminum wire. The semiconductor device may then be sealed.

゛［光明の効果］ 本発明の半導体素子は、新規な導電性接着剤を用いて半
導体チップとリードフレームとを接着したことによって
接着性特に水接着剤塗布後長時間経過後のヂツブマウン
１〜に際しても強度が低下せず、耐加水分解１（１に優
れ、金属の腐食による断線などの不良や水分によるリー
ク電流の不良などを著しく低減させることができ、耐湿
信頼性やＶｐ特性が従来のものに比べて大幅に改善され
た〜導体素子を得ることができる。゛ [Effect of light] The semiconductor element of the present invention has a semiconductor chip and a lead frame bonded together using a novel conductive adhesive, so that the adhesive property of the semiconductor element is improved, especially when the adhesive is removed after a long period of time after application of the water adhesive. It has excellent hydrolysis resistance of 1 (1) without any decrease in strength, and can significantly reduce defects such as disconnection due to metal corrosion and leakage current defects due to moisture, and has superior moisture resistance and Vp characteristics compared to conventional products. It is possible to obtain a conductor element that is significantly improved compared to the previous method.

Ｌ発明の実施例」 以下、実施例及び比較例により本発明を更に説明する。Embodiments of the L invention” The present invention will be further explained below with reference to Examples and Comparative Examples.

　以下１部」とは特に説明のない限り１−重用部」を示
づ−０ 実施例 第１表に示した各成分をセラミック７本１」−ルにより
３回混練しＣ−波型導電性接着剤（△）、（Ｂ）、及び
（Ｃ）を製造した。　これらの接着剤を使用して半導体
チップとリードル−ムを接着させて半導体素子を得た。Hereinafter, ``1 part'' means 1-heavy part unless otherwise specified.Example Each component shown in Table 1 was kneaded three times using 7 ceramic 1''-rules to form a C-wave conductive material. Adhesives (Δ), (B), and (C) were manufactured. Using these adhesives, the semiconductor chip and lead room were bonded together to obtain a semiconductor element.

　得られた素子についで接着強度、■、特性、加水分解
・ｌ’Ｃ，４ｉ→湿試験評価を行ったので第１表に示し
た。The obtained device was evaluated by adhesive strength, ■, properties, hydrolysis/l'C, 4i→humidity test, and the results are shown in Table 1.

比較例 市販のエポキシ樹脂ベースの半導体用接着剤（Ｄ＞を使
用して実施例１〜３と同様にしＣ半導体素子を得て、そ
の接着強度、ＶＦ特性、加水分解性、耐湿試験評価を行
ったのでその結果を第１表に示した。Comparative Example C semiconductor devices were obtained in the same manner as in Examples 1 to 3 using a commercially available epoxy resin-based semiconductor adhesive (D), and their adhesive strength, VF characteristics, hydrolyzability, and moisture resistance tests were evaluated. The results are shown in Table 1.

本発明の半導体素子は、第１表から明らかなように接着
強度、ＶＦ特性、耐加水分解性に１！ｉ）１れ、耐湿試
験−ｂ極めてよく十分信頼例をイ５ｊ、−（いることが
わかる。As is clear from Table 1, the semiconductor element of the present invention has adhesive strength, VF characteristics, and hydrolysis resistance of 1! i) It can be seen that the moisture resistance test is very good and reliable.

Claims (1)

【特許請求の範囲】 １　（ａ）ヒスマレイミドと１〜リアジン樹脂モノマー
とを主成分とづる樹脂と、（ｂ）常温で液状の土ボ４シ
樹脂と、（Ｃ）導電性粉末とを含イ」する導電性接着剤
で半導体チップとリードフレームとを接着Ｊることを特
徴とする半導体素子。 ２（ａ）ヒスマレイミドと１へリアジン樹脂モノンーど
を」ユ成分とりる樹脂と、（ｂ）常温で液状のｌボキシ
樹脂との配合割合は、１０：９０〜９０　：　１０　（
噌都比）の範囲であることを特徴とする特ａ′１請求の
範囲第１項記載の半導体素子。 ３　くａ）ビスーンレイミドとトリアジン（対脂モ　３
ツマ−とを主成分とする樹脂は、 般式 で表されるヒスマレイミドと、 一般式Ｎ−Ｃ−０−Ａｒ　２−Ｏ−Ｃ＝ＮＣ・表される
ジシアネートならひに前１．己ジシフ′ネートが３分子
以上環化重合した、分子中にトリアジン環 を石し、分子末端にシアネート基 （ＮモＣ−０−”）を有する１〜リアジン樹脂（イリし
、Ａｒ　＋　、Ａｒ　２は同−又ハ異なる２価の芳香族
基を表Ｊ）の混合物からなることを特徴とする特許請求
の範囲第１項又は第２項記載の半導体素子。[Scope of Claims] 1 (a) a resin whose main components are hismaleimide and 1 to lyazine resin monomers, (b) a clay resin that is liquid at room temperature, and (C) a conductive powder. 1. A semiconductor device characterized in that a semiconductor chip and a lead frame are bonded together using a conductive adhesive. The blending ratio of 2 (a) a resin containing hismaleimide and 1 heliazine resin monones, and (b) a l-boxy resin that is liquid at room temperature is 10:90 to 90:10 (
1. The semiconductor device according to claim 1, characterized in that the semiconductor device is in the range of 1. 3 a) Bisoonreimide and triazine (anti-fat component 3
The resin whose main components are hismaleimide represented by the general formula and dicyanate represented by the general formula N-C-0-Ar2-O-C=NC.1. 1 to riazine resin (iris, Ar + , Ar 3. The semiconductor device according to claim 1, wherein 2 is a mixture of the same or different divalent aromatic groups shown in Table J).
JP9235883A 1983-05-27 1983-05-27 Semiconductor element Pending JPS59218738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9235883A JPS59218738A (en) 1983-05-27 1983-05-27 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9235883A JPS59218738A (en) 1983-05-27 1983-05-27 Semiconductor element

Publications (1)

Publication Number Publication Date
JPS59218738A true JPS59218738A (en) 1984-12-10

Family

ID=14052176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9235883A Pending JPS59218738A (en) 1983-05-27 1983-05-27 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS59218738A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000071614A1 (en) * 1999-05-21 2000-11-30 Miguel Albert Capote High performance cyanate-bismaleimide-epoxy resin compositions for printed circuits and encapsulants
US6616984B1 (en) 1997-10-10 2003-09-09 Miguel Albert Capote Forming viaholes in composition of cyanate, bismaleimide, epoxy resin and unsaturated aromatic glycidyl

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6616984B1 (en) 1997-10-10 2003-09-09 Miguel Albert Capote Forming viaholes in composition of cyanate, bismaleimide, epoxy resin and unsaturated aromatic glycidyl
WO2000071614A1 (en) * 1999-05-21 2000-11-30 Miguel Albert Capote High performance cyanate-bismaleimide-epoxy resin compositions for printed circuits and encapsulants

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