JPS59215724A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS59215724A JPS59215724A JP58088366A JP8836683A JPS59215724A JP S59215724 A JPS59215724 A JP S59215724A JP 58088366 A JP58088366 A JP 58088366A JP 8836683 A JP8836683 A JP 8836683A JP S59215724 A JPS59215724 A JP S59215724A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- resist
- exposure device
- photoresist
- pawls
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 6
- 229920003986 novolac Polymers 0.000 claims abstract description 5
- 210000000078 claw Anatomy 0.000 claims description 11
- 239000002904 solvent Substances 0.000 claims description 2
- 230000013011 mating Effects 0.000 claims 1
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 abstract description 4
- 230000006866 deterioration Effects 0.000 abstract description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 229920005989 resin Polymers 0.000 abstract 1
- 239000011347 resin Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 15
- 238000004140 cleaning Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は半導体装置の製造工程におけるホトレジスト塗
布工程とパターン露光工程に関するもので、特に投影形
露光装置を使用して露光する場合に用いられる。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a photoresist coating step and a pattern exposure step in the manufacturing process of semiconductor devices, and is particularly used when exposure is performed using a projection exposure apparatus.
従来ホトレジストヲ塗布した半導体基板（ウェーハつを
露光装置で投影露光する場合、ホトレジストを半導体基
板上に所定の厚さで全面均一に塗布し、所定の温度でソ
フトベーキングし、露光装置のウェーハディスクに固定
する。第１図はウェーハディスクの一例であって１で示
す爪の面は露光装置の半導体基板の基準面であり、こ、
の基準面と半導体基板のレジスト塗布面とが一致するよ
うに固定される。しかるのちマスク合せをして露光して
いた。Conventionally, when projecting a semiconductor substrate (wafer) coated with photoresist using an exposure device, the photoresist is uniformly applied to the entire surface of the semiconductor substrate to a predetermined thickness, soft-baked at a predetermined temperature, and applied to the wafer disk of the exposure device. Fig. 1 shows an example of a wafer disk, and the surface of the claw indicated by 1 is the reference surface of the semiconductor substrate of the exposure device.
The reference surface of the semiconductor substrate is fixed so that it matches the resist-coated surface of the semiconductor substrate. After that, the mask was put on and exposed.
従来の方法では露光装置のウェーハディスクの爪の部分
に半導体基板よりはがれたポトレジストが付着しやすく
、付着したレンストに゛よって露光装置の半導体基板の
基準面が変動し、フォーカスボケが生じ、半導体基板上
でのレジストパターンが現像後に部分的に解像されなく
なったり、寸法にズレが生じたりして、再現性のよいレ
ジストパターンが形成されない。特にノボラック系のポ
ジ程度の微細パターンを均一性よく形成するためには上
記基準面の変動を防ぐため５〜１０回の露光毎にウェー
ハディスクを取り出して洗浄し、付着したホトレジスト
ヲ除去しなければならない。洗浄をしないと上記フォー
カスボケが発生する。このため従来の方法では（１）洗
浄頻度が高いため作業性が著しく低下する。（２）レジ
ストパターン、の解像度が悪くてやり直しを必要とする
ものが多発する。In the conventional method, photoresist that has peeled off from the semiconductor substrate tends to adhere to the claws of the wafer disk of the exposure device, and the adhered resist changes the reference plane of the semiconductor substrate of the exposure device, causing out-of-focus and causing damage to the semiconductor substrate. After development, the upper resist pattern may become partially unresolved or have dimensions that are misaligned, making it impossible to form a resist pattern with good reproducibility. In particular, in order to form a novolak-based positive fine pattern with good uniformity, the wafer disk must be taken out and cleaned every 5 to 10 exposures to remove the adhered photoresist in order to prevent fluctuations in the reference plane. It won't happen. If cleaning is not done, the above-mentioned out-of-focus will occur. For this reason, in the conventional method, (1) the cleaning frequency is high, resulting in a significant decrease in work efficiency; (2) Resist patterns often have poor resolution and need to be redone.
（３）適時にフォーカスボケを調整できない等の問題が
あり、２μｍ以下のレジストパターンを量産的に形成す
る場合効率が悪く、製造上大きな問題となる。(3) There are problems such as not being able to adjust focus blur in a timely manner, and when resist patterns of 2 μm or less are mass-produced, it is inefficient and poses a major problem in manufacturing.
本発明の目的はホトレジストを塗布した半導体基板を基
準面合せ爪を有する抑え具で保持し投影露光する工程に
おいて、露光装置のウェーハディスクの半導体基板の基
準面となる爪の面にレジストが付着するのを防止し、露
光装置のフォーカスボケを防止する方法を提供すること
である。An object of the present invention is to hold a semiconductor substrate coated with photoresist with a holding tool having a reference surface alignment claw and perform projection exposure, in which the resist adheres to the surface of the claw, which serves as a reference surface of the semiconductor substrate of a wafer disk of an exposure device. It is an object of the present invention to provide a method for preventing defocusing of an exposure apparatus.
本発明の方法は半導体基板表面にホトレジストを所定の
厚さで全面均一に塗布したのち、該塗布面のうち露光装
置のウェーハディスクの爪の面に対応する部分を除いた
部分をおおう形状の治具（バキ＝ムチャック〕によって
半導体基板を保持し、その状態でホトレジストを溶解す
る溶剤全スプレィすることにより爪の面に対応する基板
の面の部分のホトレジストを除去する。しかるのち露光
装置の上記爪の面と基板のホトレジストを除去した面と
が一致するように基板を露光装置に固定し、露光する。The method of the present invention involves uniformly coating the entire surface of a semiconductor substrate with photoresist to a predetermined thickness, and then forming a shape treatment that covers the coated surface except for the portion corresponding to the surface of the wafer disk of the exposure device. The semiconductor substrate is held by a tool (Baki-muchak), and in this state, the photoresist is removed from the portion of the surface of the substrate corresponding to the surface of the nail by spraying the entire surface with a solvent that dissolves the photoresist. The substrate is fixed to an exposure device and exposed so that the surface of the substrate coincides with the surface from which the photoresist has been removed.
このようにすることにより露光装置のウェーハディスク
の爪の面に対応する部分の半導体基板はホトレジストが
除去されてい゛るのでホトレジストがはがれて爪に付着
することはなく、露光装置の基板の基準面は常に一定で
フォーカスボケは生じない。By doing this, the photoresist is removed from the portion of the semiconductor substrate corresponding to the surface of the nail of the wafer disk of the exposure equipment, so the photoresist does not peel off and stick to the nail, and the reference surface of the substrate of the exposure equipment is removed. is always constant and no out-of-focus occurs.
表面に０．７μｍの熱酸化膜全成長させた半導体基板に
ノボラック系のポジ型ホトレジスト（例えば東京応化製
０ＦＰＲ−８００Ｃ） ’ｒ全面均一に厚さ１，５μｍ
塗布する。そののち第２図に示す治具（バキュームチャ
ック）を用いて該基板を保持したま１、アセトンのよう
なノボラック系のポジ型レジストを溶解する液体をスプ
レィすることにより基板上の露出した部分のレジストヲ
除去する。第２図（ａ）は上記のホトレジストを除去す
る治具の平面図で第２図（ｂ）は第２図（ａ）の■−■
線に沿う断面図であり、ホトレジストを塗布したウェー
ハを保持した状態を一点鎖線で描いである。２は治具（
バキュームチャック）６はホトレジストを除去する部分
で基準面合せ爪に対応する部分である。４は治具を真空
排気系に接続するための連結部、５は半導体基板、６は
ホトレジスト層である。治具は半導体基板の爪に対応す
る部分を除き、はぼ全面をおおう構造になっており、ス
プレィした場合爪に対応する部分のみ液に触れ、その部
分のホトレジストが溶解され除去される。つぎにホトレ
ジストの除去された部分の位置を投影形露光装置（例え
ばキャノンＭＰＡ−５０ＯＦＡ型）のウェーハディスク
の１上記爪の位置と一致するように基板を固定し、しか
るのちマスク合せをして露光する。このようにすれば露
光装置のウェーハディスクの爪の部分で基板に塗布した
ホトレジストがはがれて爪に付着し、フォーカスボケを
生じたり解像度が劣化することを防止できる。A novolac positive photoresist (e.g. 0FPR-800C manufactured by Tokyo Ohka Co., Ltd.) is applied uniformly to a thickness of 1.5 μm over the entire surface of the semiconductor substrate on which a thermal oxide film of 0.7 μm is grown.
Apply. After that, while holding the substrate using the jig (vacuum chuck) shown in Figure 2, the exposed portions of the substrate are sprayed with a liquid that dissolves a novolak positive resist such as acetone. Remove the resist. FIG. 2(a) is a plan view of the jig for removing the photoresist, and FIG. 2(b) is a plan view of the jig shown in FIG. 2(a).
It is a sectional view taken along a line, and a state in which a wafer coated with photoresist is held is depicted by a dashed-dotted line. 2 is a jig (
A vacuum chuck 6 is a portion from which photoresist is removed and corresponds to a reference surface matching claw. 4 is a connecting portion for connecting the jig to a vacuum evacuation system, 5 is a semiconductor substrate, and 6 is a photoresist layer. The jig is structured to cover almost the entire surface of the semiconductor substrate except for the parts corresponding to the claws, and when sprayed, only the parts corresponding to the claws come into contact with the liquid, and the photoresist in those parts is dissolved and removed. Next, the substrate is fixed so that the position of the removed portion of the photoresist matches the position of the above-mentioned claw on the wafer disk of a projection exposure apparatus (for example, Canon MPA-50OFA model), and then the mask is aligned and exposed. do. In this way, it is possible to prevent the photoresist applied to the substrate from peeling off and adhering to the claws of the wafer disk of the exposure apparatus, causing out-of-focus and deterioration of resolution.
この発明の方法を適用すれば（１）多数のウェーハを連
続露光してもフォーカスボケをほとんど生じない（２）
ウェーハディスクの洗浄頻度を大幅に削減できるので作
業効率が良い（３）微細なレジストパターンを再現性よ
く形成できる等の効果が得られる。By applying the method of this invention, (1) almost no out-of-focus will occur even if a large number of wafers are exposed continuously (2)
The frequency of cleaning the wafer disk can be significantly reduced, resulting in improved work efficiency (3) The ability to form fine resist patterns with good reproducibility.
第１図は従来方法の問題点全説明する投影形露光装置の
ウェー・・ディスクの平面図。
第２図（ａ）は本発明においてレジストを除去する治具
の平面図。
第２図（ｂ）は第２図（ａ）の治具の■−■線に沿って
断面図。
１・・・ウェーハディスクの基準面合せ爪、２・・・治
具、６・・・ホトレジストを除去する部分、４・・・真
空排気系連結部、５・・・半導体基板、６・・・ホトレ
ジスト層。FIG. 1 is a plan view of a wafer disk of a projection exposure apparatus, which explains all the problems of the conventional method. FIG. 2(a) is a plan view of a jig for removing resist in the present invention. FIG. 2(b) is a cross-sectional view of the jig shown in FIG. 2(a) taken along the line ■-■. DESCRIPTION OF SYMBOLS 1... Wafer disk reference surface matching claw, 2... Jig, 6... Portion for removing photoresist, 4... Vacuum exhaust system connection part, 5... Semiconductor substrate, 6... Photoresist layer.
Claims (1)
を有する抑え具で固定し露光する工程において、ホトレ
ジストヲ半導体基板に塗布したのち、該塗布面を露光装
置の半導体基板の基準面合せ爪に対応する部分を除いて
おおって保持する治具により保持した１″！、上記爪に
対応する基板面の部分のホトレジストを溶剤によって除
去したのち、基板面のホトレジストが除去された面と露
光装置の上記爪の面とが一致するように固定して露光を
行なうことを特徴とする半導体装置の製造方法。 ２ ホトレジストがノボラック系のポジ型ホトレジスト
である特許請求の範囲第１項記載の半導体装置の製造方
法。[Scope of Claims] 1. In the step of fixing a semiconductor substrate coated with photoresist with a holding tool having a reference surface alignment claw and exposing it to light, after the photoresist is coated on the semiconductor substrate, the coated surface is set as the reference of the semiconductor substrate in the exposure device. 1" held by a jig that covers and holds the area except for the area corresponding to the mating nails. After removing the photoresist on the part of the substrate surface corresponding to the nails with a solvent, the surface from which the photoresist on the substrate surface was removed. A method for manufacturing a semiconductor device, characterized in that exposure is performed by fixing the nail surface of an exposure device so that the surface thereof coincides with the surface of the nail of the exposure device.2. Claim 1, wherein the photoresist is a novolac-based positive photoresist A method for manufacturing a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58088366A JPS59215724A (en) | 1983-05-21 | 1983-05-21 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58088366A JPS59215724A (en) | 1983-05-21 | 1983-05-21 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59215724A true JPS59215724A (en) | 1984-12-05 |
Family
ID=13940798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58088366A Pending JPS59215724A (en) | 1983-05-21 | 1983-05-21 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59215724A (en) |
-
1983
- 1983-05-21 JP JP58088366A patent/JPS59215724A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2003507765A (en) | Exposure during rework for improved resist removal | |
| JP2003156834A (en) | Mask for exposure with near-field light, exposure system and exposure method | |
| JPS59215724A (en) | Manufacture of semiconductor device | |
| US6426168B1 (en) | Method of inspecting photo masks | |
| JPS6240458A (en) | Exposing method for thin film pattern | |
| US7368229B2 (en) | Composite layer method for minimizing PED effect | |
| JP7040146B2 (en) | Manufacturing method of semiconductor device | |
| JPS6251228A (en) | Manufacture of gallium-arsenide monolithic microwave integrated circuit | |
| JPS62142321A (en) | Wafer treatment device | |
| JPH0364758A (en) | Method for peeling photoresist | |
| JP2001230197A (en) | Method for removing edge film and method for electron beam lithography | |
| JPS60195546A (en) | Substrate for mask | |
| JPS58105151A (en) | Formation of photosensitive resin film | |
| JPS63134076A (en) | Method and device for coating | |
| JPH01187926A (en) | Manufacture of mask and reticle | |
| JPS5950053B2 (en) | Photo engraving method | |
| JPH02161433A (en) | Photomask substrate | |
| KR100744277B1 (en) | Apparatus for bead in the edge of a semiconductor wafer | |
| JPS59175724A (en) | Manufacture of semiconductor device | |
| JPS6057627A (en) | Positioning and exposing method of both surface of wafer | |
| JPH0697066A (en) | Photomask for manufacturing semiconductor device | |
| JPS60235422A (en) | Correction of defect of mask pattern | |
| JPH04257238A (en) | Manufacture of semiconductor device | |
| JP2610601B2 (en) | Wafer periphery exposure system | |
| JP2002075832A (en) | Manufacturing method of semiconductor device |