JP2001230197A - Method for removing edge film and method for electron beam lithography - Google Patents

Method for removing edge film and method for electron beam lithography

Info

Publication number
JP2001230197A
JP2001230197A JP2000104111A JP2000104111A JP2001230197A JP 2001230197 A JP2001230197 A JP 2001230197A JP 2000104111 A JP2000104111 A JP 2000104111A JP 2000104111 A JP2000104111 A JP 2000104111A JP 2001230197 A JP2001230197 A JP 2001230197A
Authority
JP
Japan
Prior art keywords
resist
electron beam
face
film
ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000104111A
Other languages
Japanese (ja)
Inventor
Kaoru Kanda
薫 神田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sigmameltec Ltd
Original Assignee
Sigmameltec Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sigmameltec Ltd filed Critical Sigmameltec Ltd
Priority to JP2000104111A priority Critical patent/JP2001230197A/en
Publication of JP2001230197A publication Critical patent/JP2001230197A/en
Pending legal-status Critical Current

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  • Electron Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for electron beam writing and for removing edge films, which enable easy and secure connection of a ground to a substrate by generating no waste, and to provide a method for removing edge films of charge-free resist films and conductive films when a patterned substate is subjected to electron beam lithography. SOLUTION: This invention is characterized by that the ground for electron beam lithography is connected to the resist-free edge of a substrate, and be that the removal width of an edge film is changed according to the steps and film kinds.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体ウエハおよび半
導体用マスク等の基板のアース接続に係る電子線描画方
法および端面膜除去方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of drawing an electron beam and a method of removing an end face film relating to a ground connection of a substrate such as a semiconductor wafer and a semiconductor mask.

【0002】[0002]

【従来の技術】半導体用マスクを例にとり説明する。2. Description of the Related Art A semiconductor mask will be described as an example.

【0003】マスクは、150mm角、厚さ6.2mm
の石英基板上にクロム膜をスパッタし、その上にレジス
トを塗布して選択的に電子線による描画を行った後、現
像およびエッチングをして作成する。
The mask is 150 mm square and 6.2 mm thick.
After a chromium film is sputtered on the quartz substrate, a resist is applied thereon, and the pattern is selectively drawn with an electron beam, followed by development and etching.

【0004】電子線描画に際し、マスクの帯電を防止す
るため、レジスト膜を破ってクロム面にピンを圧接しア
ースをとる。従って、破れたレジストがゴミとなりマス
ク面に付着し欠陥の原因になるという問題がある。
In electron beam drawing, in order to prevent the mask from being charged, the resist film is broken and a pin is pressed against the chrome surface to ground. Therefore, there is a problem that the broken resist becomes dust and adheres to the mask surface to cause defects.

【0005】また、マスク作成工程でマスクの端面をロ
ボット、または、治工具で保持するため、端面のレジス
トがはげ落ちて、それがマスク上面に付着し、マスクの
欠陥になるという問題がある。
In addition, since the end face of the mask is held by a robot or a jig in the mask making step, the resist on the end face peels off and adheres to the upper surface of the mask, resulting in a defect of the mask.

【0006】この問題を解決するため、マスク端面のレ
ジストを除去する装置が本願出願人の平成12年2月4
日出願の特許で提案されている。この提案は溶剤でレジ
ストを溶解し、真空で吸い取って除去するものである。
In order to solve this problem, an apparatus for removing the resist on the end face of the mask has been proposed by the present applicant on February 4, 2000.
It has been proposed in a patent filed in Japan. In this proposal, a resist is dissolved in a solvent, and the resist is removed by suction in a vacuum.

【0007】しかしながら、クロムをエッチングしてパ
ターンニングした後、再度レジストを塗布して石英のパ
ターンニングを行うレベンソン型の位相シフトマスクに
おいては、端面のクロムがすでにエッチングされて除去
されているため1回目の電子線描画時と同じ位置で2回
目のアースをとることができないという問題がある。
However, in a Levenson-type phase shift mask in which chromium is etched and patterned and then a resist is applied again to pattern quartz, the chromium on the end face has already been etched and removed. There is a problem that the second ground cannot be taken at the same position as the time of the second electron beam drawing.

【0008】また、レジスト膜の上に導電膜塗布を行う
レベンソン型位相シフトマスクにおいては、導電膜の端
面除去を行うとアースが接続されなくなり、帯電防止が
出来なくなるという問題がある。
In addition, in the Levenson-type phase shift mask in which a conductive film is applied on a resist film, if the end surface of the conductive film is removed, the ground is not connected, and there is a problem that it is impossible to prevent charging.

【0009】[0009]

【発明が解決しようとする課題】本発明の目的は、ゴミ
を発生することなく基板にアースを容易に、かつ、確実
に接続することのできる電子線描画方法を提供すること
である。
SUMMARY OF THE INVENTION An object of the present invention is to provide an electron beam drawing method capable of easily and surely connecting a ground to a substrate without generating dust.

【0010】また、複数回の電子線描画を行う基板に対
して、容易に、かつ、確実にアースを接続する端面膜除
去方法と電子線描画方法を提供することである。
It is another object of the present invention to provide an end face film removing method and an electron beam drawing method for easily and surely connecting the ground to a substrate on which electron beam drawing is performed a plurality of times.

【0011】さらにまた、パターンニング後の基板に電
子線描画した時でも帯電することのないレジスト膜と導
電膜の端面膜除去方法を提供することである。
It is still another object of the present invention to provide a method of removing a resist film and an end face film of a conductive film which does not become charged even when an electron beam is drawn on a substrate after patterning.

【0012】[0012]

【問題を解決するための手段】本発明は、レジスト除去
端面にアースを接続して電子線描画することを特徴とす
る。
According to the present invention, an electron beam is drawn by connecting the ground to the resist-removed end face.

【0013】また、本発明は、電子線描画のアース接続
位置が前のアース接続位置より基板内側にあることを特
徴とする。
Further, the invention is characterized in that the ground connection position for electron beam drawing is located on the inner side of the substrate than the previous ground connection position.

【0014】また、レジストの端面膜除去幅が、前の端
面膜除去幅より広いことを特徴とする。
Further, the edge film removal width of the resist is wider than the previous edge film removal width.

【0015】さらに、また、導電膜の端面除去幅がレジ
ストの端面除去幅より狭いことを特徴とする。
Further, the width of removing the end face of the conductive film is smaller than the width of removing the end face of the resist.

【0016】[0016]

【実施例】半導体用マスクを例にとり、本発明を図面を
参照して説明する。図1は、本発明の通常マスクを作成
する工程を示す図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings, taking a semiconductor mask as an example. FIG. 1 is a diagram showing a process for producing a normal mask of the present invention.

【0017】図1(A)は、約0.1μmの厚さのクロ
ム膜2をスパッタ法で成膜した石英板1に0.4μmの
厚さのレジスト3を回転塗布した状態を示す図である。
FIG. 1A shows a state in which a resist 3 having a thickness of 0.4 μm is spin-coated on a quartz plate 1 on which a chromium film 2 having a thickness of about 0.1 μm is formed by sputtering. is there.

【0018】図1(B)は、例えば、前記平成12年2
月4日出願の特許で提案した端面膜除去装置で端面レジ
スト3aを除去した状態を示す図である。クロム2の露
出した端面クロム2aに電子線描画機のアースピン5を
圧接しアースをとる。
FIG. 1 (B) shows, for example,
FIG. 6 is a view showing a state in which the end face resist 3a is removed by the end face film removing apparatus proposed in the patent application filed on April 4, 2009. The earth pin 5 of the electron beam lithography machine is pressed against the exposed end surface chrome 2a of the chrome 2 to ground.

【0019】端面レジスト3aが除去されているので、
マスク搬送やアースピンの圧接でゴミが発生する危険は
なく、また、レジストがないのでアース接続を確実に行
うことができる。
Since the end face resist 3a has been removed,
There is no danger of dust being generated by mask transport or pressure contact of the ground pin, and the ground connection can be reliably performed because there is no resist.

【0020】図1(C)は、電子線描画した後現像処理
を行った状態を示す図である。3bは、パターンニング
されたレジストである。
FIG. 1C is a view showing a state in which development processing has been performed after electron beam drawing. 3b is a patterned resist.

【0021】図1(D)は、パターンニングされたレジ
スト3bを保護膜としてクロム2をエッチングした後、
レジスト3を剥離した状態を示す図である。通常のマス
クはこの工程で完成である。
FIG. 1D shows that after the chromium 2 is etched using the patterned resist 3b as a protective film,
FIG. 4 is a view showing a state where a resist 3 is peeled off. A normal mask is completed in this step.

【0022】図2は、レベンソン型位相シフトマスクを
作成する工程を示す図である。図1と同じ名称には同一
の符号を付した。
FIG. 2 is a diagram showing a process of forming a Levenson-type phase shift mask. The same names as those in FIG. 1 are denoted by the same reference numerals.

【0023】図2(A)は、図1(D)の次に行われる
工程であって、2回目のレジスト6を回転塗布した状態
を示す図である。
FIG. 2A is a step performed after FIG. 1D and shows a state in which the resist 6 is spin-coated for the second time.

【0024】図2(B)は、図1(B)と同様に、例え
ば、前記平成12年2月4日出願の特許で提案した端面
膜除去装置で端面レジスト6aを除去した状態を示す図
である。
FIG. 2B is a diagram showing a state in which the end face resist 6a has been removed by the end face film removing apparatus proposed in the patent filed on February 4, 2000, for example, similarly to FIG. 1B. It is.

【0025】2回目の端面レジストの除去幅9を1回目
の端面レジストの除去幅8より広くすることにより端面
クロム2cが露出し、次の電子線描画時のアース接続を
容易にする。
By making the removal width 9 of the second end face resist wider than the first removal width 8 of the end face resist, the end face chromium 2c is exposed to facilitate the ground connection at the time of the next electron beam drawing.

【0026】図2(C)は、2回目のレジスト6の上に
帯電防止の導電膜7を塗布した状態を示す図である。ク
ロムパターン2bは、端面クロム2cとは継がっていな
い孤立したパターンなので、レジスト膜6の上に帯電防
止用の導電膜を塗布することが必要となる。従来は、導
電膜に電子線描画機のアースを接続し、帯電を防止す
る。そのためごみの発生が避けられない。
FIG. 2C is a view showing a state in which an antistatic conductive film 7 is applied on the resist 6 for the second time. Since the chromium pattern 2b is an isolated pattern not connected to the end face chrome 2c, it is necessary to apply an antistatic conductive film on the resist film 6. Conventionally, the ground of an electron beam drawing machine is connected to the conductive film to prevent charging. Therefore, generation of refuse is inevitable.

【0027】図2(D)は、図1(B)と同様に、例え
ば、前記平成12年2月4日出願の特許で提案した端面
膜除去装置で端面の導電膜7aを除去した状態を示す図
である。
FIG. 2 (D) shows a state in which the conductive film 7a on the end face has been removed by the end face film removing apparatus proposed in the patent filed on February 4, 2000, for example, as in FIG. 1 (B). FIG.

【0028】導電膜の端面除去幅10をレジストの端面
除去幅9より狭くすることにより、導電膜7は露出した
端面クロム2cに継がるので、アースピン5を介してマ
スク全面の帯電を防止することができる。
By making the end face removal width 10 of the conductive film smaller than the end face removal width 9 of the resist, the conductive film 7 is connected to the exposed end face chromium 2c. Can be.

【0029】図1(B)のアースピン5の位置の端面ク
ロム2aはエッチングされてなくなっているので、アー
スピン5をさらに内側に移動して、新たに露出した端面
クロム2cに接続することによって、ゴミを発生する危
険がなく、かつ、確実にアース接続を行い、マスクの帯
電を防止することができる。
Since the end face chrome 2a at the position of the earth pin 5 in FIG. 1B has been etched away, the earth pin 5 is moved further inward and connected to the newly exposed end face chrome 2c, thereby removing dust. And there is no danger of occurrence of the occurrence, and the ground connection can be reliably performed to prevent charging of the mask.

【0030】図2(E)は、2回目の電子線描画を行っ
た後、導電膜を剥離し現像を行った状態を示す図であ
る。6bは、パターンニングされたレジストである。
FIG. 2E is a view showing a state where the conductive film is peeled off and developed after the second electron beam drawing. 6b is a patterned resist.

【0031】図2(F)は、レジストとクロムを保護膜
として石英1をエッチングした後、レジスト6を剥離し
た状態を示す図である。この工程でレベンソン型の位相
シフトマスクが完成する。
FIG. 2F is a view showing a state in which the quartz 6 is etched using the resist and chromium as protective films, and then the resist 6 is removed. In this step, a Levenson-type phase shift mask is completed.

【0032】上記説明では、半導体用マスクの場合につ
いて述べたが、本発明はこれに限定されるものではな
く、エッチング材質を変えれば半導体ウエハ等、他の基
板についても全く同様に本発明を実現することができ
る。
In the above description, the case of a semiconductor mask has been described. However, the present invention is not limited to this, and the present invention can be realized in the same manner for other substrates such as semiconductor wafers by changing the etching material. can do.

【0033】[0033]

【発明の効果】以上説明したように、本発明は次のよう
な効果を奏するものである。
As described above, the present invention has the following effects.

【0034】端面膜を除去してゴミの発生を防止すると
同時に、電子線描画のアースを容易に、かつ、確実に接
続することを可能とし、ゴミ欠陥のない精度の高いパタ
ーンを作成することができる。
The end face film is removed to prevent generation of dust, and at the same time, it is possible to easily and surely connect the ground for electron beam drawing, thereby creating a highly accurate pattern free from dust defects. it can.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1は、本発明の通常マスクを作成する工程を
示す図である。
FIG. 1 is a view showing a process for producing a normal mask of the present invention.

【図2】図2は、本発明のレベンソン型位相シフトマス
クを作成する工程を示す図である。
FIG. 2 is a diagram showing a step of producing a Levenson-type phase shift mask of the present invention.

【符号の説明】[Explanation of symbols]

1…石英板、2…クロム膜、3、6…レジスト、5…ア
ースピン、7…導電膜、8…1回目の端面レジスト除去
幅、9…2回目の端面レジスト除去幅、10…導電膜の
端面除去幅
DESCRIPTION OF SYMBOLS 1 ... Quartz board, 2 ... Chromium film, 3, 6 ... Resist, 5 ... Earth pin, 7 ... Conducting film, 8 ... First edge resist removal width, 9 ... Second edge resist removal width, 10 ... Conductive film Edge removal width

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 電子線描画基板にアースを接続する方法
において、レジスト除去端面にアースを接続して電子線
描画することを特徴とした電子線描画方法。
1. A method of connecting an earth to an electron beam drawing substrate, wherein the electron beam is drawn by connecting the ground to the resist-removed end face.
【請求項2】 複数回の電子線描画を行う基板にアース
を接続する方法において、電子線描画のアース接続位置
が、前のアース接続位置より基板内側にあることを特徴
とした請求項1記載の電子線描画方法。
2. A method of connecting a ground to a substrate on which electron beam drawing is performed a plurality of times, wherein the ground connection position of the electron beam drawing is inside the substrate from the previous ground connection position. Electron beam drawing method.
【請求項3】 複数回のレジスト塗布を行う基板の端面
レジストを除去する方法において、レジストの端面膜除
去幅が、前の端面除去幅より広いことを特徴とした端面
膜除去方法。
3. A method for removing a resist on an end face of a substrate to which a plurality of resist coatings are applied, wherein the width of the end face film removed from the resist is wider than the previous end face removal width.
【請求項4】 レジスト膜上に導電膜を塗布する基板の
端面膜を除去する方法において、導電膜の端面除去幅が
レジストの端面除去幅より狭いことを特徴とした端面膜
除去方法。
4. A method for removing an end face film of a substrate on which a conductive film is applied on a resist film, wherein the width of the end face of the conductive film is smaller than the width of the end face of the resist.
JP2000104111A 2000-02-17 2000-02-17 Method for removing edge film and method for electron beam lithography Pending JP2001230197A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000104111A JP2001230197A (en) 2000-02-17 2000-02-17 Method for removing edge film and method for electron beam lithography

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000104111A JP2001230197A (en) 2000-02-17 2000-02-17 Method for removing edge film and method for electron beam lithography

Publications (1)

Publication Number Publication Date
JP2001230197A true JP2001230197A (en) 2001-08-24

Family

ID=18617715

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2001230197A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005353797A (en) * 2004-06-10 2005-12-22 Semiconductor Leading Edge Technologies Inc Semiconductor substrate and method for exposure by charged-particle beam
KR100575083B1 (en) 2004-07-20 2006-04-28 동부일렉트로닉스 주식회사 Method for manufacturing semiconductor devices
JP2008083194A (en) * 2006-09-26 2008-04-10 Hoya Corp Photomask blank, method for manufacturing photomask blank, photomask, method for manufacturing photomask, photomask intermediate, and method for transferring pattern
JP2011171465A (en) * 2010-02-18 2011-09-01 Nuflare Technology Inc Method for manufacturing exposure mask
EP2410379A3 (en) * 2010-07-23 2012-02-15 Shin-Etsu Chemical Co., Ltd. Substrate to be processed having laminated thereon resist film for electron beam and organic conductive film, method for manufacturing the same, and resist pattering process
CN106324978A (en) * 2015-07-01 2017-01-11 信越化学工业株式会社 Inorganic material film, photomask blank, and method for manufacturing photomask

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005353797A (en) * 2004-06-10 2005-12-22 Semiconductor Leading Edge Technologies Inc Semiconductor substrate and method for exposure by charged-particle beam
KR100575083B1 (en) 2004-07-20 2006-04-28 동부일렉트로닉스 주식회사 Method for manufacturing semiconductor devices
JP2008083194A (en) * 2006-09-26 2008-04-10 Hoya Corp Photomask blank, method for manufacturing photomask blank, photomask, method for manufacturing photomask, photomask intermediate, and method for transferring pattern
TWI422960B (en) * 2006-09-26 2014-01-11 Hoya Corp Mask substrate and manufacturing method thereof, mask and manufacturing method thereof, mask mask, and pattern transfer method
JP2011171465A (en) * 2010-02-18 2011-09-01 Nuflare Technology Inc Method for manufacturing exposure mask
US8563216B2 (en) 2010-07-23 2013-10-22 Shin-Etsu Chemical Co., Ltd. Substrate to be processed having laminated thereon resist film for electron beam and organic conductive film, method for manufacturing the same, and resist patterning process
CN102419510A (en) * 2010-07-23 2012-04-18 信越化学工业株式会社 Substrate to be processed, manufacturing method and forming method of resist pattern
EP2410379A3 (en) * 2010-07-23 2012-02-15 Shin-Etsu Chemical Co., Ltd. Substrate to be processed having laminated thereon resist film for electron beam and organic conductive film, method for manufacturing the same, and resist pattering process
CN102419510B (en) * 2010-07-23 2014-03-12 信越化学工业株式会社 Substrate to be processed, manufacturing method and forming method of resist pattern
KR101762446B1 (en) * 2010-07-23 2017-07-27 신에쓰 가가꾸 고교 가부시끼가이샤 Substrate to be processed having laminated thereon resist film for electron beam and organic conductive film, method for manufacturing the same, and resist patterning process
CN106324978A (en) * 2015-07-01 2017-01-11 信越化学工业株式会社 Inorganic material film, photomask blank, and method for manufacturing photomask
EP3112934A3 (en) * 2015-07-01 2017-02-08 Shin-Etsu Chemical Co., Ltd. Inorganic material film, photomask blank, and method for manufacturing photomask
US9851633B2 (en) 2015-07-01 2017-12-26 Shin-Etsu Chemical Co., Ltd. Inorganic material film, photomask blank, and method for manufacturing photomask
CN106324978B (en) * 2015-07-01 2020-12-15 信越化学工业株式会社 Inorganic material film, photomask blank and method for manufacturing photomask

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