JP2005353797A - Semiconductor substrate and method for exposure by charged-particle beam - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an SOI substrate devising a countermeasure to a charging and a method for an exposure to charged-particle beams using the SOI substrate in an charged-particle beam exposure. <P>SOLUTION: In the SOI substrate; a single-crystal silicon film, a resist applied on the surface of the silicon film, and an exposed foundation semiconductor layer can be brought into contact electrically by an antistatic film having a conductivity when the foundation semiconductor layer is exposed by the charged-particle beams, because the foundation semiconductor layer is exposed without forming a single-crystal semiconductor layer and an insulating layer in the partial region of a semiconductor substrate. The resist and the single-crystal semiconductor layer can also be grounded together with the foundation semiconductor layer through a grounding terminal by fixing the SOI substrate under the state on a sample table having the grounding terminal on a surface by using an electrostatic attraction method. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor substrate and a charged particle beam exposure method using the same, and more particularly to a semiconductor substrate having an SOI structure that is not charged during charged particle beam exposure and a charged particle beam exposure method using the same.

When performing charged particle beam exposure on a semiconductor substrate in a charged particle beam exposure apparatus, an electrostatic adsorption method is generally used as a method for fixing the semiconductor substrate to a sample stage. This is because the charged particle beam exposure apparatus cannot be fixed using the vacuum adsorption method used in the light exposure apparatus because the inside of the sample chamber is kept in vacuum.
However, when the semiconductor substrate is fixed by the electrostatic adsorption method, due to the phenomenon that the semiconductor substrate itself is charged, the trajectory of the incident charged particle beam is bent by the electric field generated by the charged charge, and the drawing position accuracy is greatly reduced. For this reason, when the electrostatic adsorption method is used, it is necessary to ground the semiconductor substrate by some method in order to prevent the semiconductor substrate from being charged.

Several means are implemented as a method for grounding a semiconductor substrate. Here, a case where charged particle beam exposure is performed on a single crystal silicon substrate will be described as an example.
FIG. 6 is a schematic diagram showing a single crystal silicon substrate and a sample stage for fixing the single crystal silicon substrate.

  As shown in FIG. 6, a single crystal silicon substrate 602 coated with a resist 601 is fixed to a sample stage 603 by an electrostatic adsorption method. A ground terminal 604 is provided on the surface of the sample stage 603 and is in contact with the back surface of the single crystal silicon substrate 602. By grounding the ground terminal 604, the single crystal silicon substrate 602 is grounded, and prevents a pattern position shift due to charging.

  On the other hand, SOI (Semiconductor On Insulator) technology has attracted attention as one of semiconductor substrate technologies. By using an SOI substrate as a semiconductor substrate, higher speed and lower power consumption are expected. Unlike a normal single crystal semiconductor substrate, an SOI substrate has a three-layer structure in which a single crystal semiconductor layer having a thickness of 1 micrometer or less and a base semiconductor layer are electrically insulated by a thin insulating layer. Yes. Since this thin insulating layer suppresses the parasitic capacitance generated between the element and the substrate in a normal semiconductor substrate, it is possible to reduce power consumption and speed.

  However, since the surface of the SOI substrate is insulated from the single crystal semiconductor layer and the underlying semiconductor layer, the charged particle beam exposure using the SOI substrate has the following problems.

  FIG. 7 is a schematic diagram showing an SOI substrate and a sample table for fixing the SOI substrate.

  As shown in FIG. 7, an SOI substrate 704 including a single crystal semiconductor layer 701, an insulating layer 702, and a base semiconductor layer 703 is coated with a resist 705 on the surface of the single crystal semiconductor layer 701 and fixed to a sample stage 706 by an electrostatic adsorption method. Has been. Although the base semiconductor layer 703 that is in contact with the ground terminal 707 provided on the sample stage is grounded, the single crystal semiconductor layer 701 is insulated by the insulating layer 702 and cannot be grounded. Accordingly, since the single crystal semiconductor layer 701 and the resist 705 are charged by the charged particle beam during the charged particle beam exposure, the pattern drawing position accuracy is lowered.

  The present invention has been made on the basis of recognition of such problems, and an object of the present invention is to provide an SOI substrate in which measures against charging have been taken in charged particle beam exposure, and a charged particle beam exposure method using the same. .

  In the SOI substrate of the present invention, the single crystal semiconductor layer and the insulating layer are not formed in a partial region of the semiconductor substrate, and the base semiconductor layer is exposed. In addition, the resist applied to the surface thereof and the exposed underlying semiconductor layer can be brought into electrical contact with the conductive antistatic film. By fixing the SOI substrate in this state to a sample stage having a ground terminal on the surface using an electrostatic adsorption method, it is possible to ground the resist and the single crystal semiconductor layer together with the base semiconductor layer via the ground terminal. It becomes.

That is, according to one aspect of the present invention,
A semiconductor substrate having a base semiconductor layer, an insulating layer formed on the base semiconductor layer, and a single crystal semiconductor layer formed on the insulating layer,
There is provided a semiconductor substrate characterized in that the insulating layer and the single crystal semiconductor layer are not present and the base semiconductor layer is exposed in at least a partial region of the semiconductor substrate.
Here, the region where the base semiconductor layer is exposed may be provided in a part of the outer peripheral portion of the semiconductor substrate.
Alternatively, the region where the base semiconductor layer is exposed may be provided over the entire outer periphery of the semiconductor substrate.
The region where the base semiconductor layer is exposed may be provided in the entire outer peripheral portion and the central portion of the semiconductor substrate.

On the other hand, according to another aspect of the present invention,
A base semiconductor layer; an insulating layer formed on the base semiconductor layer; and a single crystal semiconductor layer formed on the insulating layer, wherein the insulating layer is formed in at least a partial region of the semiconductor substrate. And a charged particle beam exposure method for a semiconductor substrate in which the underlying semiconductor layer is exposed without the presence of the single crystal semiconductor layer,
Fixing the base semiconductor layer provided on the back side of the semiconductor substrate so as to contact a ground terminal provided on a sample stage;
Applying a resist on the single crystal semiconductor layer provided on the main surface side of the semiconductor substrate;
Applying an antistatic film so as to cover at least a partial region of the exposed surface of the semiconductor layer and the region of the semiconductor substrate to which the resist is applied;
With
A charged particle beam exposure method is provided, wherein the semiconductor substrate is irradiated with a charged particle beam through the underlayer semiconductor layer while the antistatic film is grounded.

Here, the method may further include a step of removing a part of the antistatic film on the exposed base semiconductor layer.
The method may further include a step of removing a part of the resist applied on the single crystal semiconductor substrate to expose a part of the single crystal semiconductor substrate after the resist application.

  In the SOI substrate of the present invention, since a part of the base semiconductor layer is exposed on the main surface, the antistatic film formed so as to cover the surface of the semiconductor substrate coated with the resist is in contact with the exposed base semiconductor layer. Thus, the resist, the single crystal semiconductor substrate, and the base semiconductor layer can be kept at the same potential. When the charged particle beam exposure is performed by fixing the SOI substrate to the sample stage in such a state, the resist and the single crystal are formed together with the base semiconductor layer by bringing the ground terminal provided on the surface of the sample stage into contact with the back surface of the SOI substrate. Since the semiconductor layer can also be grounded, it is possible to prevent a reduction in drawing position accuracy due to the charging of the SOI substrate.

Embodiments of the present invention will be described below.
FIG. 1 is a schematic view showing a semiconductor substrate according to the first embodiment of the present invention and a procedure until the semiconductor substrate is fixed to a charged particle beam exposure apparatus.
In FIG. 1, (a) shows a cross-sectional view of a semiconductor substrate, and (b) to (d) show a charging countermeasure procedure applied to the semiconductor substrate.

  As shown in FIG. 1A, the SOI substrate 104 including the single crystal semiconductor layer 101, the insulating layer 102, and the base semiconductor layer 103 has the single crystal semiconductor layer 101 and the insulating layer 102 formed in a partial region 105. First, the underlying semiconductor layer 103 is exposed.

First, as shown in FIG. 1B, after applying a resist 106 on the SOI substrate 101, the end face of the resist 106 is removed, and a partial region 107 of the single crystal semiconductor layer 101 and an exposed base semiconductor layer 105 are formed. Expose.
Next, as shown in FIG. 1C, after applying an antistatic film 108 having conductivity on the SOI substrate 104, the end face of the antistatic film 108 is removed, and a partial region 109 of the single crystal semiconductor layer 101 is removed. Then, a partial region 110 on the exposed base semiconductor layer 105 is exposed. At this time, the removal width 109 of the antistatic film is made narrower than the removal width 107 of the resist in FIG. Similarly, the removal width 110 of the antistatic film is also made narrower than the exposed base semiconductor layer width 105.
As shown in FIG. 1D, the SOI substrate 104 coated with the antistatic film 108 obtained by the steps of FIGS. 1B and 1C is fixed to the sample stage 111 by the electrostatic adsorption method. A ground terminal 112 is provided on the surface of the sample stage 111. Therefore, when the back surface of the base semiconductor layer 103 is in contact with the ground terminal 112 provided on the surface of the sample stage 111, not only the base semiconductor layer 103 but also the resist 106, the single crystal semiconductor layer 101, and the antistatic film 108 are provided. Can be grounded.

FIG. 2 is a top view of the SOI substrate shown in FIG. For convenience, the single crystal semiconductor layer 101 having the same shape as the insulating layer 102 is omitted.
2 that the region where the single crystal semiconductor layer 101 and the insulating layer 102 are not formed, that is, the region 105 where the base semiconductor layer 103 is exposed is provided in a partial region of the outer periphery of the SOI substrate. Through this region, the resist 106, the single crystal semiconductor layer 101, and the antistatic film 108 are grounded.

FIG. 3 is a schematic diagram showing a semiconductor substrate according to the second embodiment of the present invention and a procedure until it is fixed to a charged particle beam exposure apparatus.
In FIG. 3, (a) shows a cross-sectional view of the semiconductor substrate, and (b) to (d) show a charging countermeasure procedure applied to the semiconductor substrate.

  As shown in FIG. 3A, the SOI substrate 304 including the single crystal semiconductor layer 301, the insulating layer 302, and the base semiconductor layer 303 has the single crystal semiconductor layer 301 and the insulating layer 302 formed in a partial region 305. The underlying semiconductor layer 303 is exposed.

First, as shown in FIG. 3B, a resist 306 is applied on the SOI substrate 301, and then the end surface of the resist 306 is removed to expose the exposed base semiconductor layer 303.
Next, as shown in FIG. 3C, after applying an antistatic film 307 having conductivity on the SOI substrate 304, the end face of the antistatic film 307 is removed, and the exposed base semiconductor layer 305 is exposed. The partial area 308 is exposed. At this time, the removal width 308 of the antistatic film is made narrower than the exposed base semiconductor layer width 305.
3D, the SOI substrate 304 coated with the antistatic film 307 obtained by the steps of FIGS. 3B and 3C is fixed to the sample stage 309 by the electrostatic adsorption method. A ground terminal 310 is provided on the surface of the sample stage 309. For this reason, when the back surface of the base semiconductor layer 303 is in contact with the ground terminal 310 provided on the surface of the sample stage 309, not only the base semiconductor layer 303 but also the resist 306, the single crystal semiconductor layer 301, and the antistatic film 307 are formed. Can be grounded.

FIG. 4 is a top view of the SOI substrate shown in FIG. For convenience, the single crystal semiconductor layer 301 having the same shape as the insulating layer 302 is omitted.
4 that the region where the single crystal semiconductor layer 301 and the insulating layer 302 are not formed, that is, the region 305 where the base semiconductor layer 303 is exposed is provided over the entire periphery of the SOI substrate. Through this region, the resist 306, the single crystal semiconductor layer 301, and the antistatic film 307 are grounded. By providing a region connected to the base semiconductor layer on the entire outer periphery, it is possible to reduce a difference between a location near and far from the grounding point generated on the substrate surface as compared with the first embodiment.

FIG. 5 is a top view of an SOI substrate according to another embodiment of the present invention. For convenience, a single crystal semiconductor layer having the same shape as the insulating layer is omitted.
5 that the region where the single crystal insulating layer and the insulating layer are not formed, that is, the region where the base semiconductor layer is exposed is provided in the entire outer periphery 501 and the central portion 502 of the semiconductor substrate. The process of applying a resist and an antistatic film to this SOI substrate is the same as that in the second embodiment. In the present embodiment, by providing a region connected to the base semiconductor layer in the central portion in addition to the entire outer periphery, a more stable ground potential can be ensured as compared with the second embodiment. This is effective when the diameter of the semiconductor substrate is increased in the future.

  As described above, when the charged particle beam exposure is performed by attaching the SOI substrate of the present invention to the sample stage of the charged particle beam exposure apparatus by the electrostatic adsorption method, the grounding terminal provided in the sample stage is used. By performing charged particle beam exposure while grounding, it is possible to prevent the substrate surface and the resist from being charged. It should be noted that when removing the end face of the antistatic film, control is performed so that it remains on the exposed face of the underlying semiconductor layer. By reliably bringing the antistatic film into contact with the underlying semiconductor layer, it is possible to suppress the orbital disturbance of the irradiated charged particle beam due to the charged charges and maintain the drawing accuracy. At this time, there is no need to change the exposure apparatus itself, and the exposure apparatus can be used as it is.

  The semiconductor substrate of the present invention is not limited to the embodiments described so far. For example, the present invention is also applicable when the semiconductor substrate has a multilayer structure of three or more layers. Further, the place where the base semiconductor layer is exposed is not limited to this. Depending on the shape of the semiconductor substrate and the design margin, it can be provided at a necessary location.

It is the schematic diagram showing the procedure until it fixes to the charged particle beam exposure apparatus and the semiconductor substrate concerning the 1st Embodiment of this invention. 1 is a top view of a semiconductor substrate according to a first embodiment of the present invention. It is the schematic diagram showing the procedure until it fixes to the charged particle beam exposure apparatus and the semiconductor substrate concerning the 2nd Embodiment of this invention. It is a top view of the SOI substrate concerning the 2nd Embodiment of this invention. It is a top view of the SOI substrate concerning another embodiment of this invention. It is a schematic diagram showing a single crystal silicon substrate and the sample stand which fixes this. It is a schematic diagram showing a SOI substrate and the sample stand which fixes this.

Explanation of symbols

101, 301, 701 Single crystal semiconductor layers 102, 302, 702 Insulating layers 103, 303, 703 Underlying semiconductor layers 104, 304, 704 SOI substrates 105, 305, 501, 502 Underlying semiconductor layer exposed regions 106, 306, 601, 705 Resist 108, 307 Antistatic film 111, 309, 603, 706 Sample stage 112, 310, 604, 707 Ground terminal 602 Single crystal silicon substrate

Claims (5)

A semiconductor substrate having a base semiconductor layer, an insulating layer formed on the base semiconductor layer, and a single crystal semiconductor layer formed on the insulating layer,
The semiconductor substrate, wherein the insulating layer and the single crystal semiconductor layer are not present and the base semiconductor layer is exposed in at least a partial region of the semiconductor substrate.   2. The semiconductor substrate according to claim 1, wherein a region where the base semiconductor layer is exposed is provided in at least a part of an outer peripheral portion of the semiconductor substrate.   3. The semiconductor substrate according to claim 1, wherein a region where the base semiconductor layer is exposed is provided in a central portion of the semiconductor substrate. A base semiconductor layer; an insulating layer formed on the base semiconductor layer; and a single crystal semiconductor layer formed on the insulating layer, wherein the insulating layer is formed in at least a partial region of the semiconductor substrate. And a charged particle beam exposure method for a semiconductor substrate in which the underlying semiconductor layer is exposed without the presence of the single crystal semiconductor layer,
Fixing the base semiconductor layer provided on the back side of the semiconductor substrate so as to contact a ground terminal provided on a sample stage;
Applying a resist on the single crystal semiconductor layer provided on the main surface side of the semiconductor substrate;
Applying an antistatic film so as to cover at least a partial region of the exposed surface of the semiconductor layer and the region of the semiconductor substrate to which the resist is applied;
With
A charged particle beam exposure method comprising irradiating the semiconductor substrate with a charged particle beam through the underlayer semiconductor layer while grounding the antistatic film. Removing a portion of the antistatic film on the exposed underlying semiconductor layer;
After the resist application, removing a part of the resist applied on the single crystal semiconductor substrate to expose a part of the single crystal semiconductor substrate;
The charged particle beam exposure method according to claim 4, further comprising at least one of the following.

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