JPS59215015A - Pcm sound recording and reproducing device - Google Patents

Abstract

PURPOSE:To prevent surely noise by detecting whether or not a vertical synchronizing signal and a signal at an equalizing pulse signal period are in accordance with a prescribed format, resetting a synchronizing signal generating circuit, taking the synchronism and replacing the signal in the vertical period so as to keep on the transmission of a correct signal. CONSTITUTION:A vertical synchronizing section detecting circuit 7 detects from a synchronizing signal B whether or not a vertical synchronizing signal and the equalizing pulse section decided by a data section signal C of an even field are in accordance with a prescribed format. An even field detecting circuit 8 generates surely a detecting pulse F representing the even field itself from a signal disturbed by the omission of the synchronizing signal B and the generation of a pseudo signal or an odd field. A synchronizing pulse generating circuit 9 generates a synchronizing reset pulse G of a synchronizing signal generating circuit 10 for replacement with the data section signal C of the end of the next data block and the pulse G is outputted to succeeding circuits via an output terminal 12 in place of a signal J from the synchronizing signal generator for replacement and the synchronizing signal B.

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a video tape recorder (hereinafter referred to as VTR).
Alternatively, the present invention relates to a PC+VI recording and reproducing apparatus that uses a part of the PC+VI recording and reproducing apparatus to record and reproduce PCM signals compliant with standard television signals.

The configuration of the conventional example and its problems Figure 1 shows the PCM signal in vertical section units.
)(1) respectively represent an equalization pulse signal and a vertical synchronization signal, and (111) represents a data block. H represents one horizontal period, ■ represents one vertical period, F represents an even field, and 0 represents an odd field.

Figure 2 shows the PCM signal format near the vertical section of each field, and Figure 8 shows the PCM signal format in the horizontal section, where X is the horizontal synchronization signal, A is the data signal in the data block (Ill), ■ is a data synchronization signal,
2 represents the white reference signal, which is 1h-168 bits.

As can be seen from Figure 2, the relationship between the data signal and the vertical open signal is different depending on the even field and the odd field. Currently, if some or all of the signals are missing, noise occurs.

Purpose of the Invention The present invention provides accurate signal processing for vertical synchronization, which is important for cueing data due to jitter and dropouts reproduced from a VTR, and for signals in which the G signal and the preceding and succeeding equivalent pulse signals are missing. Therefore, it is an object of the present invention to provide a PCIVI recording/playback device capable of correcting the vicinity of the vertical section.

Composition of the Invention The PCM recording/playback device of the present invention has a vertical synchronization signal and equalization pulse signal sections before and after the synchronization signal in the l'c]Vl signal conforming to the standard television signal according to a predetermined format. a first detection means for detecting whether the vertical synchronization signal and the equalization pulse signal sections before and after the vertical synchronization signal are a predetermined one of an even field and an odd field; a second detection means; a replacement synchronization pulse generating means for generating a synchronization pulse at a predetermined timing in the next other field when one field is detected; A replacement synchronization signal generating means generates a replacement synchronization signal, and a pulse generated at the rear of a data interval is used for every horizontal IX interval based on the relationship between the data signal in the PCM signal and the horizontal synchronization signal. data interval detection means for detecting the beginning and end of a data block for each interval and generating a start pulse and a termination pulse; interval signal generation means for generating a control pulse for replacing the end pulse and the start pulse; The PC according to the control pulse
A synchronizing signal replacing means for outputting the replacement synchronizing signal in place of the synchronizing signal in the %i number is provided, and the synchronizing signal of the synchronizing signal vt replacing means is configured to be used for PCM number reproduction. Features.

Description of examples Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 4 shows I) a CM recording and reproducing apparatus according to the present invention.

ζυ is the input terminal of the PCM signal reproduced from the VTR, (
2) is a data signal detection circuit which slices the PCM signal at slice level D in FIG.
This is to detect. (3) is the same-ground signal detection circuit,
The synchronization signal B is detected by slicing the PCM signal at the slice level S shown in FIG. (4) is the first one that generates the data interval value qC at the rear of the data signal A.
The pulse generation circuit generates a free-running signal using data signal A.
It is configured to reset using a data synchronization signal (1, 0, 1, 0) within and generate a pulse after a specified time T. (5) is a data interval detection circuit, and the data interval signal C
As an input signal, the vertical section detection signal shown in FIG. 6 is generated at the beginning and end of the data section in the vertical synchronization period.

(6) is a section signal generation circuit that takes the vertical section detection signal as an input signal and generates a replacement control pulse E that is inverted every time a pulse is input; (7) is a vertical synchronization section detection circuit;
It is configured to detect whether the vertical synchronization signal and equalization pulse section determined by the even field data section signal C are in a predetermined format from the synchronization signal B as shown in FIG. When signal C comes, the falling edge of synchronizing signal B is detected in the first detection section, and when that pulse comes, the polar window for catching the next falling edge is closed for a certain width within the IH section, and then the window is opened. [First detection mask section] The falling edges are detected up to the 11th order of eight. Also, in the second detection section,
Following this, the falling edge of the signal is sequentially detected up to 18 points. At this time, the window will be closed at a certain width within the 0.5 fi interval [second detection square interval]. If the falling edge of synchronization signal B occurs when these two windows are closed, it is determined that the format is not the predetermined format No. 1u-r L,
111 if a specified pulse signal comes while the window is open.
is determined to be a specified format. Section K represents a format detection section. In order to perform the same detection in the odd field or to detect whether the format is the same as the even field, the result is that it is not in the predetermined format, as shown in FIG. 8. In order to further increase the accuracy, an eighth detection interval may be provided in which the length L=aH of the interval between the eighth pulse of the first detection interval and the vertical synchronization signal of the synchronization signal is checked. Reference numeral (8) denotes an even field detection circuit, which is configured to generate a detection pulse F that reliably indicates an even field from a signal disturbed by an odd field, omission of the synchronizing signal B, generation of a pseudo signal, or the like. (9) is a synchronization pulse generation circuit which, upon detecting the detection pulse F, generates a synchronization reset pulse G for the replacement synchronization signal generation circuit 4 in response to the data interval signal C at the end of the next data block. (+1 is the synchronization signal replacement circuit, and the replacement control pulse generation circuit (6)
In the Ichihara section where the replacement control pulse E is generated, the replacement synchronization signal generation circuit replaces the input synchronization signal B (replaces the signal J from the replacement synchronization signal generation from 10 with the output terminal The configuration is such that it is output to the subsequent circuit via 0';4.

Because of this configuration, the synchronization signal B in FIG.
Even if the same JtJl signal is missing due to dropout etc. as in I, the synchronization signal 4j and T for rule replacement are output from the output terminal (
1, it is possible to always output a synchronizing signal in the correct format, and it is possible to reliably eliminate noise when reproducing a 1'CM signal.

In the second embodiment, the field was performed on the even side, but the same result can be obtained even if the field is performed on the odd side. The first pulse generating circuit (4) also generates a data signal A.
The data interval signal C was generated based on 1, but the data interval signal C can also be obtained by resetting the free-running signal generation using the synchronizing signal B.

Effects of the Invention As explained above, according to the PCIV1 recording and reproducing apparatus of the present invention, it is detected whether or not the vertical synchronization signal and the signal in the equalization pulse signal section of the PCM signal are in a predetermined format.
At the correct time, the synchronization signal generation circuit, which was created separately, is reset and synchronized, and the vertical section is replaced, so a pseudo signal is generated or dropped in the reproduced signal from V'I'R. It is possible to continue sending the correct signal and reliably prevent noise even if the

[Brief explanation of the drawing]

Figure 1 is an explanatory diagram of the PCM signal for each vertical section, Figure 2 is a 1-'CM format diagram of each field, Figure 8 is a PCM format diagram of the horizontal interval, and Figure @4 is an illustration of an embodiment of the present invention. Main part configuration diagrams, FIGS. 6 to 9 are explanatory diagrams of the operation of the main parts of FIG. 4. (11...input terminal, (2)...data signal detection circuit, (3)...synchronization signal detection circuit, (4)...first
pulse generation circuit. (5)...Data interval detection circuit [data interval detection circuit]. (6)...Section signal generation circuit [Section signal generation circuit]
, (7)... Vertical synchronization interval detection circuit (fJi detection means), +8)... Even field detection circuit [
Second Detection Means]. (9)...Synchronization pulse generation circuit [Replacement synchronization pulse generation circuit], (it)...Replacement synchronization signal generation circuit [Replacement 1illI period signal generation means], uυ...Synchronization signal replacement circuit [Synchronization signal replacement means], (b)... Output terminal, A... Data signal, B... Same 1 signal, C... Data section signal. 1 No... Vertical section detection signal, E... Pulse signal for replacement control, T... k? Dehals, G... Synchronous reset pulse agent Yoshihiro Morimoto

Claims (1)

[Claims] 1. A first detection means for detecting whether or not a vertical synchronization signal and equalization pulse signal sections before and after the synchronization signal in a PCM signal conforming to a standard television signal conform to a predetermined format; a second detection means for detecting whether or not the synchronization signal and the equalization pulse signal sections before and after the synchronization signal are a predetermined one of an even field and an odd field; and detecting that the synchronization signal is one of the fields. replacement synchronization pulse generation means for generating a synchronization pulse at a predetermined timing in the next other field when the synchronization pulse is received; and replacement synchronization signal generation means for generating a replacement synchronization signal synchronized with the synchronization pulse; Based on the relationship between the data signal in the PCM signal and the horizontal synchronization signal, the start and end of the data block for each vertical section are detected using pulses generated at the rear of the data section for each horizontal section, and the start and end pulses are detected. data interval detection means for generating a pulse; interval signal generation means for generating a control pulse for replacing between the end pulse and the start pulse; 1. A PCM recording and reproducing apparatus, comprising: a synchronizing signal replacing means for outputting the replacement synchronizing signal, and configured to use the synchronizing signal of the synchronizing signal replacing means for PCM reproduction.