JPS59208827A - Pattern forming method - Google Patents

Abstract

PURPOSE:To improve the throughput of forming a pattern by previously registering an ultrafine reference pattern to be repeatedly drawn in an ROM. CONSTITUTION:Only an ultrafine pattern is previously extracted from an integrated circuit pattern, the ultrafine pattern is divided into one or more reference patterns 41 according to a regularity, registered in an ROM17, and a position (x, y) from a drawing reference point of the reference pattern, numbers p, m of chips of directions x, y, pitches c, a, the numbers g, n of the reference patterns when a plurality of reference patterns are disposed in the chips, pitches d, b are inputted as data for specifying the position to be formed with the patterns 41. The data may be inputted, for example, by an operator through a console 14 by a keyboard to a CPU13. In case of drawing, an electron beam is moved to the reference point of (x0, y0) by the movement of the stage 1, the deflection of the electron beam or their combination, and the data are drawn on the basis of the reference pattern data registered in the ROM17 with the reference point as an origin. Then, similar operation is repeated to enable to draw over the entire surface of a wafer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to improvements in a pattern forming method, and particularly to a pattern forming method suitable for forming an integrated circuit pattern including fine repeats and nine turns.

[Technical background of the invention and its problems]

In recent years, various electron beam lithography apparatuses have been developed to form fine patterns on samples such as semiconductor substrates and mask substrates. This device is capable of forming turns of 1 micron or submicron, which was impossible with conventional light, and is attracting attention as a mainstream technology for forming fine turns.

By the way, when drawing a fine pattern using an electron beam drawing device, it is necessary to narrow down the diameter of the electron beam. Therefore, in order to write the entire desired pattern, the beam must be scanned many times, resulting in a drawback that the writing throughput is extremely low. As a method to solve this problem, methods such as varying the beam dimensions according to the pattern to be drawn have been devised, but in this case, the control is inevitably complicated9, the equipment becomes expensive, and the operation becomes unstable. invites change. In addition, the amount of data increases with the miniaturization of Ctan,
There were problems such as the data conversion time required to convert design data into drawing data was enormous.

[Purpose of the invention]

An object of the present invention is to provide a pattern forming method that can improve the throughput of pattern formation, facilitate data conversion from design data to drawing data, and contribute to lower costs of equipment. There is a particular thing.

[Summary of the invention]

The gist of the present invention is to register a fine reference pattern that is repeatedly drawn in the ROM in advance, and to write the pattern portion in the ROM.
This is done based on the information registered in M.

Fine patterns drawn using electron beam writing equipment include those that require drawing extremely fine R-turns over the entire surface of general micrographs, dirt arrays, memories, etc.; As seen in wave elements, fine / minute turns are required locally, but
Some of the remaining parts may be relatively large sized pieces. The same thing can be said about the former if we look at it in detail.

Therefore, it is possible to increase the overall writing efficiency by writing only the fine patterns with a small-diameter electron beam and writing the remaining patterns with light or a large-sized electron beam. Therefore, in the present invention, only patterns that really require miniaturization are extracted as patterns to be drawn with an electron beam, and this is divided into reference/mother turns based on regularity, and these reference/mother turns are registered in advance in the ROM. . Registration in the ROM can be easily performed using a commercially available ROM writer. For drawing, the desired rhythm can be achieved by specifying the standard pattern arrangement, pitch, number of repetitions, etc. using the BASIC Grodarum language.
A turn (fine pattern) will be drawn.

The present invention has focused on such points, and includes a method for forming an integrated circuit/gut pattern having a repeated mother turn on the substrate by irradiating a substrate made of a semiconductor or the like with an energy beam. In this process, only minute turns are extracted from the integrated circuit pattern in advance, and this minute pattern is determined by regularity! 71 or multiple criteria/
dividing the pattern into four turns and registering it in the ROM, then inputting position designation information specifying the position where the standard four turns or a combination pattern thereof should be formed, and reading out the pattern information registered in the ROM based on this information; This is a method in which only the above-mentioned reference/armline or combination pattern thereof is drawn at a designated position on the above-mentioned substrate using a fine electron beam.

〔Effect of the invention〕

According to the present invention, when forming an integrated circuit pattern having 9 fine repeating turns, the repeating pattern is RO
It can be formed by repeating 9 turns of reference registered in M. In this case, the standard turn 9 R
Registration in the OM and data conversion can be easily performed by the device designer, so that for repetitive patterns, there is no need for a large-scale computer for data conversion and data conversion processing using this divider. First, it is only necessary to use pattern data other than repeating patterns to convert design data into drawing data using the above-mentioned computer. Therefore, the overall data conversion time can be significantly shortened, and throughput can be improved. Furthermore, since modifications to the reference pattern and its arrangement can be easily made in the same way as using a personal computer, the turnaround time for device development, including design changes, can be significantly reduced. I still have the standard turn in ROM.
Since the information is registered in , there are advantages such as the overall amount of data conversion is small and it contributes to lower cost of the fruiting device.

[Embodiments of the invention]

FIG. 1 is a schematic configuration diagram showing a well-known electron beam lithography system. In the figure, 1 is a stage, 2 is a sample on which a resist layer sensitive to energy beams is formed, 3 is an electron gun, and 4 is a sample.
1 indicates a lens system, 5 indicates a drawing circuit, 6 indicates a blanking circuit, 7 indicates a deflection circuit, 8 indicates a stage control circuit, 9 indicates a drive system, 10 indicates a radar measurement system, and 11 indicates a position circuit.

Further, 12 is an interface, 13 is a CPU, 14 is a console, 15 is a magnetic tape, and 16 is a magnetic disk.

FIG. 2 is a schematic configuration diagram showing an electron beam lithography system used in a method according to an embodiment of the present invention. This system differs from conventional systems in that the lithography circuit 5 is replaced with a ROM 17. . In other words, this device performs electrical writing on the resist layer of sample 2 based only on the i4 turn data (reference turn data) registered in advance in the ROM 17. 1
A data processing unit such as No. 6 is unnecessary.

Next, a method for forming nine turns using the above-mentioned apparatus will be explained. For example, considering a microwave FET, its cross section is schematically shown in Figure 3 (a), and its plane and source are shown in Figure 3 (b).
It is shown as follows. Here, only the gate 31 requires a fine R-turn, and the A' pads 32 and 33 for bonding the source and drain may be larger in size than the gate 31. FIG. 4 shows a schematic planar R-turn of an IC chip consisting of three FETs. In addition, 31! , ~.

313 is dirt, 32-1. ~, 323 are source pads, 331, ~, 333 are drain pads, 35
indicates the scribe area.

FIG. 5 is a plan view schematically showing only the dart 31 portion when a plurality of elements 36 shown in FIG. 4 are arranged on a wafer 37. FIG. 6(a) is a schematic diagram illustrating the method of drawing the darts 31,
FIG. 6(b) is an enlarged view of the main part of FIG. 6(,). first,
By extracting only the minute nosetan from the integrated circuit pattern on the wafer 37 and dividing it according to regularity, a pattern of only the gate 31 can be obtained. Therefore, the figure including the dirt 31 is set as the reference pattern 4, and this reference gloss turn 41 is registered in the ROM. In this case, since the reference pattern 41 is a relatively simple figure, commercially available R
It can be easily recorded with an OM writer. Alternatively, a program may be used that creates data to be written into the ROM by giving corner coordinates of a rectangle, and creating such a program is extremely easy.

Next, the standard iJ? As data (array data) specifying the position where the turn 41 should be formed, the position (xo + yo) from the drawing reference point (origin) of the reference pattern, the number of chips in the y direction, m1 pitch, a1 pitch, and a plurality of references. If there is a pattern, input its number n1 pitch b, and also similarly input the number p1 pitch C of chips and the number q1 pitch a (q and a are not shown) inside the chip in the X direction. Note that the above data can be input using the console 14.
The operator can use the J CPU via the keyboard, for example.
13.

Also, the dimension X of the reference guide 41 in the x and y directions.

In principle, Y is preferably set to a length that can be drawn in one scan of the beam or less.

During writing, the electron beam is moved to (xo, yo) by moving the stage 1, deflecting the electron beam, or a combination thereof.
), and using this as the origin, the data is drawn based on the reference pattern data registered in the ROM 17.

Next, according to the array data inputted from the console 14, the electron beam position is set, for example, as a reference point (XQ +
yo+ b), and use that as the origin and use the above data 41
Draw. From now on, the reference point is (Xo rVo +2b)
r(XO+lFO+3b)...-(Xo ry
O+(n 1) b), and further move the reference point to (XQ l yo +2a), and repeat the above drawing. When the drawing is completed with the reference point as (xo +70 + (m-1)a+(n 1)b), change the reference point to CXO+C+'10
).

Thereafter, by repeating the same operation, it becomes possible to write over the entire wafer.

It should be noted that the pattern formed by the above method is only the pattern in the vicinity of Case 1-32, as shown in FIG. Other turns may be drawn using the normal electron beam drawing apparatus shown in FIG. 1.

Thus, according to the method of this embodiment, when drawing the standard OA-n 41 including the dirt 31, the drawing is performed based on the information recorded in the ROM 17 and the input information from the console 14 without requiring complicated data conversion processing. Nosetan 4 above
1 can be easily drawn. therefore,
When drawing the remaining mother turns with a normal electron beam drawing device, the amount of data conversion processing required by the device can be extremely reduced. Therefore, the overall data conversion time can be significantly shortened, thereby improving the resolution of the data.

Note that the present invention is not limited to the embodiments described above, and can be implemented with various modifications without departing from the gist thereof. In the embodiment, a case has been described in which one case is taken as the reference pattern, but a plurality of turns may be grouped together and used as the nine turns of the reference pattern. Further, it is also possible to prepare a plurality of types of reference patterns and combine them into a reference pattern or a turn. Furthermore, it is also possible to register different kinds of reference patterns in the ROM and draw each pattern in an arbitrary arrangement using a program. It is also possible to divide these reference pattern groups into a plurality of pattern groups, change the conditions of the electron optical system (beam diameter, beam current, etc.) for each pattern group, and perform writing in multiple passes.

Furthermore, the apparatus for carrying out the method of the present invention is not limited to the configuration shown in FIG. Any device may be used as long as it has a function of registering a turn in the ROM and a function of inputting information specifying a position where the above pattern or a combination pattern thereof is to be formed. Furthermore, it goes without saying that the above functions may be added to a conventional device, such as the device shown in FIG.

[Brief explanation of the drawing]

1 to 6(a) and 6(b) are for explaining one embodiment of the method of the present invention, respectively. FIG. 1 is a schematic configuration diagram showing a general electron beam lithography apparatus, and FIG. 3(a) and 3(b) are schematic configuration diagrams showing an electron beam lithography device for drawing the reference pattern portion, and FIGS. 3(a) and 3(b) are microwave FETs.
The cross-sectional view and plan view showing the element structure of the above-mentioned FE
FIG. 5 is a plan view schematically showing an IC chip pattern consisting of three T chips, and FIG. ) (b) is a schematic diagram for explaining the reference/lean drawing method. l...stage, 2...sample, 3...electron gun, 4
...Lens system, 13...CPU, 14...Console, 17...ROM, 31...Dart, 32.3
3... Source/drain pad, 35... Scripline, 37... Wafer, 41... Reference pattern. Figure 1 9, Figure 2 3F! ! J 4th t! 1

Claims (2)

[Claims] (1) In a method of forming an integrated circuit pattern having a repetitive pattern on the substrate by irradiating an energy beam onto the substrate, only a fine pattern is extracted from the integrated circuit pattern in advance when forming the repetitive pattern, and the fine pattern is Divide the pattern into one or more reference patterns according to regularity and register them in the ROM, and then input position designation information specifying the position where the reference R turn or a combination thereof is to be formed. Based on this information, the pattern information registered in the ROM is read out, and only the reference/mother pattern or a combination thereof is drawn at the specified position on the substrate using a fine electron beam.・How to form seven turns. (2) The position designation information is the reference number 4 turns or
2. The method for forming a mother turn according to claim 1, wherein the arrangement, pitch, and number of repetitions of the combination pattern are specified.